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* [RegAllocGreedy] Fix an assertion and condition when last chance recoloring ↵Quentin Colombet2016-09-161-2/+3
| | | | | | | | | | | | | | | | is used. When last chance recoloring is used, the list of NewVRegs may not be empty when calling selectOrSplitImpl. Indeed, another coloring may have taken place with splitting/spilling in the same recoloring session. Relax an assertion to take this into account and adapt a condition to act as if the NewVRegs were local to this selectOrSplitImpl instance. Unfortunately I am unable to produce a test case for this, I was only able to reproduce the conditions on an out-of-tree target. llvm-svn: 281782
* AMDGPU: Refactor kernel argument loweringTom Stellard2016-09-164-52/+109
| | | | | | | | | | | | | | | | | | | Summary: The main challenge in lowering kernel arguments for AMDGPU is determing the memory type of the argument. The generic calling convention code assumes that only legal register types can be stored in memory, but this is not the case for AMDGPU. This consolidates all the logic AMDGPU uses for deducing memory types into a single function. This will make it much easier to support different ABIs in the future. Reviewers: arsenm Subscribers: arsenm, wdng, nhaehnle, llvm-commits, yaxunl Differential Revision: https://reviews.llvm.org/D24614 llvm-svn: 281781
* AMDGPU: Use SOPK compare instructionsMatt Arsenault2016-09-167-51/+152
| | | | llvm-svn: 281780
* AMDGPU/SI: Add support for triples with the mesa3d operating systemTom Stellard2016-09-167-13/+22
| | | | | | | | | | | | | | Summary: mesa3d will use the same kernel calling convention as amdhsa, but it will handle everything else like the default 'unknown' OS type. Reviewers: arsenm Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D22783 llvm-svn: 281779
* [InstCombine] allow vector types for constant folding / computeKnownBits ↵Sanjay Patel2016-09-162-6/+8
| | | | | | | | | | | | | | | | (PR24942) computeKnownBits() already works for integer vectors, so allow vector types when calling that from InstCombine. I don't think the change to use m_APInt in computeKnownBits is strictly necessary because we do check for ConstantVector later, but it's more efficient to handle the splat case without needing to loop on vector elements. This should work with InstSimplify, but doesn't yet, so I made that a FIXME comment on the test for PR24942: https://llvm.org/bugs/show_bug.cgi?id=24942 Differential Revision: https://reviews.llvm.org/D24677 llvm-svn: 281777
* [LTO] Add ability to parse AA pipelines.Davide Italiano2016-09-161-1/+10
| | | | | | | This is supposed to be a drop in replacement for what lld provides via --lto-newpm-aa-pipeline. llvm-svn: 281774
* Defer asm errors to post-statement failureNirav Dave2016-09-1610-352/+254
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recommitting after fixing AsmParser initialization and X86 inline asm error cleanup. Allow errors to be deferred and emitted as part of clean up to simplify and shorten Assembly parser code. This will allow error messages to be emitted in helper functions and be modified by the caller which has better context. As part of this many minor cleanups to the Parser: * Unify parser cleanup on error * Add Workaround for incorrect return values in ParseDirective instances * Tighten checks on error-signifying return values for parser functions and fix in-tree TargetParsers to be more consistent with the changes. * Fix AArch64 test cases checking for spurious error messages that are now fixed. These changes should be backwards compatible with current Target Parsers so long as the error status are correctly returned in appropriate functions. Reviewers: rnk, majnemer Subscribers: aemerson, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D24047 llvm-svn: 281762
* Change extractProfMetadata and extractProfTotalWeight to const member function.Dehao Chen2016-09-161-26/+18
| | | | llvm-svn: 281760
* LoopDistribute should preserve GlobalsAA.Eli Friedman2016-09-161-0/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D24204 llvm-svn: 281758
* LoopLoadElimination should preserve GlobalsAA.Eli Friedman2016-09-161-0/+2
| | | | | | | | Avoids losing GlobalsAA in the standard pass pipeline. Differential Revision: https://reviews.llvm.org/D24094 llvm-svn: 281757
* Fix test after renaming -name-anon-functions pass to -name-anon-globalsMehdi Amini2016-09-161-1/+1
| | | | llvm-svn: 281752
* Actually remove the Mangler from the AsmPrinter and clean up the places it ↵Eric Christopher2016-09-167-15/+7
| | | | | | was "used" but not used. llvm-svn: 281749
* Fix a hidden use of grabbing the Mangler from the AsmPrinter and updateEric Christopher2016-09-161-4/+4
| | | | | | accordingly. llvm-svn: 281748
* Rename NameAnonFunctions to NameAnonGlobals to match what it is doing (NFC)Mehdi Amini2016-09-166-30/+30
| | | | llvm-svn: 281745
* Fix NameAnonFunctions pass: for ThinLTO we need to rename global variables ↵Mehdi Amini2016-09-161-5/+10
| | | | | | | | | | | as well A follow-up patch will rename this pass and the source file accordingly, but I figured the non-NFC change will be easier to spot in isolation. Differential Revision: https://reviews.llvm.org/D24641 llvm-svn: 281744
* [InstCombine] add helper functions for visitICmpInst(); NFCISanjay Patel2016-09-162-523/+559
| | | | llvm-svn: 281743
* [IRObjectFile] Turn llvm_unreachable("foo") into something more explicative.Davide Italiano2016-09-161-1/+1
| | | | llvm-svn: 281742
* [LTO] Prevent asm references to be dropped from the output.Davide Italiano2016-09-161-0/+18
| | | | | | Differential Revision: https://reviews.llvm.org/D24617 llvm-svn: 281741
* [AArch64][GlobalISel] Add default regbank mapping for int<>FP.Ahmed Bougacha2016-09-161-0/+10
| | | | llvm-svn: 281739
* [AArch64][GlobalISel] Add default regbank mapping for G_FCMP.Ahmed Bougacha2016-09-161-0/+10
| | | | llvm-svn: 281738
* [AArch64][GlobalISel] Add default regbank mapping for FP ops.Ahmed Bougacha2016-09-161-1/+18
| | | | | | These should have all their operands - even scalars - go on FPR. llvm-svn: 281737
* [AArch64][GlobalISel] Test default regbank mapping for G_ICMP.Ahmed Bougacha2016-09-161-1/+1
| | | | | | | Also relax a RegisterBankInfo verifier check that's incompatible with 1-bit mappings. llvm-svn: 281735
* [AArch64][GlobalISel] Add default regbank mappings for mixed-type ops.Ahmed Bougacha2016-09-161-18/+36
| | | | | | | | We used to only support instructions with same-type operands. Instead, use the per-register type information to map each operand more accurately. llvm-svn: 281734
* Reapplying r278731 after fixing the problem that caused it to be reverted.David L Kreitzer2016-09-161-15/+100
| | | | | | | | | | Enhance SCEV to compute the trip count for some loops with unknown stride. Patch by Pankaj Chawla Differential Revision: https://reviews.llvm.org/D22377 llvm-svn: 281732
* [mips] Fix previous revert r281726.Simon Dardis2016-09-161-36/+0
| | | | llvm-svn: 281729
* Place the lowered phi instruction(s) before the DEBUG_VALUE entryKeith Walker2016-09-166-6/+20
| | | | | | | | | | | | | | | | When a phi node is finally lowered to a machine instruction it is important that the lowered "load" instruction is placed before the associated DEBUG_VALUE entry describing the value loaded. Renamed the existing SkipPHIsAndLabels to SkipPHIsLabelsAndDebug to more fully describe that it also skips debug entries. Then used the "new" function SkipPHIsAndLabels when the debug information should not be skipped when placing the lowered "load" instructions so that it is placed before the debug entries. Differential Revision: https://reviews.llvm.org/D23760 llvm-svn: 281727
* Revert "[mips] Fix aui/daui/dahi/dati for MIPSR6"Simon Dardis2016-09-167-39/+47
| | | | | | This reverts r281724. Still need dsanders to accept this. llvm-svn: 281726
* [LTO] Fix handling of mixed (regular and thin) mode LTOTeresa Johnson2016-09-161-6/+9
| | | | | | | | | | | | | | | | | | | | | Summary: In runThinLTO we start the task numbering for ThinLTO backend tasks depending on whether there was also a regular LTO object (CombinedModule). However, the CombinedModule is moved at the end of runRegularLTO, so we need to save this information and pass it into runThinLTO. Otherwise the AddOutput callback to the client will use the same task number for both the regular LTO object and the first ThinLTO object, which in gold-plugin caused only one to be end up in the output filename array and therefore passed back to gold for the final native link. Reviewers: pcc, mehdi_amini Subscribers: mehdi_amini, kromanova Differential Revision: https://reviews.llvm.org/D24643 llvm-svn: 281725
* [mips] Fix aui/daui/dahi/dati for MIPSR6Simon Dardis2016-09-167-11/+75
| | | | | | | | | | | | For compatiblity with binutils, define these instructions to take two registers with a 16bit unsigned immediate. Both of the registers have to be same for dahi and dati. Reviewers: vkalintiris, dsanders, zoran.jovanovic Differential Review: https://reviews.llvm.org/D21473 llvm-svn: 281724
* Reverting r281719, this is causing buildbot failures and timeouts again.Sjoerd Meijer2016-09-161-18/+1
| | | | llvm-svn: 281722
* [AArch64][GlobalISel] Use the generic DefaultMapping as the default.Ahmed Bougacha2016-09-161-2/+1
| | | | | | | This lets generic logic handle the common case, instead of having to implement applyMappingImpl for each instruction. llvm-svn: 281720
* This is an attempt to reapply r280808: [ARM] Lower UDIV+UREM to UDIV+MLSSjoerd Meijer2016-09-161-1/+18
| | | | | | | | | | (and the same for SREM) This was causing buildbot failures earlier (time outs in the LNT suite). However, we haven't been able to reproduce this and are suspecting this was caused by another (reverted) patch. llvm-svn: 281719
* Trying to fix Mangler memory leak in TargetLoweringObjectFile.Eric Liu2016-09-161-0/+2
| | | | | | | | | | | | | | Summary: `TargetLoweringObjectFile` can be re-used and thus `TargetLoweringObjectFile::Initialize()` can be called multiple times causing `Mang` pointer memory leak. Reviewers: echristo Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D24659 llvm-svn: 281718
* [LCG] Redesign the lazy post-order iteration mechanism for theChandler Carruth2016-09-161-103/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LazyCallGraph to support repeated, stable iterations, even in the face of graph updates. This is particularly important to allow the CGSCC pass manager to walk the RefSCCs (and thus everything else) in a module more than once. Lots of unittests and other tests were hard or impossible to write because repeated CGSCC pass managers which didn't invalidate the LazyCallGraph would conclude the module was empty after the first one. =[ Really, really bad. The interesting thing is that in many ways this simplifies the code. We can now re-use the same code for handling reference edge insertion updates of the RefSCC graph as we use for handling call edge insertion updates of the SCC graph. Outside of adapting to the shared logic for this (which isn't trivial, but is *much* simpler than the DFS it replaces!), the new code involves putting newly created RefSCCs when deleting a reference edge into the cached list in the correct way, and to re-formulate the iterator to be stable and effective even in the face of these kinds of updates. I've updated the unittests for the LazyCallGraph to re-iterate the postorder sequence and verify that this all works. We even check for using alternating iterators to trigger the lazy formation of RefSCCs after mutation has occured. It's worth noting that there are a reasonable number of likely simplifications we can make past this. It isn't clear that we need to keep the "LeafRefSCCs" around any more. But I've not removed that mostly because I want this to be a more isolated change. Differential Revision: https://reviews.llvm.org/D24219 llvm-svn: 281716
* [ARM] Promote small global constants to constant poolsJames Molloy2016-09-165-3/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). This recommit contains fixes for a nasty bug related to fast-isel fallback - because fast-isel doesn't know about this optimization, if it runs and emits references to a string that we inline (because fast-isel fell back to SDAG) we will end up with an inlined string and also an out-of-line string, and we won't emit the out-of-line string, causing backend failures. It also contains fixes for emitting .text relocations which made the sanitizer bots unhappy. llvm-svn: 281715
* Move the Mangler from the AsmPrinter down to TLOF and clean up theEric Christopher2016-09-1633-221/+160
| | | | | | TLOF API accordingly. llvm-svn: 281708
* Remove unused function getMang().Eric Christopher2016-09-161-3/+0
| | | | llvm-svn: 281707
* Revert "[asan] Avoid lifetime analysis for allocas with can be in ambiguous ↵Vitaly Buka2016-09-161-75/+0
| | | | | | | | | | state" This approach is not good enough. Working on the new solution. This reverts commit r280907. llvm-svn: 281689
* Revert "[asan] Add flag to allow lifetime analysis of problematic allocas"Vitaly Buka2016-09-161-6/+0
| | | | | | | | This approach is not good enough. Working on the new solution. This reverts commit r281126. llvm-svn: 281688
* Fix autoupgrade logic for Objective-C class properties module flagMehdi Amini2016-09-161-4/+4
| | | | | | | | | | | | | | Previous we were issuing an error when linking a module containing the new Objective-C metadata structure for class properties with an "old" one. Now instead we downgrade the module flag so that the Objective-C runtime does not expect the new metadata structure. This is consistent with what ld64 is doing on binary files. Differential Revision: https://reviews.llvm.org/D24620 llvm-svn: 281685
* [InstCombine] move folds for icmp (sh C2, Y), C1 in with other icmp+sh ↵Sanjay Patel2016-09-152-31/+25
| | | | | | folds; NFCI llvm-svn: 281672
* [libFuzzer] make caller-callee feedback work with trace-pc-guardKostya Serebryany2016-09-155-1/+17
| | | | llvm-svn: 281667
* [sanitizer-coverage] make trace-pc-guard and indirect-call work togetherKostya Serebryany2016-09-151-1/+1
| | | | llvm-svn: 281665
* [codeview] Optimize the size of defranges with gapsReid Kleckner2016-09-151-5/+43
| | | | | | | | | For small, discontiguous local variable regions, CodeView can use a single defrange record with a gap, rather than having two defrange records. I expect that this optimization will only have a minor impact on debug info size. llvm-svn: 281664
* [InstCombine] allow icmp (shr/shl) folds for vectorsSanjay Patel2016-09-152-25/+20
| | | | | | | | | | | | These 2 helper functions were already using APInt internally, so just change the API and caller to allow folds for splats. The scalar regression tests look quite thorough, so I just added a couple of tests to prove that vectors are handled too. These folds should be grouped with the other cmp+shift folds though. That can be an NFC follow-up. llvm-svn: 281663
* [GlobalOpt] Dead Eliminate declarationsMehdi Amini2016-09-151-2/+2
| | | | | | | | | | | | GlobalOpt is already dead-code-eliminating global definitions. With this change it also takes care of declarations. Hopefully this should make it now a strict superset of GlobalDCE. This is important for LTO/ThinLTO as we don't want the linker to see "undefined reference" when it processes the input files: it could prevent proper internalization (or even load an extra file from a static archive, changing the behavior of the program!). llvm-svn: 281653
* [InstCombine] Do not RAUW a constant GEPDavid Majnemer2016-09-151-1/+1
| | | | | | | | canRewriteGEPAsOffset expects to process instructions, not constants. This fixes PR30342. llvm-svn: 281650
* [AArch64] Support for FP FMA when -ffp-contract=fastEvandro Menezes2016-09-151-3/+5
| | | | | | | | | | | | Currently, the machine combiner can proceed matching when -ffast-math is on. It should also match when only -ffp-contract=fast is specified as was the case before when DAGCombiner was doing the job. Patch by: Abderrazek Zaafrani <a.zaafrani@samsung.com>. Differential Revision: https://reviews.llvm.org/D24366 llvm-svn: 281649
* Revert "[ARM] Promote small global constants to constant pools"Evgeniy Stepanov2016-09-154-155/+1
| | | | | | This reverts r281604, which adds text relocations to ARM binaries. llvm-svn: 281645
* [InstCombine] simplify code; NFCISanjay Patel2016-09-151-14/+7
| | | | llvm-svn: 281644
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