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* [RS4GC] Strip noalias attribute after statepoint rewriteIgor Laevsky2015-10-261-1/+4
| | | | | | | | | We should remove noalias along with dereference and dereference_or_null attributes because statepoint could potentially touch the entire heap including noalias objects. Differential Revision: http://reviews.llvm.org/D14032 llvm-svn: 251333
* SamplePGO - Add optimization reports.Diego Novillo2015-10-261-6/+30
| | | | | | | | | | | | | | | | | | | | | | | This adds a couple of optimization remarks to the SamplePGO transformation. When it decides to inline a hot function (to mimic the inline stack and repeat useful inline decisions in the original build). It will also report branch destinations. For instance, given the code fragment: 6 if (i < 1000) 7 sum -= i; 8 else 9 sum += -i * rand(); If the 'else' branch is taken most of the time, building this code with -Rpass=sample-profile will produce: a.cc:9:14: remark: most popular destination for conditional branches at small.cc:6:9 [-Rpass=sample-profile] sum += -i * rand(); ^ llvm-svn: 251330
* Remove assert(false) in favor of asserting the if conditional it is ↵David Blaikie2015-10-261-8/+5
| | | | | | | | contained within. Also adjust the code to avoid 3 redundant map lookups. llvm-svn: 251327
* Move the canonical header to the top of its matching cpp file as per coding ↵David Blaikie2015-10-261-1/+2
| | | | | | | | | convention This ensures that the header will be verified to be standalone (and avoid mistakes like the one fixed in r251178) llvm-svn: 251326
* Add an (optional) identification block in the bitcodeMehdi Amini2015-10-262-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | Processing bitcode from a different LLVM version can lead to unexpected behavior. The LLVM project guarantees autoupdating bitcode from a previous minor revision for the same major, but can't make any promise when reading bitcode generated from a either a non-released LLVM, a vendor toolchain, or a "future" LLVM release. This patch aims at being more user-friendly and allows a bitcode produce to emit an optional block at the beginning of the bitcode that will contains an opaque string intended to describe the bitcode producer information. The bitcode reader will dump this information alongside any error it reports. The optional block also includes an "epoch" number, monotonically increasing when incompatible changes are made to the bitcode. The reader will reject bitcode whose epoch is different from the one expected. Differential Revision: http://reviews.llvm.org/D13666 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 251325
* [safestack] Fast access to the unsafe stack pointer on AArch64/Android.Evgeniy Stepanov2015-10-266-56/+69
| | | | | | | | | | | | | | | | | | | | | Android libc provides a fixed TLS slot for the unsafe stack pointer, and this change implements direct access to that slot on AArch64 via __builtin_thread_pointer() + offset. This change also moves more code into TargetLowering and its target-specific subclasses to get rid of target-specific codegen in SafeStackPass. This change does not touch the ARM backend because ARM lowers builting_thread_pointer as aeabi_read_tp, which is not available on Android. The previous iteration of this change was reverted in r250461. This version leaves the generic, compiler-rt based implementation in SafeStack.cpp instead of moving it to TargetLoweringBase in order to allow testing without a TargetMachine. llvm-svn: 251324
* ARM/ELF: Better codegen for global variable addresses.Peter Collingbourne2015-10-2614-169/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In PIC mode we were previously computing global variable addresses (or GOT entry addresses) by adding the PC, the PC-relative GOT displacement and the GOT-relative symbol/GOT entry displacement. Because the latter two displacements are fixed, we ended up performing one more addition than necessary. This change causes us to compute addresses using a single PC-relative displacement, resulting in a shorter code sequence. This reduces code size by about 4% in a recent build of Chromium for Android. As a result of this change we no longer need to compute the GOT base address in the ARM backend, which allows us to remove the Global Base Reg pass and SDAG lowering for the GOT. We also now no longer use the GOT when addressing a symbol which is known to be defined in the same linkage unit. Specifically, the symbol must have either hidden visibility or a strong definition in the current module in order to not use the the GOT. This is a change from the previous behaviour where we would use the GOT to address externally visible symbols defined in the same module. I think the only cases where this could matter are cases involving symbol interposition, but we don't really support that well anyway. Differential Revision: http://reviews.llvm.org/D13650 llvm-svn: 251322
* Refactor: Simplify boolean conditional return statements in ↵Alexey Samsonov2015-10-261-4/+2
| | | | | | | | | | | | lib/Transforms/Instrumentation Summary: Use clang-tidy to simplify boolean conditional return statements. Differential Revision: http://reviews.llvm.org/D9996 Patch by Richard (legalize@xmission.com)! llvm-svn: 251318
* Check the case that the numerator and denominator are both zeros when ↵Cong Hou2015-10-261-0/+10
| | | | | | | | getting edge probabilities in BPI and return 100% in this case. This issue is triggered in PGO mode when bootstrapping LLVM. It seems that it is not guaranteed that edge weights are always greater than zero which are read from profile data. llvm-svn: 251317
* Move parts of llvm-symbolizer tool into LLVMSymbolize library.Alexey Samsonov2015-10-267-5/+691
| | | | | | | | | | | | Summary: See http://lists.llvm.org/pipermail/llvm-dev/2015-October/091624.html Reviewers: echristo Subscribers: llvm-commits, aizatsky Differential Revision: http://reviews.llvm.org/D13998 llvm-svn: 251316
* [SystemZ] LTGFR use regclass should be GR32, not GR64.Jonas Paulsson2015-10-261-1/+1
| | | | | | | Discovered by testing int-cmp-44.ll with -verify-machineinstrs (added to test run). llvm-svn: 251299
* [SystemZ] Also clear kill flag for index reg in splitMove().Jonas Paulsson2015-10-261-1/+3
| | | | | | | Discovered by running fp-move-05.ll with -verify-machineinstrs (added to test case run). llvm-svn: 251298
* [SystemZ] Don't forget the CC def op on LTEBRCompare pseudosJonas Paulsson2015-10-261-1/+1
| | | | | | | Discovered by running fp-cmp-02.ll with -verify-machineinstrs (now added to test run). llvm-svn: 251297
* [SystemZ] Tie operands in SystemZShorteInst if MI becomes 2-address.Jonas Paulsson2015-10-261-1/+10
| | | | | | | | Discovered by testing fp-add-02.ll with -verify-machineinstrs. Test case updated to always run with -verify-machineinstrs. llvm-svn: 251296
* [mips] Check for the correct error message in tests for interrupt attributes.Vasileios Kalintiris2015-10-262-6/+6
| | | | | | | | Instead of XFAIL-ing the tests with the wrong usage of the "interrupt" attribute, we should check that we emit the correct error messages to the user. llvm-svn: 251295
* [ValueTracking] Extend r251146 to catch a fairly common caseJames Molloy2015-10-261-2/+22
| | | | | | | | | | | | | Even though we may not know the value of the shifter operand, it's possible we know the shifter operand is non-zero. This can allow us to infer more known bits - for example: %1 = load %p !range {1, 5} %2 = shl %q, %1 We don't know %1, but we do know that it is nonzero so %2[0] is known zero, and importantly %2 is known non-zero. Calling isKnownNonZero is nontrivially expensive so use an Optional to run it lazily and cache its result. llvm-svn: 251294
* Loop Vectorizer - skipping "bitcast" before GEPElena Demikhovsky2015-10-261-3/+16
| | | | | | | | | | Vectorization of memory instruction (Load/Store) is possible when the pointer is coming from GEP. The GEP analysis allows to estimate the profit. In some cases we have a "bitcast" between GEP and memory instruction. I added code that skips the "bitcast". http://reviews.llvm.org/D13886 llvm-svn: 251291
* AVX512: Enabled VPBROADCASTB lowering for v64i8 vectors.Igor Breger2015-10-261-0/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D13896 llvm-svn: 251287
* [mips] Interrupt attribute support for mips32r2+.Vasileios Kalintiris2015-10-2613-13/+389
| | | | | | | | | | | | | | | | | | | Summary: This patch adds support for using the "interrupt" attribute on Mips for interrupt handling functions. At this time only mips32r2+ with the o32 ABI with the static relocation model is supported. Unsupported configurations will be rejected Patch by Simon Dardis (+ clang-format & some trivial changes to follow the LLVM coding standards by me). Reviewers: mpf, dsanders Subscribers: dsanders, vkalintiris, llvm-commits Differential Revision: http://reviews.llvm.org/D10768 llvm-svn: 251286
* AVX-512: Use correct extract vector length.Igor Breger2015-10-261-1/+1
| | | | | | | | Bug https://llvm.org/bugs/show_bug.cgi?id=25318 Differential Revision: http://reviews.llvm.org/D14062 llvm-svn: 251285
* [InstCombine] Teach instcombine not to create extra PHI nodes when folding GEPsSilviu Baranga2015-10-261-1/+6
| | | | | | | | | | | | | | | | | | Summary: InstCombine tries to transform GEP(PHI(GEP1, GEP2, ..)) into GEP(GEP(PHI(...)) when possible. However, this may leave the old PHI node around. Even if we do end up folding the GEPs, having an extra PHI node might not be beneficial. This change makes the transformation more conservative. We now only do this if the PHI has only one use, and can therefore be removed after the transformation. Reviewers: jmolloy, majnemer Subscribers: mcrosier, mssimpso, llvm-commits Differential Revision: http://reviews.llvm.org/D13887 llvm-svn: 251281
* [ARM] Handle the inline asm constraint type 'o'James Molloy2015-10-262-0/+3
| | | | | | This means "memory with offset" and requires very little plumbing to get working. This fixes PR25317. llvm-svn: 251280
* Drop code after unreachable. No functionality change.Benjamin Kramer2015-10-262-3/+0
| | | | llvm-svn: 251278
* AVX512: Add AVX-512 not materializable instructions. Igor Breger2015-10-261-1/+29
| | | | | | | | | | Otherwise value can be reused , despite its value could be changed - produces incorrect assembler. https://llvm.org/bugs/show_bug.cgi?id=25270 Differential Revision: http://reviews.llvm.org/D14057 llvm-svn: 251275
* [Orc] Add license header to OrcTargetSupport.Lang Hames2015-10-261-1/+9
| | | | llvm-svn: 251274
* [MC] Add support for GNU as-compatible binary operator precedenceDavid Majnemer2015-10-261-3/+87
| | | | | | | | | | GNU as and Darwin give the various binary operators different precedence. LLVM's MC supported the Darwin semantics but not the GNU semantics. This fixes PR25311. llvm-svn: 251271
* [MC] Don't crash when .word is given bogus valuesDavid Majnemer2015-10-262-2/+20
| | | | | | | | | | We didn't validate that the .word directive was given a sane value, leading to crashes when we attempt to write out the object file. Instead, perform some validation and issue a diagnostic pointing at the start of the diagnostic. llvm-svn: 251270
* Convert assert(false) into llvm_unreachable where it makes sense.Benjamin Kramer2015-10-256-10/+9
| | | | llvm-svn: 251266
* [ScalarEvolution] Throw away dead code.Davide Italiano2015-10-251-17/+0
| | | | llvm-svn: 251256
* [ScalarEvolution] Get rid of NDEBUG in header (correctly this time).Davide Italiano2015-10-251-0/+6
| | | | llvm-svn: 251255
* [LCSSA] Unbreak build, don't reuse L; NFCSanjoy Das2015-10-251-2/+2
| | | | | | The build broke in r251248. llvm-svn: 251251
* [ScalarEvolution] Get rid of NDEBUG in header.Davide Italiano2015-10-251-7/+0
| | | | llvm-svn: 251249
* [LCSSA] Use range for loops; NFCSanjoy Das2015-10-251-28/+21
| | | | llvm-svn: 251248
* [X86][SSE4A] Fix for EXTRQI shuffle lowering.Simon Pilgrim2015-10-251-2/+2
| | | | | | Incorrect range test - found during fuzz testing. llvm-svn: 251245
* Scalarizer for masked.gather and masked.scatter intrinsics.Elena Demikhovsky2015-10-254-1/+298
| | | | | | | | | | When the target does not support these intrinsics they should be converted to a chain of scalar load or store operations. If the mask is not constant, the scalarizer will build a chain of conditional basic blocks. I added isLegalMaskedGather() isLegalMaskedScatter() APIs. Differential Revision: http://reviews.llvm.org/D13722 llvm-svn: 251237
* [X86] Use correct calling convention for MCU psABI libcallsMichael Kuperstein2015-10-253-0/+30
| | | | | | | | | | | | When using the MCU psABI, compiler-generated library calls should pass some parameters in-register. However, since inreg marking for x86 is currently done by the front end, it will not be applied to backend-generated calls. This is a workaround for PR3997, which describes a similar issue for -mregparm. Differential Revision: http://reviews.llvm.org/D13977 llvm-svn: 251223
* [X86] Add support for elfiamcu tripleMichael Kuperstein2015-10-252-0/+3
| | | | | | | | This adds support for the i?86-*-elfiamcu triple, which indicates the IAMCU psABI is used. Differential Revision: http://reviews.llvm.org/D13977 llvm-svn: 251222
* Remove two unnecessary conversions from MVT to EVT. NFCCraig Topper2015-10-251-2/+2
| | | | llvm-svn: 251219
* Use MVT::SimpleValueType instead of MVT in template parameter. NFCCraig Topper2015-10-251-1/+2
| | | | llvm-svn: 251217
* Refactor: Simplify boolean conditional return statements in lib/CodeGen.Rafael Espindola2015-10-249-60/+24
| | | | | | Patch by Richard. llvm-svn: 251213
* [X86][SSE] Use lowerVectorShuffleWithUNPCK instead of custom matches.Simon Pilgrim2015-10-241-104/+40
| | | | | | Most 128-bit and 256-bit shuffles were manually matching UNPCK patterns - use lowerVectorShuffleWithUNPCK to be more thorough. llvm-svn: 251211
* [X86][SSE] lowerVectorShuffleWithUNPCK - use equivalent shuffle mask test.Simon Pilgrim2015-10-241-25/+14
| | | | | | Use isShuffleEquivalent to match UNPCK shuffles - better support for build vector inputs. llvm-svn: 251207
* Refactor: Simplify boolean conditional return statements in ↵Michael Zolotukhin2015-10-242-11/+5
| | | | | | | | | | | | lib/Transforms/Vectorize (NFC). Summary: Use clang-tidy to simplify boolean conditional return statements Differential Revision: http://reviews.llvm.org/D10003 Patch by Richard<legalize@xmission.com> llvm-svn: 251206
* [DAGCombiner] Tidy up ConstantFP commutation. NFCISimon Pilgrim2015-10-241-37/+21
| | | | | | Move ConstantFP canonicalization of commutative instructions to start of 2-op node creation (matches integer) - simplifies constant folding code. llvm-svn: 251203
* Use all_of to simplify control flow. NFC.Benjamin Kramer2015-10-242-16/+4
| | | | llvm-svn: 251202
* Add libuuid to required system libraries list for mingw.Yaron Keren2015-10-241-1/+2
| | | | | | | | | This list is produced by llvm-config --system-libs to be used by external programs using the llvm libraries, such as creduce. In r250501 llvm/Support/Windows/Path.inc started to use the constant FOLDERID_Profile from libuuid. llvm-svn: 251201
* Use find_if to simplify control flow. NFC.Benjamin Kramer2015-10-241-10/+5
| | | | llvm-svn: 251200
* [DAGCombiner] Generalize masking of constant rotates.Simon Pilgrim2015-10-241-5/+10
| | | | | | | | We don't need a mask of a rotation result to be a constant splat - any constant scalar/vector can be usefully folded. Followup to D13851. llvm-svn: 251197
* Call the version of ConvertCostTableLookup that takes a statically sized ↵Craig Topper2015-10-241-3/+2
| | | | | | array rather than pointer and size. NFC llvm-svn: 251196
* X86ISelLowering: Support tail calls to/from callee pop functionsHans Wennborg2015-10-241-22/+33
| | | | | | | | | This enables tail calls with thiscall, stdcall, vectorcall and fastcall functions. Differential Revision: http://reviews.llvm.org/D13999 llvm-svn: 251190
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