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* Demangle: correct demangling for CV-qualified functionsSaleem Abdulrasool2017-01-241-6/+9
| | | | | | | | | | | When demangling a CV-qualified function type with a final reference type parameter, we would treat the reference type parameter as a r-value ref accidentally. This would result in the improper decoration of the function type itself. Resolves PR31741! llvm-svn: 292976
* Demangle: use named values for CV qualifiersSaleem Abdulrasool2017-01-241-12/+18
| | | | | | | Rather than hard-coding magic values of 1, 2, 4 (bit-field), use an enum to name the values. NFC. llvm-svn: 292975
* Remove the load hoisting code of MLSM, it is completely subsumed by GVNHoistDaniel Berlin2017-01-241-174/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: GVNHoist performs all the optimizations that MLSM does to loads, in a more general way, and in a faster time bound (MLSM is N^3 in most cases, N^4 in a few edge cases). This disables the load portion. Note that the way ld_hoist_st_sink.ll is written makes one think that the loads should be moved to the while.preheader block, but 1. Neither MLSM nor GVNHoist do it (they both move them to identical places). 2. MLSM couldn't possibly do it anyway, as the while.preheader block is not the head of the diamond, while.body is. (GVNHoist could do it if it was legal). 3. At a glance, it's not legal anyway because the in-loop load conflict with the in-loop store, so the loads must stay in-loop. I am happy to update the test to use update_test_checks so that checking is tighter, just was going to do it as a followup. Note that i can find no particular benefit to the store portion on any real testcase/benchmark i have (even size-wise). If we really still want it, i am happy to commit to writing a targeted store sinker, just taking the code from the MemorySSA port of MergedLoadStoreMotion (which is N^2 worst case, and N most of the time). We can do what it does in a much better time bound. We also should be both hoisting and sinking stores, not just sinking them, anyway, since whether we should hoist or sink to merge depends basically on luck of the draw of where the blockers are placed. Nonetheless, i have left it alone for now. Reviewers: chandlerc, davide Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29079 llvm-svn: 292971
* AMDGPU/SI: Give up in promote alloca when a pointer may be captured.Changpeng Fang2017-01-241-0/+4
| | | | | | | | | | Differential Revision: http://reviews.llvm.org/D28970 Reviewer: Matt llvm-svn: 292966
* Demangle: avoid butchering parameter typeSaleem Abdulrasool2017-01-241-2/+2
| | | | | | | | | | When demangling a CV-qualified function type with a final parameter with a reference type, we would insert the CV qualification on the parameter rather than the function, and in the process adjust the insertion point by one extra, splitting the type name. This avoids doing so, even though the attribution is still incorrect. llvm-svn: 292965
* [AArch64] Fix typo. NFC.Chad Rosier2017-01-241-2/+2
| | | | llvm-svn: 292959
* Use InstCombine's builder in foldSelectCttzCtlz instead of creating a new one.Amaury Sechet2017-01-241-3/+2
| | | | | | | | | | Summary: As per title. This will add the instructiions we are interested in in the worklist. Reviewers: mehdi_amini, majnemer, andreadb Differential Revision: https://reviews.llvm.org/D29081 llvm-svn: 292957
* [AMDGPU] Add VGPR copies post regalloc fix passStanislav Mekhanoshin2017-01-244-0/+78
| | | | | | | | | | | | | | Regalloc creates COPY instructions which do not formally use VALU. That results in v_mov instructions displaced after exec mask modification. One pass which do it is SIOptimizeExecMasking, but potentially it can be done by other passes too. This patch adds a pass immediately after regalloc to add implicit exec use operand to all VGPR copy instructions. Differential Revision: https://reviews.llvm.org/D28874 llvm-svn: 292956
* [AArch64] Rename 'no-quad-ldst-pairs' to 'slow-paired-128'Evandro Menezes2017-01-243-8/+7
| | | | | | | In order to follow the pattern of the existing 'slow-misaligned-128store' option, rename the option 'no-quad-ldst-pairs' to 'slow-paired-128'. llvm-svn: 292954
* [Lanai] Rename LanaiInstPrinter library to LanaiAsmPrinterChris Bieneman2017-01-244-4/+4
| | | | | | | | | | | | | | | Summary: This is in keeping with LLVM convention. The classes are InstPrinters, but the library is ${target}AsmPrinter. This patch is in response to bryant pointing out to me that Lanai was the only backend deviating from convention here. Thanks! Reviewers: jpienaar, bryant Subscribers: mgorny, jgosnell, llvm-commits Differential Revision: https://reviews.llvm.org/D29043 llvm-svn: 292953
* [InstSimplify] try to eliminate icmp Pred (add nsw X, C1), C2Sanjay Patel2017-01-241-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was surprised to see that we're missing icmp folds based on 'add nsw' in InstCombine, but we should handle the InstSimplify cases first because that could make the InstCombine code simpler. Here are Alive-based proofs for the logic: Name: add_neg_constant Pre: C1 < 0 && (C2 > ((1<<(width(C1)-1)) + C1)) %a = add nsw i7 %x, C1 %b = icmp sgt %a, C2 => %b = false Name: add_pos_constant Pre: C1 > 0 && (C2 < ((1<<(width(C1)-1)) + C1 - 1)) %a = add nsw i6 %x, C1 %b = icmp slt %a, C2 => %b = false Name: nuw Pre: C1 u>= C2 %a = add nuw i11 %x, C1 %b = icmp ult %a, C2 => %b = false Differential Revision: https://reviews.llvm.org/D29053 llvm-svn: 292952
* [CodeView] Fix off-by-one error in def range gap emissionReid Kleckner2017-01-241-6/+6
| | | | | | | | | Also fixes a much worse bug where we emitted the wrong gap size for the def range uncovered by the test for this issue. Fixes PR31726. llvm-svn: 292949
* [SelectionDAG] Handle inverted conditions when splitting into multiple branches.Geoff Berry2017-01-242-15/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When conditional branches with complex conditions are split into multiple branches in SelectionDAGBuilder::FindMergedConditions, also handle inverted conditions. These may sometimes appear without having been optimized by InstCombine when CodeGenPrepare decides to sink and duplicate cmp instructions, causing them to have only one use. This problem can be increased by e.g. GVNHoist hiding more cmps from InstCombine by combining equivalent cmps from different blocks. For example codegen X & !(Y | Z) as: jmp_if_X TmpBB jmp FBB TmpBB: jmp_if_notY Tmp2BB jmp FBB Tmp2BB: jmp_if_notZ TBB jmp FBB Reviewers: bogner, MatzeB, qcolombet Subscribers: llvm-commits, hiraditya, mcrosier, sebpop Differential Revision: https://reviews.llvm.org/D28380 llvm-svn: 292944
* [X86][AVX512] Remove unused argument from PMOVX tablegen patterns. NFCI.Simon Pilgrim2017-01-241-3/+3
| | | | | | Seems to be a copy+paste legacy from the AVX2 patterns. llvm-svn: 292941
* Fix formating in foldSelectCttzCtlz. NFCAmaury Sechet2017-01-241-1/+1
| | | | llvm-svn: 292934
* [PH] Replace uses of AssertingVH from members of analysis results withChandler Carruth2017-01-247-54/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a lazy-asserting PoisoningVH. AssertVH is fundamentally incompatible with cache-invalidation of analysis results. The invaliadtion happens after the AssertingVH has already fired. Instead, use a PoisoningVH that will assert if the dangling handle is ever used rather than merely be assigned or destroyed. This patch also removes all of the (numerous) doomed attempts to work around this fundamental incompatibility. It is a pretty significant simplification IMO. The most interesting change is in the Inliner where we still do some clearing because we don't want to rely on the coarse grained invalidation strategy of the containing pass manager. However, I prefer the approach that contains this logic to the cleanup phase of the Inliner, and I think we could enhance the CGSCC analysis management layer to make this even better in the future if desired. The rest is straight cleanup. I've also added a test for one of the harder cases to work around: when a *module analysis* contains many AssertingVHes pointing at functions. Differential Revision: https://reviews.llvm.org/D29006 llvm-svn: 292928
* [X86][SSE] Add explicit braces to avoid -Wdangling-else warning.Martin Bohme2017-01-241-1/+2
| | | | | | | | | | Reviewers: RKSimon Subscribers: llvm-commits, igorb Differential Revision: https://reviews.llvm.org/D29076 llvm-svn: 292924
* Fix unused variable warningSimon Pilgrim2017-01-241-2/+2
| | | | llvm-svn: 292921
* [X86][SSE] Add support for constant folding vector arithmetic shift by ↵Simon Pilgrim2017-01-241-6/+19
| | | | | | immediates llvm-svn: 292919
* [X86][SSE] Add support for constant folding vector logical shift by immediatesSimon Pilgrim2017-01-241-4/+20
| | | | llvm-svn: 292915
* [InstCombine][X86] MULDQ/MULUDQ undef -> zeroSimon Pilgrim2017-01-242-7/+1
| | | | | | | | Added early out for single undef input - we were already supporting (and testing) this in the constant folding code, we just do it quicker now Drop undef handling from demanded elts code now that we handle it fully in InstCombiner::visitCallInst llvm-svn: 292913
* [Support] Use O_CLOEXEC only when declaredPavel Labath2017-01-241-2/+20
| | | | | | | | | | | | | | | | | | | Summary: Use the O_CLOEXEC flag only when it is available. Some old systems (e.g. SLES10) do not support this flag. POSIX explicitly guarantees that this flag can be checked for using #if, so there is no need for a CMake check. In case O_CLOEXEC is not supported, fall back to fcntl(FD_CLOEXEC) instead. Reviewers: rnk, rafael, mgorny Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28894 llvm-svn: 292912
* [Support] Add sys::fs::set_current_path() (aka chdir)Pavel Labath2017-01-242-0/+22
| | | | | | | | | | | | | | | Summary: This adds a cross-platform way of setting the current working directory analogous to the existing current_path() function used for retrieving it. The function will be used in lldb. Reviewers: rafael, silvas, zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29035 llvm-svn: 292907
* [SLP] Refactoring of HorizontalReduction class, NFC.Alexey Bataev2017-01-241-34/+20
| | | | | | | | | Removed data members ReduxWidth and MinVecRegSize + some C++11 stylish improvements. Differential Revision: https://reviews.llvm.org/D29010 llvm-svn: 292899
* Update domtree incrementally in loop peeling.Serge Pavlov2017-01-241-7/+30
| | | | | | | | | With this change dominator tree remains in sync after each step of loop peeling. Differential Revision: https://reviews.llvm.org/D29029 llvm-svn: 292895
* [X86] Remove unnecessary peakThroughBitcasts call that's already take care ↵Craig Topper2017-01-241-2/+0
| | | | | | of by the ISD::isBuildVectorAllOnes check below. llvm-svn: 292894
* AMDGPU : Add trap handler support.Wei Ding2017-01-243-20/+33
| | | | llvm-svn: 292893
* [AVX-512] Simplify multiclasses for integer logic operations. There were ↵Craig Topper2017-01-241-35/+23
| | | | | | | | several inputs that didn't vary. While there give them the same scheduling itinerary as the SSE/AVX versions. llvm-svn: 292892
* Make VerifyDomInfo and VerifyLoopInfo global variablesSerge Pavlov2017-01-242-4/+4
| | | | | | | | | | | | | | | Verifications of dominator tree and loop info are expensive operations so they are disabled by default. They can be enabled by command line options -verify-dom-info and -verify-loop-info. These options however enable checks only in files Dominators.cpp and LoopInfo.cpp. If some transformation changes dominaror tree and/or loop info, it would be convenient to place similar checks to the files implementing the transformation. This change makes corresponding flags global, so they can be used in any file to optionally turn verification on. llvm-svn: 292889
* [SystemZ] Gracefully fail in GeneralShuffle::add() instead of assertion.Jonas Paulsson2017-01-241-12/+22
| | | | | | | | | | | | | | The GeneralShuffle::add() method used to have an assert that made sure that source elements were at least as big as the destination elements. This was wrong, since it is actually expected that an EXTRACT_VECTOR_ELT node with a smaller source element type than the return type gets extended. Therefore, instead of asserting this, it is just checked and if this is the case 'false' is returned from the GeneralShuffle::add() method. This case should be very rare and is not handled further by the backend. Review: Ulrich Weigand. llvm-svn: 292888
* [X86] Don't split v8i32 all ones values if only AVX1 is available. Keep it ↵Craig Topper2017-01-242-23/+13
| | | | | | | | intact and split it at isel. This allows us to remove the check in ANDN combining that had to look through the extraction. llvm-svn: 292881
* [X86] Remove Undef handling from extractSubVector. This is now handled ↵Craig Topper2017-01-241-4/+0
| | | | | | inside getNode. llvm-svn: 292877
* [SelectionDAG] Teach getNode to simplify a couple easy cases of ↵Craig Topper2017-01-241-0/+13
| | | | | | | | | | | | | | | | | | | | | EXTRACT_SUBVECTOR Summary: This teaches getNode to simplify extracting from Undef. This is similar to what is done for EXTRACT_VECTOR_ELT. It also adds support for extracting from CONCAT_VECTOR when we can reuse one of the inputs to the concat. These seem like simple non-target specific optimizations. For X86 we currently handle undef in extractSubvector, but not all EXTRACT_SUBVECTOR creations go through there. Ultimately, my motivation here is to simplify extractSubvector and remove custom lowering for EXTRACT_SUBVECTOR since we don't do anything but handle undef and BUILD_VECTOR optimizations, but those should be DAG combines. Reviewers: RKSimon, delena Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29000 llvm-svn: 292876
* [APInt] Remove calls to clearUnusedBits from XorSlowCase and operator^=Craig Topper2017-01-241-6/+2
| | | | | | | | | | | | | | | | | Summary: There's a comment in XorSlowCase that says "0^0==1" which isn't true. 0 xored with 0 is still 0. So I don't think we need to clear any unused bits here. Now there is no difference between XorSlowCase and AndSlowCase/OrSlowCase other than the operation being performed Reviewers: majnemer, MatzeB, chandlerc, bkramer Reviewed By: MatzeB Subscribers: chfast, llvm-commits Differential Revision: https://reviews.llvm.org/D28986 llvm-svn: 292873
* LiveIntervalAnalysis: Calculate liveness even if a superreg is reserved.Matthias Braun2017-01-241-6/+13
| | | | | | | | | | | | | | | | | A register unit may be allocatable and non-reserved but some of the register(tuples) built with it are reserved. We still need to calculate liveness in this case. Note to out of tree targets: If you start seeing machine verifier errors with this commit, it probably means that you do not properly mark super registers of reserved register as reserved. See for example r292836 or r292870 for example on how to fix that. rdar://29996737 Differential Revision: https://reviews.llvm.org/D28881 llvm-svn: 292871
* PowerPC: Mark super regs of reserved regs reserved.Matthias Braun2017-01-241-35/+25
| | | | | | | | | | | | | | When a register like R1 is reserved, X1 should be reserved as well. This was already done "manually" when 64bit code was enabled, however using the markSuperRegs() function on the base register is more convenient and allows to use the checksAllSuperRegsMarked() function even in 32bit mode to avoid accidental breakage in the future. This is also necessary to allow https://reviews.llvm.org/D28881 Differential Revision: https://reviews.llvm.org/D29056 llvm-svn: 292870
* [LTO] Teach lib/LTO about the new pass manager.Davide Italiano2017-01-241-4/+66
| | | | | | Differential Revision: https://reviews.llvm.org/D28997 llvm-svn: 292864
* [PM] Flesh out the new pass manager LTO pipeline.Davide Italiano2017-01-241-5/+158
| | | | | | Differential Revision: https://reviews.llvm.org/D28996 llvm-svn: 292863
* [sanitizer-coverage] emit __sanitizer_cov_trace_pc_guard w/o a preceding ↵Kostya Serebryany2017-01-241-1/+1
| | | | | | 'if' by default. Update the docs, also add deprecation notes around other parts of sanitizer coverage llvm-svn: 292862
* [APFloat] Add PPCDoubleDouble multiplicationTim Shen2017-01-241-6/+83
| | | | | | | | | | Reviewers: echristo, hfinkel, kbarton, iteratee Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D28382 llvm-svn: 292860
* [WebAssembly] Update LibFunc::Func -> LibFuncDerek Schuff2017-01-242-2/+2
| | | | | | Fixes compile failures after r292848 llvm-svn: 292857
* SimplifyLibCalls: Replace more unary libcalls with intrinsicsMatt Arsenault2017-01-233-30/+37
| | | | llvm-svn: 292855
* [LoopUnroll] First form LCSSA, then loop-simplifyMichael Kuperstein2017-01-231-18/+17
| | | | | | | | | | | | | Running non-LCSSA-preserving LoopSimplify followed by LCSSA on (roughly) the same loop is incorrect, since LoopSimplify may break LCSSA arbitrarily higher in the loop nest. Instead, run LCSSA first, and then run LCSSA-preserving LoopSimplify on the result. This fixes PR31718. Differential Revision: https://reviews.llvm.org/D29055 llvm-svn: 292854
* [AMDGPU] Fix obsolete comments, spotted by Malcolm Parsons. (NFC)Eugene Zelenko2017-01-231-3/+4
| | | | llvm-svn: 292853
* Makes promoteIndirectCall an external function.Dehao Chen2017-01-231-17/+7
| | | | | | | | | | | | | | Summary: promoteIndirectCall should be a utility function that could be invoked by other optimization passes. Reviewers: davidxl Reviewed By: davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29051 llvm-svn: 292850
* [Analysis] Add LibFunc_ prefix to enums in TargetLibraryInfo. (NFC)David L. Jones2017-01-2319-1322/+1322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The LibFunc::Func enum holds enumerators named for libc functions. Unfortunately, there are real situations, including libc implementations, where function names are actually macros (musl uses "#define fopen64 fopen", for example; any other transitively visible macro would have similar effects). Strictly speaking, a conforming C++ Standard Library should provide any such macros as functions instead (via <cstdio>). However, there are some "library" functions which are not part of the standard, and thus not subject to this rule (fopen64, for example). So, in order to be both portable and consistent, the enum should not use the bare function names. The old enum naming used a namespace LibFunc and an enum Func, with bare enumerators. This patch changes LibFunc to be an enum with enumerators prefixed with "LibFFunc_". (Unfortunately, a scoped enum is not sufficient to override macros.) There are additional changes required in clang. Reviewers: rsmith Subscribers: mehdi_amini, mzolotukhin, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D28476 llvm-svn: 292848
* AMDGPU: Custom lower more vector operationsMatt Arsenault2017-01-232-0/+105
| | | | | | This avoids stack usage. llvm-svn: 292846
* [RDF] Add registers to live set even if they are live alreadyKrzysztof Parzyszek2017-01-231-6/+5
| | | | | | | | When calculating kills, a register may be considered live because a part of it is live, but if there is a use of that (whole) register, the whole register (and its subregisters) need to be added to the live set. llvm-svn: 292845
* [libFuzzer] mutate empty input using the regular mutators (instead of a ↵Kostya Serebryany2017-01-231-14/+5
| | | | | | custom dummy one). This way when we mutate an empty input there is a chance we will get a dictionary word llvm-svn: 292843
* DAG: Don't fold vector extract into load if target doesn't want toMatt Arsenault2017-01-231-0/+5
| | | | | | | Fixes turning a 32-bit scalar load into an extending vector load for AMDGPU when dynamically indexing a vector. llvm-svn: 292842
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