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* Split the init.trampoline intrinsic, which currently combines GCC'sDuncan Sands2011-09-0612-46/+191
| | | | | | | | | | | | | | | | | | | | init.trampoline and adjust.trampoline intrinsics, into two intrinsics like in GCC. While having one combined intrinsic is tempting, it is not natural because typically the trampoline initialization needs to be done in one function, and the result of adjust trampoline is needed in a different (nested) function. To get around this llvm-gcc hacks the nested function lowering code to insert an additional parent variable holding the adjust.trampoline result that can be accessed from the child function. Dragonegg doesn't have the luxury of tweaking GCC code, so it stored the result of adjust.trampoline in the memory GCC set aside for the trampoline itself (this is always available in the child function), and set up some new memory (using an alloca) to hold the trampoline. Unfortunately this breaks Go which allocates trampoline memory on the heap and wants to use it even after the parent has exited (!). Rather than doing even more hacks to get Go working, it seemed best to just use two intrinsics like in GCC. Patch mostly by Sanjoy Das. llvm-svn: 139140
* Fix typo in comment again.Nick Lewycky2011-09-061-1/+1
| | | | llvm-svn: 139139
* Apparently we compile the code, not the comments. Thanks Eli!Nick Lewycky2011-09-061-2/+1
| | | | llvm-svn: 139138
* Fix typo in comment.Nick Lewycky2011-09-061-1/+1
| | | | llvm-svn: 139137
* Nope! I had it right the first time. Revert the operative part of r139135 andNick Lewycky2011-09-061-5/+8
| | | | | | add more showing of my work. llvm-svn: 139136
* Fix flipped sign. While there, show my math.Nick Lewycky2011-09-061-2/+9
| | | | llvm-svn: 139135
* No no no, fix typo properly!Nick Lewycky2011-09-061-2/+2
| | | | llvm-svn: 139134
* The logic inside getMulExpr to simplify {a,+,b}*{c,+,d} was wrong, which wasNick Lewycky2011-09-061-13/+20
| | | | | | | visible given a=b=c=d=1, on iteration #1 (the second iteration). Replace it with correct math. Fixes PR10383! llvm-svn: 139133
* Revert r139126 due to selfhost failures reported by buildbots.Nick Lewycky2011-09-061-6/+2
| | | | llvm-svn: 139130
* Teach SCEV to report a max backedge count in one interesting case inNick Lewycky2011-09-051-2/+6
| | | | | | HowFarToZero; the case for a canonical loop. llvm-svn: 139126
* Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certainNick Lewycky2011-09-0510-3/+55
| | | | | | | instructions are more aligned than the CPU requires, and adds some additional directives, to follow in future patches. Patch by David Meyer! llvm-svn: 139125
* Update the C++ backend to use the new ArrayRef'ified APIs. Patch by arrowdodger!Nick Lewycky2011-09-051-4/+3
| | | | llvm-svn: 139124
* Fix typo in comment.Nick Lewycky2011-09-051-1/+1
| | | | llvm-svn: 139122
* InstSimplify: Don't try to replace an extractvalue/insertvalue pair with the ↵Benjamin Kramer2011-09-051-1/+2
| | | | | | | | original value if types don't match. Fixes clang selfhost. llvm-svn: 139120
* Delete trivial landing pads that just continue unwinding the caughtDuncan Sands2011-09-051-0/+49
| | | | | | exception. llvm-svn: 139117
* Add some simple insertvalue simplifications, for the purpose of cleaningDuncan Sands2011-09-051-0/+36
| | | | | | up do-nothing exception handling code produced by dragonegg. llvm-svn: 139113
* Use canonical forms for the branch probability zero heutistic.Benjamin Kramer2011-09-041-25/+30
| | | | | | | | - Drop support for X >u 0, it's equivalent to X != 0 and should be canonicalized into the latter. - Add X < 1 -> unlikely, which is what instcombine canonicalizes X <= 0 into. - Add X > -1 -> likely, which is what instcombine canonicalizes X >= 0 into. llvm-svn: 139110
* Use Duncan's patch to delete the instructions in reverse order (minus the ↵Bill Wendling2011-09-042-12/+20
| | | | | | landingpad and terminator). llvm-svn: 139090
* The insertion point for the loads is right before the llvm.eh.exceptionBill Wendling2011-09-041-1/+1
| | | | | | | | call. The call may be in the same BB as the landingpad instruction. If that's the case, then inserting the loads after the landingpad inst, but before the extractvalues, causes undefined behavior. llvm-svn: 139088
* Use internal storage for command line option.Benjamin Kramer2011-09-032-6/+4
| | | | llvm-svn: 139079
* Don't reload the values that are already there. The llvm.eh.resume uses the sameBill Wendling2011-09-031-7/+4
| | | | | | | values that the resume instruction uses. PR10850 llvm-svn: 139076
* Add AVX versions to match AESENC/AESDEC intrinsics. This hopefully endsBruno Cardoso Lopes2011-09-031-16/+37
| | | | | | the cycle of missing AVX counterparts of already present SSE* patterns llvm-svn: 139073
* Add AVX version of a SSE4.1 VPBLENDVB patternBruno Cardoso Lopes2011-09-031-1/+5
| | | | llvm-svn: 139072
* Add AVX versions of SSE4.1 EXTRACTPS patternsBruno Cardoso Lopes2011-09-031-1/+6
| | | | llvm-svn: 139071
* Add AVX versions for SSE4.1 MOVZX* patternsBruno Cardoso Lopes2011-09-031-48/+112
| | | | llvm-svn: 139070
* Add one more AVX pattern for MOVZPQILo2PQIBruno Cardoso Lopes2011-09-031-6/+8
| | | | llvm-svn: 139069
* Move PUNPCKLQDQ splat pattern close to the instruction definition andBruno Cardoso Lopes2011-09-031-7/+8
| | | | | | duplicate it for AVX mode. llvm-svn: 139068
* Add AVX pattern versions for PSHUFB,PSIGN{B,W,D}Bruno Cardoso Lopes2011-09-031-11/+27
| | | | llvm-svn: 139067
* Add AVX versions of MOVZDI2PDI patterns. Use SUBREG_TO_REG to indicateBruno Cardoso Lopes2011-09-031-17/+45
| | | | | | | that the AVX versions (even the 128-bit ones) all clear the upper part of the destination register. llvm-svn: 139066
* Enforce subtarget checks in a few places to be explicit when theBruno Cardoso Lopes2011-09-031-29/+33
| | | | | | pattern should be matched llvm-svn: 139065
* Tidy up code moving patterns to their appropriate place!Bruno Cardoso Lopes2011-09-031-111/+94
| | | | llvm-svn: 139064
* Add AVX versions of FsMOVAPS and FsMOVAPS. Teach X86InstrInfo how to useBruno Cardoso Lopes2011-09-032-3/+25
| | | | | | it! llvm-svn: 139063
* Teach X86FastISel to use AVX versions of instructions when possibleBruno Cardoso Lopes2011-09-031-18/+26
| | | | llvm-svn: 139062
* Fix 80-column and styleBruno Cardoso Lopes2011-09-031-51/+51
| | | | llvm-svn: 139061
* Tidy up some SSE/AVX convert intrinsics. Also add an AVX version ofBruno Cardoso Lopes2011-09-031-18/+26
| | | | | | OptForSize pattern llvm-svn: 139060
* Fix a truly heinous bug in DAGCombine related to AssertZext.Owen Anderson2011-09-031-7/+6
| | | | | | | If we have a chain of zext -> assert_zext -> zext -> use, the first zext would get simplified away because of the later zext, and then the later zext would get simplified away because of the assert. The solution is to teach SimplifyDemandedBits that assert_zext demands all of the high bits of its input, rather than only those demanded by its users. No testcase because the only example I have manifests as llvm-gcc miscompiling LLVM, and I haven't found a smaller case that reproduces this problem. Fixes <rdar://problem/10063365>. llvm-svn: 139059
* Pseudo CMOV instructions don't clobber EFLAGS.Jakob Stoklund Olesen2011-09-021-13/+3
| | | | | | | | | | | | | | The explanation about a 0 argument being materialized as xor is no longer valid. Rematerialization will check if EFLAGS is live before clobbering it. The code produced by X86TargetLowering::EmitLoweredSelect does not clobber EFLAGS. This causes one less testb instruction to be generated in the cmov.ll test case. llvm-svn: 139057
* Check for EFLAGS live-out before clobbering it.Jakob Stoklund Olesen2011-09-021-8/+10
| | | | | | | It is only allowed to clobber EFLAGS at the end of a block if it isn't live-in to any successor. llvm-svn: 139056
* Use existing function.Jakob Stoklund Olesen2011-09-021-7/+3
| | | | llvm-svn: 139055
* Thumb2 parsing and encoding for BXJ.Jim Grosbach2011-09-021-6/+3
| | | | llvm-svn: 139053
* Thumb2 parsing and encoding of B instruction.Jim Grosbach2011-09-021-9/+21
| | | | | | | Tweak handling of IT blocks a bit to enable this. The differentiation between B and Bcc needs special sauce. llvm-svn: 139049
* Remove unused variables.Jakob Stoklund Olesen2011-09-021-4/+0
| | | | llvm-svn: 139047
* Don't fast-isel for atomic load/store; some cases require extra handling ↵Eli Friedman2011-09-022-0/+16
| | | | | | missing from fast-isel. llvm-svn: 139044
* Thumb2 parsing and encoding for ASR.Jim Grosbach2011-09-021-12/+38
| | | | | | | For other shift and rotate instructions, too. Tests for those forthcoming as I work my way through the ISA. llvm-svn: 139040
* Comment and clarifying assert.Andrew Trick2011-09-021-0/+1
| | | | llvm-svn: 139036
* No need to get fancy inserting a PHI node when the values are stored in stackBill Wendling2011-09-021-43/+15
| | | | | | | | slots. This fixes a bug where the number of nodes coming into the PHI node may not equal the number of predecessors. E.g., two or more landingpad instructions may require a PHI before reaching the eh.exception and eh.selector instructions. llvm-svn: 139035
* Change X86 disassembly to print immediates values as signed by default. SpecialKevin Enderby2011-09-022-1/+36
| | | | | | case those instructions that the immediate is not sign-extend. radr://8795217 llvm-svn: 139028
* Tidy up. Formatting.Jim Grosbach2011-09-024-16/+18
| | | | llvm-svn: 139024
* Update comments to reflect reality.Bill Wendling2011-09-022-4/+2
| | | | llvm-svn: 139023
* Tidy up. 80 columns.Jim Grosbach2011-09-021-4/+8
| | | | llvm-svn: 139022
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