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* Make sure to generate the right kind of MDNode for enum forward declarations.Eli Friedman2012-10-051-6/+7
| | | | | | PR14029, LLVM part. llvm-svn: 165288
* Follow up to r165072. Try a different approach: only move the load when it's ↵Evan Cheng2012-10-051-11/+9
| | | | | | going to be folded into the call. rdar://12437604 llvm-svn: 165287
* Teach the new SROA a new trick. Now we zap any memcpy or memmoves whichChandler Carruth2012-10-051-42/+93
| | | | | | | | | | | | are in fact identity operations. We detect these and kill their partitions so that even splitting is unaffected by them. This is particularly important because Clang relies on emitting identity memcpy operations for struct copies, and these fold away to constants very often after inlining. Fixes the last big performance FIXME I have on my plate. llvm-svn: 165285
* Lift the speculation visitor above all the helpers that are targeted atChandler Carruth2012-10-051-281/+283
| | | | | | | | | | | the rewrite visitor to make the fact that the speculation is completely independent a bit more clear. I promise that this is just a cut/paste of the one visitor and adding the annonymous namespace wrappings. The diff may look completely preposterous, it does in git for some reason. llvm-svn: 165284
* [ms-inline asm] Add support for parsing [Intel dialect] memory operands that useChad Rosier2012-10-041-7/+11
| | | | | | segmented registers. Test case to come. llvm-svn: 165275
* Rename the Target specific passes in the DataLayout class to be Target agnostic.Micah Villmow2012-10-041-48/+48
| | | | llvm-svn: 165270
* When merging connsecutive stores, use vectors to store the constant zero.Nadav Rotem2012-10-041-34/+57
| | | | llvm-svn: 165267
* Resubmit the copying of TargetData to DataLayout without any changes to the ↵Micah Villmow2012-10-042-0/+666
| | | | | | files, this should fix the problems and the changes to rename to DataLayout will come next. llvm-svn: 165262
* This patch corrects commit 165126 by using an integer bit width instead of Preston Gurd2012-10-043-12/+12
| | | | | | | | a pointer to a type, in order to remove the uses of getGlobalContext(). Patch by Tyler Nowicki. llvm-svn: 165255
* ARM: locate user-defined text sections next to default text.Jim Grosbach2012-10-041-4/+20
| | | | | | | | | | | | Make sure functions located in user specified text sections (via the section attribute) are located together with the default text sections. Otherwise, for large object files, the relocations for call instructions are more likely to be out of range. This becomes even more likely in the presence of LTO. rdar://12402636 llvm-svn: 165254
* Backing out my changes, something screwed up from my patches, starting over.Micah Villmow2012-10-042-666/+0
| | | | llvm-svn: 165253
* Rename TargetData to DataLayout in DataLayout.cpp. This should fix a build ↵Micah Villmow2012-10-041-33/+33
| | | | | | failure from r165249 where the wrong version of the file was submitted. llvm-svn: 165251
* Update this a bit more to represent how the prologue should work:Eric Christopher2012-10-042-5/+4
| | | | | | | | | | a) frame setup instructions define the prologue b) we shouldn't change our location mid-stream Add a test to make sure that the stack adjustment stays within the prologue. llvm-svn: 165250
* Create the DataLayout class, as a direct copy of TargetData.Micah Villmow2012-10-042-0/+666
| | | | llvm-svn: 165249
* Accidently checked in the files, only wanted to copy them.Micah Villmow2012-10-041-665/+0
| | | | llvm-svn: 165244
* (no commit message)Micah Villmow2012-10-041-0/+665
| | | | llvm-svn: 165243
* Add register encoding support in X86 backendMichael Liao2012-10-048-403/+287
| | | | | | | | - Add 'HwEncoding' for X86 registers and call getEncodingValue() to retrieve their encoding values. - This's the first step to adopt new scheme. Furthur revising is onging. llvm-svn: 165241
* Add a comment to the commit r165187.Jakub Staszak2012-10-041-1/+3
| | | | llvm-svn: 165238
* - add tokens to PPCInstrInfo.td and PPCInstr64Bit.td to resolveWill Schmidt2012-10-042-50/+50
| | | | | | | | | | "Instruction 'foo' has no tokens" errors during llvm-tblgen -gen-asm-matcher attempts. At this time, the added tokens are "#comment" style rather than the actual mnemonic. This will be revisited once the rest of the base asmparser bits get straightened out for ppc64-elf-linux. llvm-svn: 165237
* Get MCSchedModel directly from the subtarget.Jakob Stoklund Olesen2012-10-041-2/+3
| | | | | | | Not all targets have itineraries, but the subtarget always has an MCSchedModel. llvm-svn: 165236
* Switch MachineTraceMetrics to the new TargetSchedModel interface.Jakob Stoklund Olesen2012-10-042-32/+27
| | | | llvm-svn: 165235
* test commit / whitespaceWill Schmidt2012-10-041-1/+1
| | | | llvm-svn: 165233
* SimplifyCFG: Enhance the "remove CFG edge that leads to null pointer ↵Benjamin Kramer2012-10-041-2/+3
| | | | | | | | | | dereference" optimization to also handle instructions with multiple uses. We conservatively only check the first use to avoid walking long use chains. This catches the common case of having both a load and a store to a pointer supplied by a PHI node. llvm-svn: 165232
* In my recent change to avoid use of underaligned memory I didn't notice thatDuncan Sands2012-10-041-7/+7
| | | | | | | | cpyDest can be mutated in some cases, which would then cause a crash later if indeed the memory was underaligned. This brought down several buildbots, so I guess the underaligned case is much more common than I thought! llvm-svn: 165228
* The alignment of an sret parameter is known: it must be at least theDuncan Sands2012-10-041-5/+14
| | | | | | alignment of the return type. Teach the optimizers this. llvm-svn: 165226
* Hoist some grossly duplicated code from the COFF/ELF/MachO streamers into ↵Benjamin Kramer2012-10-044-126/+25
| | | | | | MCObjectStreamer. llvm-svn: 165225
* Fix PR13969, a mini-phase-ordering issue with the new SROA pass.Chandler Carruth2012-10-041-23/+50
| | | | | | | | | | | | | | | | | | | | | Currently, we re-visit allocas when something changes about the way they might be *split* to allow better scalarization to take place. However, we weren't handling the case when the *promotion* is what would change the behavior of SROA. When an address derived from an alloca is stored into another alloca, we consider the first to have escaped. If the second is ever promoted to an SSA value, we will suddenly be able to run the SROA pass on the first alloca. This patch adds explicit support for this form if iteration. When we detect a store of a pointer derived from an alloca, we flag the underlying alloca for reprocessing after promotion. The logic works hard to only do this when there is definitely going to be promotion and it might remove impediments to the analysis of the alloca. Thanks to Nick for the great test case and Benjamin for some sanity check review. llvm-svn: 165223
* The memcpy optimizer was happily doing call slot forwarding when the new memoryDuncan Sands2012-10-041-4/+30
| | | | | | | | | | was less aligned than the old. In the testcase this results in an overaligned memset: the memset alignment was correct for the original memory but is too much for the new memory. Fix this by either increasing the alignment of the new memory or bailing out if that isn't possible. Should fix the gcc-4.7 self-host buildbot failure. llvm-svn: 165220
* Teach the integer-promotion rewrite strategy to be endianness aware.Chandler Carruth2012-10-041-9/+29
| | | | | | | | | | | | | | | | | | | | | | | Sorry for this being broken so long. =/ As part of this, switch all of the existing tests to be Little Endian, which is the behavior I was asserting in them anyways! Add in a new big-endian test that checks the interesting behavior there. Another part of this is to tighten the rules abotu when we perform the full-integer promotion. This logic now rejects cases where there fully promoted integer is a non-multiple-of-8 bitwidth or cases where the loads or stores touch bits which are in the allocated space of the alloca but are not loaded or stored when accessing the integer. Sadly, these aren't really observable today as the rest of the pass will already ensure the invariants hold. However, the latter situation is likely to become a potential concern in the future. Thanks to Benjamin and Duncan for early review of this patch. I'm still looking into whether there are further endianness issues, please let me know if anyone sees BE failures persisting past this. llvm-svn: 165219
* Use method to query if there are attributes.Bill Wendling2012-10-041-1/+1
| | | | llvm-svn: 165213
* Add method to query for NoCapture attribute.Bill Wendling2012-10-041-0/+16
| | | | llvm-svn: 165212
* Use method to query for NoAlias attribute.Bill Wendling2012-10-041-1/+1
| | | | llvm-svn: 165211
* Use method to query for attributes.Bill Wendling2012-10-043-11/+11
| | | | llvm-svn: 165209
* Add method to query for 'NoAlias' attribute on call/invoke instructions.Bill Wendling2012-10-042-1/+17
| | | | llvm-svn: 165208
* Use method to query for attributes.Bill Wendling2012-10-041-1/+1
| | | | llvm-svn: 165207
* Query for attributes via the correct method call.Bill Wendling2012-10-041-2/+2
| | | | llvm-svn: 165206
* Use new accessor methods to query for attributes.Bill Wendling2012-10-044-4/+4
| | | | llvm-svn: 165205
* [tsan] add 3 internal flags for fine-grain control of what is instrumented ↵Kostya Serebryany2012-10-041-7/+18
| | | | | | and what is not. llvm-svn: 165204
* Remove template from function that is only used with one type after r165092.Craig Topper2012-10-041-4/+5
| | | | llvm-svn: 165203
* Fix reg mask slot test, and preserve LiveIntervals and VirtRegMap in the PBQPLang Hames2012-10-041-1/+3
| | | | | | allocator. Fixes PR13945. llvm-svn: 165201
* Implement methods that enable expansion of load immediate Jack Carter2012-10-043-28/+115
| | | | | | | | | | | | | | | | | | | | | | | | macro instruction (li) in the assembler. We have identified three possible expansions depending on the size of immediate operand: 1) for 0 ≤ j ≤ 65535. li d,j => ori d,$zero,j 2) for −32768 ≤ j < 0. li d,j => addiu d,$zero,j 3) for any other value of j that is representable as a 32-bit integer. li d,j => lui d,hi16(j) ori d,d,lo16(j) All of the above have been implemented in ths patch. Contributer: Vladimir Medic llvm-svn: 165199
* This patch is a partial implementation of mips .set assembler directive. ↵Jack Carter2012-10-041-43/+238
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Directive is defined as follows: .set option The patch implements following options at - lets the assembler use the $at register for macros, but generates warnings if the source program uses $at noat - let source programs use $at without issuingwarnings. noreorder - prevents the assembler from reordering machine language instructions. nomacro - causes the assembler to print a warning whenever an assembler operation generates more than one machine language instruction. macro - lets the assembler generate multiple machine instructions from a single assembler instruction reorder - lets the assembler reorder machine language instructions to improve performance The above variants are parsed and their boolean values set or unset. The code to actually use them will come later. Following options are not implemented yet: nomips16 nomicromips move nomove Contributer: Vladimir Medic llvm-svn: 165194
* tblgen: Whitespace and 80-col cleanup.Sean Silva2012-10-041-11/+12
| | | | llvm-svn: 165190
* Enable -schedmodel, but prefer itineraries until we have more benchmark data.Andrew Trick2012-10-041-52/+51
| | | | llvm-svn: 165188
* Fix PR13967.Jakub Staszak2012-10-031-1/+4
| | | | llvm-svn: 165187
* Clean up tailing whitespacesMichael Liao2012-10-031-2/+2
| | | | llvm-svn: 165182
* [ms-inline asm] Add support in the X86AsmPrinter for printing memory referencesChad Rosier2012-10-032-0/+56
| | | | | | | | | | | in the Intel syntax. The MC layer supports emitting in the Intel syntax, but this would require the inline assembly MachineInstr to be lowered to an MCInst before emission. This is potential future work, but for now emitting directly from the MachineInstr suffices. llvm-svn: 165173
* This patch moves from using a hard coded number (4) Jack Carter2012-10-031-2/+4
| | | | | | | | | | | | | for the number of bytes in a particular instruction to using const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); Desc.getSize() This is necessary with the advent of 16 bit instructions with mips16 and micromips. It is also puts Mips in compliance with the other targets for getting instruction size. llvm-svn: 165171
* tblgen: Remove last traces of old TableGenMain API.Sean Silva2012-10-033-36/+1
| | | | llvm-svn: 165168
* tblgen: Put new TableGenMain API in place.Sean Silva2012-10-031-0/+19
| | | | | | | | In order to avoid rev-lock with Clang when moving to the new API, also preserve the current API temporarily and insert a shim to implement the new API in terms of the old. llvm-svn: 165165
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