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* First pass at supporting relocations. Relocations are written correctly toNate Begeman2006-09-084-64/+163
| | | | | | | the file now, however the relocated address is currently wrong. Fixing that will require some deep pondering. llvm-svn: 30207
* Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndexEvan Cheng2006-09-081-6/+11
| | | | | | in addition to immediate operands. llvm-svn: 30205
* Non-allocatable physregs can be killed and dead, but don't treat them asChris Lattner2006-09-081-0/+6
| | | | | | safe for later allocation. This fixes McCat/18-imp with llc-beta. llvm-svn: 30204
* This fixes Benchmarks/Prolangs-C/unix-smailChris Lattner2006-09-081-0/+2
| | | | llvm-svn: 30198
* Fix a bunch of llc-beta failures on x86 yesterday. Don't allow selectionChris Lattner2006-09-081-17/+42
| | | | | | | of unallocatable registers, just because an alias is allocatable. We were picking registers like SIL just because ESI was being used. llvm-svn: 30197
* implement shl and sraRafael Espindola2006-09-081-0/+12
| | | | llvm-svn: 30191
* Use __USER_LABEL_PREFIX__ to get the prefix added by the current host.Chris Lattner2006-09-081-15/+14
| | | | llvm-svn: 30190
* add the eor (xor) instructionRafael Espindola2006-09-081-0/+5
| | | | llvm-svn: 30189
* Missing tabJim Laskey2006-09-081-1/+1
| | | | llvm-svn: 30188
* implement unconditional branchesRafael Espindola2006-09-081-0/+4
| | | | | | fix select.ll llvm-svn: 30186
* Remove TEST64mr. It's same as TEST64rm since and is commutative.Evan Cheng2006-09-081-3/+0
| | | | llvm-svn: 30178
* Committing X86-64 support.Evan Cheng2006-09-0825-462/+3603
| | | | llvm-svn: 30177
* We actually do support object file writing, so don't return true (error)Nate Begeman2006-09-081-3/+1
| | | | llvm-svn: 30173
* - Identify a vector_shuffle that can be turned into an undef, e.g.Evan Cheng2006-09-081-15/+41
| | | | | | | | | shuffle V1, <undef>, <undef, undef, 4, 5> - Fix some suspicious logic into LowerVectorShuffle that cause less than optimal code by failing to identify MOVL (move to lowest element of a vector). llvm-svn: 30171
* 1. Remove condition on delete.Jim Laskey2006-09-0713-37/+57
| | | | | | | | 2. Protect and outline createTargetAsmInfo. 3. Misc. kruft. llvm-svn: 30169
* Untabify.Devang Patel2006-09-071-3/+3
| | | | llvm-svn: 30168
* Use iterative do-while loop instead of recursive DFSPass calls toDevang Patel2006-09-071-16/+29
| | | | | | reduce amount of stack space used at runtime. llvm-svn: 30167
* add a new value for the command line optnChris Lattner2006-09-071-1/+1
| | | | llvm-svn: 30165
* Fix a cross-build issue. The asmsyntax shouldn't be affected by the buildChris Lattner2006-09-071-8/+12
| | | | | | | host, it should be affected by the target. Allow the command line option to override in either case. llvm-svn: 30164
* Make target asm info a property of the target machine.Jim Laskey2006-09-0721-210/+79
| | | | llvm-svn: 30162
* Break out target asm info into separate files.Jim Laskey2006-09-0712-0/+437
| | | | llvm-svn: 30161
* Throttle back tail duplication to avoid creating really ugly sequences of code.Chris Lattner2006-09-071-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For Transforms/TailDup/if-tail-dup.ll, f.e., it produces: _foo: movl 8(%esp), %eax movl 4(%esp), %ecx testl $1, %ecx je LBB1_2 #cond_next LBB1_1: #cond_true movl $1, (%eax) LBB1_2: #cond_next testl $2, %ecx je LBB1_4 #cond_next10 LBB1_3: #cond_true6 movl $1, 4(%eax) LBB1_4: #cond_next10 testl $4, %ecx je LBB1_6 #cond_next18 LBB1_5: #cond_true14 movl $1, 8(%eax) LBB1_6: #cond_next18 testl $8, %ecx je LBB1_8 #return LBB1_7: #cond_true22 movl $1, 12(%eax) ret LBB1_8: #return ret instead of: _foo: movl 4(%esp), %eax testl $2, %eax sete %cl movl 8(%esp), %edx testl $1, %eax je LBB1_2 #cond_next LBB1_1: #cond_true movl $1, (%edx) testb %cl, %cl jne LBB1_4 #cond_next10 jmp LBB1_3 #cond_true6 LBB1_2: #cond_next testb %cl, %cl jne LBB1_4 #cond_next10 LBB1_3: #cond_true6 movl $1, 4(%edx) testl $4, %eax je LBB1_6 #cond_next18 jmp LBB1_5 #cond_true14 LBB1_4: #cond_next10 testl $4, %eax je LBB1_6 #cond_next18 LBB1_5: #cond_true14 movl $1, 8(%edx) testl $8, %eax je LBB1_8 #return jmp LBB1_7 #cond_true22 LBB1_6: #cond_next18 testl $8, %eax je LBB1_8 #return LBB1_7: #cond_true22 movl $1, 12(%edx) ret LBB1_8: #return ret llvm-svn: 30158
* Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patternsChris Lattner2006-09-072-29/+35
| | | | | | | | | | | | | | | using test, which provides nice simplifications like: - movl %edi, %ecx - andl $2, %ecx - cmpl $0, %ecx + testl $2, %edi je LBB1_11 #cond_next90 There are a couple of dagiselemitter deficiencies that this exposes, they will be handled later. llvm-svn: 30156
* Some notes on better load folding we could doChris Lattner2006-09-071-0/+2
| | | | llvm-svn: 30155
* Consistency.Evan Cheng2006-09-071-1/+1
| | | | llvm-svn: 30152
* Fix pasto that was breaking x86 tests.Evan Cheng2006-09-071-2/+2
| | | | llvm-svn: 30151
* Add new option to leave asm names aloneChris Lattner2006-09-071-1/+6
| | | | llvm-svn: 30149
* Make the x86 asm flavor part of the subtarget info.Jim Laskey2006-09-073-24/+34
| | | | llvm-svn: 30146
* Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel insertedChris Lattner2006-09-071-15/+32
| | | | | | too many phi operands when lowering a switch to branches in some cases. llvm-svn: 30142
* Clean up.Evan Cheng2006-09-071-2/+2
| | | | llvm-svn: 30140
* Watch out for variable_ops instructions.Evan Cheng2006-09-061-1/+1
| | | | llvm-svn: 30135
* Variable ops instructions may ignore the last few operands for code emission.Evan Cheng2006-09-061-1/+3
| | | | llvm-svn: 30134
* Oops - forgot to update banner.Jim Laskey2006-09-061-1/+1
| | | | llvm-svn: 30131
* Separate target specifc asm properties from asm printers.Jim Laskey2006-09-061-0/+74
| | | | llvm-svn: 30127
* Separate target specific asm properties from the asm printers.Jim Laskey2006-09-0615-376/+357
| | | | llvm-svn: 30126
* add the orr instructionRafael Espindola2006-09-061-0/+4
| | | | llvm-svn: 30125
* Only call isUse/isDef on register operandsEvan Cheng2006-09-051-3/+3
| | | | llvm-svn: 30122
* Bugfix to work with the two-addr changes that have been made in the tree ↵Chris Lattner2006-09-051-1/+2
| | | | | | recently llvm-svn: 30121
* Only call isUse/isDef on register operandsChris Lattner2006-09-052-13/+7
| | | | llvm-svn: 30118
* Don't call isDef on non-registersChris Lattner2006-09-051-1/+2
| | | | llvm-svn: 30117
* Fix Duraid's changes to work when TLI is null. This fixes the failingChris Lattner2006-09-051-3/+7
| | | | | | lowerinvoke regtests. llvm-svn: 30115
* Change the default to 0, which means 'default'.Chris Lattner2006-09-051-1/+1
| | | | llvm-svn: 30114
* Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.llEvan Cheng2006-09-051-2/+2
| | | | llvm-svn: 30113
* JIT encoding bug.Evan Cheng2006-09-051-1/+1
| | | | llvm-svn: 30112
* Update the X86 JIT to make it work with the new two-addr changes. This alsoChris Lattner2006-09-051-41/+52
| | | | | | adds assertions that check to make sure every operand gets emitted. llvm-svn: 30110
* Completely eliminate def&use operands. Now a register operand is EITHER aChris Lattner2006-09-058-51/+61
| | | | | | def operand or a use operand. llvm-svn: 30109
* Fix a long-standing wart in the code generator: two-address instruction loweringChris Lattner2006-09-058-596/+572
| | | | | | | | | | | | | | | actually *removes* one of the operands, instead of just assigning both operands the same register. This make reasoning about instructions unnecessarily complex, because you need to know if you are before or after register allocation to match up operand #'s with the target description file. Changing this also gets rid of a bunch of hacky code in various places. This patch also includes changes to fold loads into cmp/test instructions in the X86 backend, along with a significant simplification to the X86 spill folding code. llvm-svn: 30108
* jmp_bufs are this big on alpha.Andrew Lenharth2006-09-051-0/+3
| | | | llvm-svn: 30107
* add support for returning 64bit valuesRafael Espindola2006-09-041-0/+9
| | | | llvm-svn: 30103
* Fix some X86 JIT failures. This should really come from TargetJITInfo.Chris Lattner2006-09-041-0/+3
| | | | llvm-svn: 30102
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