|  | Commit message (Collapse) | Author | Age | Files | Lines | 
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| | llvm-svn: 53156 | 
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| | llvm-svn: 53154 | 
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| | llvm-svn: 53151 | 
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| | that fixed problems in EmitStackConvert where the source and target type
have different alignment by creating a stack slot with the max
alignment of source and target type.
llvm-svn: 53150 | 
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| | important.
- Cleanup in the Subtarget info with addition of new features, not all support
  yet, but they allow the future inclusion of features easier. Among new features,
  we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
  integer
  and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
  aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
  sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
  FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
  FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
  return copy, no homing location within EABI, non 32-bit stack objects
  arguments, and asm constraint for float.
llvm-svn: 53146 | 
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| | hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes.  No change if the
new LegalizeTypes infrastructure is not turned on.
llvm-svn: 53137 | 
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| | moves in order to get correct debug info.  Since
I can't imagine how any target could possibly
be any different, I've just stripped out the
option: now all the world's like Darwin!
llvm-svn: 53134 | 
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| | llvm-svn: 53123 | 
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| | slow the compiler down at -O0 some 30% or more. Ooops.
llvm-svn: 53120 | 
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| | llvm-svn: 53110 | 
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| | llvm-svn: 53109 | 
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| | there won't be a value number match.  This speeds up GVN on a case where there are very few redundancies by ~25%.
llvm-svn: 53108 | 
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| | not handle all cases and keeps invalid dom info around some cases, which misleads other passes down stream.
Right now, dom info is recaluclated in the end if the loop is switched.
llvm-svn: 53106 | 
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| | because, as Eli pointed out, SimplifyCFG already does this.
llvm-svn: 53104 | 
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| | propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
llvm-svn: 53097 | 
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| | llvm-svn: 53092 | 
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| | processed separately. Honour such situation and emit PIC relocations properly
in such case.
llvm-svn: 53091 | 
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| | llvm-svn: 53090 | 
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| | llvm-svn: 53089 | 
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| | llvm-svn: 53088 | 
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| | llvm-svn: 53087 | 
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| | llvm-svn: 53086 | 
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| | llvm-svn: 53085 | 
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| | 254.gap failure was not due to this mod.
llvm-svn: 53068 | 
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| | llvm-svn: 53066 | 
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| | llvm-svn: 53065 | 
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| | llvm-svn: 53064 | 
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| | llvm-svn: 53063 | 
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| | llvm-svn: 53062 | 
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| | instructionChanged. That is, it only update the VarInfo.kills if the new instruction is known to have the correct dead and kill markers.
- CommuteInstruction copies kill / dead markers over to new instruction. So use replaceKillInstruction instead.
llvm-svn: 53061 | 
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| | llvm-svn: 53060 | 
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| | TargetInstrInfo::convertToThreeAddressInstruction
Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.
llvm-svn: 53058 | 
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| | SelectionDAG::SelectNodeTo in the instruction selector. This
updates existing nodes in place instead of creating new ones.
Go back to selecting ISD::DBG_LABEL nodes into
TargetInstrInfo::DBG_LABEL nodes instead of leaving them
unselected, now that SelectNodeTo allows us to update them
in place.
llvm-svn: 53057 | 
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| | llvm-svn: 53052 | 
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| | llvm-svn: 53050 | 
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| | needs to update it if it's already around.
llvm-svn: 53049 | 
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| | set.
Also, move large sets and vectors out of instance variables and onto the stack,
and give them more reasonable sizes.
llvm-svn: 53044 | 
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| | llvm-svn: 53040 | 
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| | part of PR2509.
llvm-svn: 53038 | 
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| | to be passed the list of value types, and use this
where appropriate.  Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.
llvm-svn: 53035 | 
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| | with a huge "size" parameter is actually quite inefficient.
llvm-svn: 53034 | 
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| | unreachable blocks.
llvm-svn: 53032 | 
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| | have different alignment by creating a stack slot with the max
alignment of source and target type.
llvm-svn: 53031 | 
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| | The dag combiner can produce a shift of i1 when folding icmp i1's.
llvm-svn: 53030 | 
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| | llvm-svn: 53012 | 
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| | This makes sure that all new nodes are expunged, not
just those the top node of a new subtree.
llvm-svn: 53011 | 
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| | - Code clean up.
llvm-svn: 53010 | 
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| | Solanki!
llvm-svn: 53008 | 
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| | llvm-svn: 53007 | 
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| | llvm-svn: 53006 |