| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Add v16i16 type to VR256 class | Bruno Cardoso Lopes | 2011-07-21 | 1 | -2/+2 | |
| | | | | | llvm-svn: 135658 | |||||
| * | Move code around. No functionality changes | Bruno Cardoso Lopes | 2011-07-21 | 1 | -65/+78 | |
| | | | | | llvm-svn: 135657 | |||||
| * | Tidy up code | Bruno Cardoso Lopes | 2011-07-21 | 1 | -15/+5 | |
| | | | | | llvm-svn: 135656 | |||||
| * | LSR, correct fix for rdar://9786536. Silly casting bug. | Andrew Trick | 2011-07-21 | 1 | -2/+2 | |
| | | | | | llvm-svn: 135654 | |||||
| * | LSR must sometimes sign-extend before generating double constants. | Andrew Trick | 2011-07-21 | 1 | -3/+10 | |
| | | | | | | | rdar://9786536 llvm-svn: 135650 | |||||
| * | Mark instructions which are part of the frame setup with the ↵ | Bill Wendling | 2011-07-21 | 1 | -9/+20 | |
| | | | | | | | MachineInstr::FrameSetup flag. llvm-svn: 135645 | |||||
| * | LSR crashes on an empty IVUsers list. | Andrew Trick | 2011-07-21 | 1 | -0/+3 | |
| | | | | | | | rdar://9786536 llvm-svn: 135644 | |||||
| * | X86 is the only target that uses coff format. This should fixes test ↵ | Evan Cheng | 2011-07-20 | 1 | -2/+3 | |
| | | | | | | | failures running on Windows, Cygwin, or MingW hosts. llvm-svn: 135639 | |||||
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵ | Evan Cheng | 2011-07-20 | 29 | -192/+200 | |
| | | | | | | | ARM MC code from target. llvm-svn: 135636 | |||||
| * | Remove unused function. | Bill Wendling | 2011-07-20 | 1 | -64/+0 | |
| | | | | | llvm-svn: 135635 | |||||
| * | Remove the now defunct getCompactUnwindEncoding method from the frame ↵ | Bill Wendling | 2011-07-20 | 2 | -118/+0 | |
| | | | | | | | lowering code. llvm-svn: 135634 | |||||
| * | Refactor. | Devang Patel | 2011-07-20 | 2 | -31/+42 | |
| | | | | | llvm-svn: 135633 | |||||
| * | There are two ways to map a variable to its lexical scope. Lexical scope ↵ | Devang Patel | 2011-07-20 | 2 | -2/+16 | |
| | | | | | | | information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode. llvm-svn: 135629 | |||||
| * | Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where ↵ | Eli Friedman | 2011-07-20 | 5 | -1/+4 | |
| | | | | | | | it's used and not included where it isn't. llvm-svn: 135628 | |||||
| * | While emitting constant value, look through derived type and use underlying ↵ | Devang Patel | 2011-07-20 | 1 | -14/+23 | |
| | | | | | | | basic type to determine size and signness of the constant value. llvm-svn: 135627 | |||||
| * | ARM PKH shift ammount operand printing tweaks. | Jim Grosbach | 2011-07-20 | 6 | -18/+39 | |
| | | | | | | | | | | | Move the shift operator and special value (32 encoded as 0 for PKHTB) handling into the instruction printer. This cleans up a bit of the disassembler special casing for these instructions, more easily handles not printing the operand at all for "lsl #0" and prepares for correct asm parsing of these operands. llvm-svn: 135626 | |||||
| * | Bring LICM into compliance with the new "Memory Model for Concurrent ↵ | Eli Friedman | 2011-07-20 | 1 | -18/+30 | |
| | | | | | | | Operations" in LangRef. llvm-svn: 135625 | |||||
| * | Tidy up a bit. | Jim Grosbach | 2011-07-20 | 3 | -12/+7 | |
| | | | | | | | | Move common definitions for ARM and Thumb2 into ARMInstrFormats.td and rename them to be a bit more descriptive that they're for the PKH instructions. llvm-svn: 135617 | |||||
| * | ARM: Tidy up representation of PKH instruction. | Jim Grosbach | 2011-07-20 | 5 | -37/+35 | |
| | | | | | | | | | | The shift type is implied by the instruction (PKHBT vs. PKHTB) and so shouldn't be also encoded as part of the shift value immediate. Otherwise we're able to represent invalid instructions, plus it needlessly complicates the representation. Preparatory work for asm parsing of these instructions. llvm-svn: 135616 | |||||
| * | Fix cmake again :) | Benjamin Kramer | 2011-07-20 | 1 | -1/+0 | |
| | | | | | llvm-svn: 135613 | |||||
| * | Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc. | Evan Cheng | 2011-07-20 | 19 | -213/+73 | |
| | | | | | | | | There is still a bit more refactoring left to do in Targets. But we are now very close to fixing all the layering issues in MC. llvm-svn: 135611 | |||||
| * | Extend the hack for _GLOBAL_OFFSET_TABLE_ slightly; PR10389. | Eli Friedman | 2011-07-20 | 1 | -1/+3 | |
| | | | | | llvm-svn: 135607 | |||||
| * | ARM assembly parsing of MUL instruction. | Jim Grosbach | 2011-07-20 | 1 | -1/+2 | |
| | | | | | | | | Correctly handle 's' bit and predication suffices. Add parsing and encoding tests. llvm-svn: 135596 | |||||
| * | PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS. | Eli Friedman | 2011-07-20 | 1 | -5/+5 | |
| | | | | | llvm-svn: 135595 | |||||
| * | Initialize the EHFrameSection pointer to zero. | Benjamin Kramer | 2011-07-20 | 1 | -0/+1 | |
| | | | | | | | This should fix the spurious buildbot errors. llvm-svn: 135594 | |||||
| * | Fix a GCC warning. | Jay Foad | 2011-07-20 | 1 | -2/+2 | |
| | | | | | llvm-svn: 135581 | |||||
| * | - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. | Evan Cheng | 2011-07-20 | 47 | -195/+184 | |
| | | | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580 | |||||
| * | Include MCRegisterInfo to eliminate a compilation warning. | Evan Cheng | 2011-07-20 | 1 | -1/+2 | |
| | | | | | llvm-svn: 135575 | |||||
| * | Fix the CMake build. | Francois Pichet | 2011-07-20 | 1 | -0/+1 | |
| | | | | | llvm-svn: 135573 | |||||
| * | Add MCObjectFileInfo and sink the MCSections initialization code from | Evan Cheng | 2011-07-20 | 17 | -582/+595 | |
| | | | | | | | | | TargetLoweringObjectFileImpl down to MCObjectFileInfo. TargetAsmInfo is done to one last method. It's *almost* gone! llvm-svn: 135569 | |||||
| * | indvars: Added getInsertPointForUses to find a valid place to truncate the IV. | Andrew Trick | 2011-07-20 | 1 | -15/+32 | |
| | | | | | llvm-svn: 135568 | |||||
| * | indvars -disable-iv-rewrite: Add NarrowIVDefUse to cache def-use | Andrew Trick | 2011-07-20 | 1 | -54/+61 | |
| | | | | | | | | info. Holding Use* pointers is bad form even though it happened to work in this case. llvm-svn: 135566 | |||||
| * | X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, ↵ | NAKAMURA Takumi | 2011-07-20 | 1 | -1/+2 | |
| | | | | | | | to appease test/CodeGen/X86 on cygwin. llvm-svn: 135564 | |||||
| * | Extra semi-colon. | Eric Christopher | 2011-07-20 | 1 | -1/+1 | |
| | | | | | llvm-svn: 135561 | |||||
| * | indvars -disable-iv-rewrite fix: derived GEP IVs | Andrew Trick | 2011-07-20 | 1 | -0/+6 | |
| | | | | | llvm-svn: 135558 | |||||
| * | Don't leak CodeGenInfos. | Benjamin Kramer | 2011-07-20 | 1 | -1/+3 | |
| | | | | | llvm-svn: 135555 | |||||
| * | Change name of class. | Akira Hatanaka | 2011-07-20 | 1 | -23/+23 | |
| | | | | | llvm-svn: 135550 | |||||
| * | Define classes for definitions of atomic instructions. | Akira Hatanaka | 2011-07-20 | 1 | -106/+42 | |
| | | | | | llvm-svn: 135546 | |||||
| * | Lower memory barriers to sync instructions. | Akira Hatanaka | 2011-07-19 | 3 | -2/+28 | |
| | | | | | llvm-svn: 135537 | |||||
| * | Fix an obvious typo that's preventing x86 (32-bit) from using .literal16. | Evan Cheng | 2011-07-19 | 1 | -1/+1 | |
| | | | | | llvm-svn: 135535 | |||||
| * | PR10386: Don't try to split an edge from an indirectbr. | Eli Friedman | 2011-07-19 | 1 | -2/+9 | |
| | | | | | llvm-svn: 135534 | |||||
| * | Tweak ARM assembly parsing and printing of MSR instruction. | Jim Grosbach | 2011-07-19 | 3 | -8/+19 | |
| | | | | | | | | | The system register spec should be case insensitive. The preferred form for output with mask values of 4, 8, and 12 references APSR rather than CPSR. Update and tidy up tests accordingly. llvm-svn: 135532 | |||||
| * | Distinguish between two copies of one inlined variable. | Devang Patel | 2011-07-19 | 3 | -3/+25 | |
| | | | | | llvm-svn: 135528 | |||||
| * | ARM assembly parsing of MRS instruction. | Jim Grosbach | 2011-07-19 | 2 | -7/+11 | |
| | | | | | | | | Teach the parser to recognize the APSR and SPSR system register names. Add and update tests accordingly. llvm-svn: 135527 | |||||
| * | Enhance the FixedLengthDecoder to be able to generate plausible-looking ↵ | Owen Anderson | 2011-07-19 | 1 | -2/+11 | |
| | | | | | | | decoders for ARM. llvm-svn: 135524 | |||||
| * | Change variable name. | Akira Hatanaka | 2011-07-19 | 1 | -3/+3 | |
| | | | | | llvm-svn: 135522 | |||||
| * | ARM assembly parsing for MRC/MRC2/MRRC/MRRC2. | Jim Grosbach | 2011-07-19 | 2 | -9/+8 | |
| | | | | | | | Add range checking to the immediate operands. Update tests accordingly. llvm-svn: 135521 | |||||
| * | Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or | Akira Hatanaka | 2011-07-19 | 1 | -13/+14 | |
| | | | | | | | ANDi, when the instruction does not have any immediate operands. llvm-svn: 135520 | |||||
| * | Use descriptive variable names. | Akira Hatanaka | 2011-07-19 | 1 | -154/+177 | |
| | | | | | llvm-svn: 135514 | |||||
| * | ARM assembly parsing for MOV (register). | Jim Grosbach | 2011-07-19 | 1 | -19/+21 | |
| | | | | | | | | | Correct the handling of the 's' suffix when parsing ARM mode. It's only a truly separate opcode in Thumb. Add test cases to make sure we handle the s and condition suffices correctly, including diagnostics. llvm-svn: 135513 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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