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* Allow Post-RA LICM to hoist reserved register reads.Jakob Stoklund Olesen2012-02-111-0/+11
| | | | | | | | When using register masks, registers like %rip are clobbered by the register mask. LICM should still be able to hoist instructions reading %rip from a loop containing calls. llvm-svn: 150288
* Handle register masks in local live range splitting.Jakob Stoklund Olesen2012-02-111-0/+25
| | | | | | | Again the goal is to produce identical assembly with register mask operands enabled. llvm-svn: 150287
* Don't read PreRegAlloc before it is initialized.Jakob Stoklund Olesen2012-02-111-6/+6
| | | | llvm-svn: 150286
* Revert r150222, as the clang driver now handles this properly.Jim Grosbach2012-02-101-11/+3
| | | | | | | Now that the clang driver passes the CPU and feature information to the backend when processing assembly files (150273), this isn't necessary. llvm-svn: 150274
* Add a static MachineOperand::clobbersPhysReg().Jakob Stoklund Olesen2012-02-101-7/+2
| | | | | | | | It can be necessary to detach a register mask pointer from its MachineOperand. This method is convenient for checking clobbered physregs on a detached bitmask pointer. llvm-svn: 150261
* Add register mask support to InterferenceCache.Jakob Stoklund Olesen2012-02-103-5/+42
| | | | | | | | | | | | | | | | This makes global live range splitting behave identically with and without register mask operands. This is not necessarily the best way of using register masks for live range splitting. It would be more efficient to first split global live ranges around calls (i.e., register masks), and reserve the fine grained per-physreg interference guidance for global live ranges that do not cross calls. For now the goal is to produce identical assembly when enabling register masks. llvm-svn: 150259
* Remove unused variable.Jakob Stoklund Olesen2012-02-101-2/+1
| | | | llvm-svn: 150258
* Make valgrind happy.Jason W Kim2012-02-101-2/+2
| | | | llvm-svn: 150251
* Update BBVectorize to use aliasesUnknownInst.Hal Finkel2012-02-101-9/+3
| | | | | | | | This allows BBVectorize to check the "unknown instruction" list in the alias sets. This is important to prevent instruction fusing from reordering function calls. Resolves PR11920. llvm-svn: 150250
* Have AliasSet::aliasesUnknownInst use pointer TBAA info when availableHal Finkel2012-02-101-1/+3
| | | | llvm-svn: 150249
* Fix PR11948: the result type of an icmp may be a vector of boolean -Duncan Sands2012-02-101-0/+5
| | | | | | don't assume it is a boolean. llvm-svn: 150247
* Put instruction names into an indexed string table on the side, removing a ↵Benjamin Kramer2012-02-102-2/+5
| | | | | | | | | pointer from MCInstrDesc. Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64. llvm-svn: 150245
* comment grammarAndrew Trick2012-02-101-1/+1
| | | | llvm-svn: 150233
* unnecessary includeAndrew Trick2012-02-101-1/+0
| | | | llvm-svn: 150228
* PTX no longer needs to provide its own backend.Andrew Trick2012-02-102-255/+21
| | | | llvm-svn: 150227
* RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-1015-109/+147
| | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
* whitespaceAndrew Trick2012-02-101-11/+11
| | | | llvm-svn: 150225
* Remove unused 'isAlias' parameter.Lang Hames2012-02-101-8/+3
| | | | llvm-svn: 150224
* ARM on darwin, v6 implies the presence of VFP for the assembler.Jim Grosbach2012-02-101-3/+11
| | | | | | rdar://10838899 llvm-svn: 150222
* Constrain the regmask search space for local live ranges.Jakob Stoklund Olesen2012-02-101-3/+13
| | | | | | | When checking a local live range for interference, restrict the binary search to the single block. llvm-svn: 150220
* Cache basic block boundaries for faster RegMaskSlots access.Jakob Stoklund Olesen2012-02-101-0/+9
| | | | | | | Provide API to get a list of register mask slots and bits in a basic block. llvm-svn: 150219
* Optimize LiveIntervals::intervalIsInOneMBB().Jakob Stoklund Olesen2012-02-101-17/+22
| | | | | | | | No looping and binary searches necessary. Return a pointer to the containing block instead of just a bool. llvm-svn: 150218
* Cache iterators. Some of these are expensive to create.Benjamin Kramer2012-02-101-14/+16
| | | | llvm-svn: 150214
* Change default error_code ctor to a 'named ctor' so it's more self-documenting.David Blaikie2012-02-096-59/+54
| | | | | | | | | | | Unify default construction of error_code uses on this idiom so that users don't feel compelled to make static globals for naming convenience. (unfortunately I couldn't make the original ctor private as some APIs don't return their result, instead using an out parameter (that makes sense to default construct) - which is a bit of a pity. I did, however, find/fix some cases of unnecessary default construction of error_code before I hit the unfixable cases) llvm-svn: 150197
* Add register mask support to RAGreedy.Jakob Stoklund Olesen2012-02-091-2/+25
| | | | | | | | This only adds the interference checks required for correctness. We still need to take advantage of register masks for the interference driven live range splitting. llvm-svn: 150191
* Tweak comment readability and grammar.Benjamin Kramer2012-02-091-2/+2
| | | | llvm-svn: 150183
* Test for commit access.Sirish Pande2012-02-091-2/+2
| | | | llvm-svn: 150178
* GlobalOpt: Be more aggressive about elminating side-effect free static dtors.Benjamin Kramer2012-02-091-4/+5
| | | | | | | | | GlobalOpt runs early in the pipeline (before inlining) and complex class hierarchies often introduce bitcasts or GEPs which weren't optimized away. Teach it to ignore side-effect free instructions instead of depending on other passes to remove them. llvm-svn: 150174
* Teach the MC and disassembler about SoftFail, and hook it up to ↵James Molloy2012-02-092-0/+9
| | | | | | UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage. llvm-svn: 150169
* More tweaks to get the size of the X86 disassembler tables down.Craig Topper2012-02-092-0/+7
| | | | llvm-svn: 150167
* Flatten some of the arrays in the X86 disassembler tables to reduce space ↵Craig Topper2012-02-093-7/+6
| | | | | | needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953. llvm-svn: 150161
* Preserve physreg kills in MachineBasicBlock::SplitCriticalEdge.Lang Hames2012-02-091-4/+7
| | | | | | | Failure to preserve kills was causing LiveIntervals to miss some EFLAGS live ranges. Unfortunately I've been unable to reduce a good test case yet. llvm-svn: 150152
* Fix kill flags when moving instructions using LiveIntervals::moveInstr(...).Lang Hames2012-02-091-6/+23
| | | | llvm-svn: 150150
* Remove assertion. Not all use operands are reads.Lang Hames2012-02-091-3/+0
| | | | llvm-svn: 150149
* Improve TargetPassConfig. No intended functionality.Andrew Trick2012-02-091-98/+149
| | | | | | | Split CodeGen into stages. Distinguish between optimization and correctness. llvm-svn: 150122
* commentAndrew Trick2012-02-091-1/+1
| | | | llvm-svn: 150121
* Remove static initializer from DataStream.cppDavid Blaikie2012-02-091-12/+11
| | | | | | | | | | | If someone would prefer a clear name for the 'success' error_value we could come up with one - potentially just a 'named constructor' style 'error_value::success()' to make this expression more self-documenting. If I see this come up in other cases I'll certainly consider it. One step along the way to resolving PR11944. llvm-svn: 150120
* Erase dead copies that are clobbered by a call.Jakob Stoklund Olesen2012-02-091-5/+17
| | | | | | This does make a difference, at least when using RABasic. llvm-svn: 150118
* Handle register masks when searching for EFLAGS clobbers.Jakob Stoklund Olesen2012-02-091-0/+6
| | | | | | | Calls clobber the flags, but when using register masks there is no EFLAGS<imp-def> operand. llvm-svn: 150117
* Never delete instructions that define reserved registers.Jakob Stoklund Olesen2012-02-091-6/+10
| | | | | | | | | | | I think this was already the intention, but DeadMachineInstructionElim was accidentally tracking the liveness of reserved registers. Now, instructions with reserved defs are never deleted. This prevents the call stack adjustment instructions from getting deleted when enabling register masks. llvm-svn: 150116
* Handle register masks in MachineCopyPropagation.Jakob Stoklund Olesen2012-02-081-0/+17
| | | | | | | | For simplicity, treat calls with register masks as basic block boundaries. This means we can't copy propagate callee-saved registers across calls, but I don't think that is a big deal. llvm-svn: 150108
* [asan] unpoison the stack before every noreturn call. Fixes asan issue 37. ↵Kostya Serebryany2012-02-081-2/+17
| | | | | | llvm part llvm-svn: 150102
* Codegen pass definition cleanup. No functionality.Andrew Trick2012-02-0825-177/+106
| | | | | | | | | | | | | Moving toward a uniform style of pass definition to allow easier target configuration. Globally declare Pass ID. Globally declare pass initializer. Use INITIALIZE_PASS consistently. Add a call to the initializer from CodeGen.cpp. Remove redundant "createPass" functions and "getPassName" methods. While cleaning up declarations, cleaned up comments (sorry for large diff). llvm-svn: 150100
* Move pass configuration out of pass constructors: MachineLICM.Andrew Trick2012-02-082-5/+6
| | | | llvm-svn: 150099
* whitespaceAndrew Trick2012-02-081-11/+11
| | | | llvm-svn: 150098
* Move pass configuration out of pass constructors: StackSlotColoring.Andrew Trick2012-02-083-4/+4
| | | | llvm-svn: 150097
* Move pass configuration out of pass constructors: PostRAScheduler.Andrew Trick2012-02-083-8/+10
| | | | llvm-svn: 150096
* Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick2012-02-085-20/+28
| | | | llvm-svn: 150095
* whitespaceAndrew Trick2012-02-088-80/+80
| | | | llvm-svn: 150094
* Added TargetPassConfig::setOptAndrew Trick2012-02-083-1/+14
| | | | llvm-svn: 150093
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