| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | [PowerPC 3/4] Little-endian adjustments for VSX vector shuffle | Bill Schmidt | 2014-12-09 | 1 | -0/+9 |
| * | [PowerPC 2/4] Little-endian adjustments for VSX insert/extract operations | Bill Schmidt | 2014-12-09 | 1 | -0/+14 |
| * | [AVX512] Added VPBROADCAST{BWDQ} (Load with Broadcast Integer Data from Gener... | Robert Khasanov | 2014-12-09 | 1 | -23/+33 |
| * | [CodeGenPrepare] Split branch conditions into multiple conditional branches. | Juergen Ributzka | 2014-12-09 | 1 | -1/+209 |
| * | Move function to obtain branch weights into the BranchInst class. NFC. | Juergen Ributzka | 2014-12-09 | 2 | -26/+26 |
| * | [PowerPC 1/4] Little-endian adjustments for VSX loads/stores | Bill Schmidt | 2014-12-09 | 3 | -2/+202 |
| * | Move method out of line to make buildbot happy. | Rafael Espindola | 2014-12-09 | 1 | -0/+2 |
| * | Don't lookup an object symbol name in the module. | Rafael Espindola | 2014-12-09 | 1 | -5/+2 |
| * | [x86] Fix the test to actually test things for the CPU names, add the | Chandler Carruth | 2014-12-09 | 1 | -0/+4 |
| * | Removing an unused variable to silence a -Wunused-but-set-variable warning. NFC. | Aaron Ballman | 2014-12-09 | 1 | -2/+0 |
| * | Fix modified immediate bug reported by MC Hammer. | Asiri Rathnayake | 2014-12-09 | 1 | -11/+6 |
| * | [x86] Bring some sanity to the x86 CPU processor definitions. | Chandler Carruth | 2014-12-09 | 1 | -61/+139 |
| * | Teach instcombine to canonicalize "element extraction" from a load of an | Chandler Carruth | 2014-12-09 | 1 | -41/+349 |
| * | Skip declarations in the case of functions. | Michael Ilseman | 2014-12-09 | 1 | -0/+3 |
| * | AVX-512: Added some comments to ERI scalar intrinsics. | Elena Demikhovsky | 2014-12-09 | 2 | -6/+17 |
| * | Fix a few instances found in SelectionDAG where we were not handling F16 at p... | Owen Anderson | 2014-12-09 | 2 | -3/+5 |
| * | test commit (spelling correction) | Mohit K. Bhakkad | 2014-12-09 | 1 | -1/+1 |
| * | [X86] Convert esp-relative movs of function arguments into pushes, step 1 | Michael Kuperstein | 2014-12-09 | 2 | -4/+125 |
| * | Reland r223754 | David Majnemer | 2014-12-09 | 1 | -6/+9 |
| * | Revert "AsmParser: Reject invalid mismatch between forward ref and def" | David Majnemer | 2014-12-09 | 1 | -8/+5 |
| * | AsmParser: Reject invalid mismatch between forward ref and def | David Majnemer | 2014-12-09 | 1 | -5/+8 |
| * | Restore r223709 as it was meant to be, and enable FeatureP8Vector for P8 | Bill Schmidt | 2014-12-09 | 1 | -2/+2 |
| * | Revert r223709, "[PowerPC]Activate FeatureVSX for the Power target", to unbre... | NAKAMURA Takumi | 2014-12-09 | 1 | -3/+5 |
| * | Handle early-clobber registers in the aggressive anti-dep breaker | Hal Finkel | 2014-12-09 | 1 | -0/+15 |
| * | R600/SI: Set MayStore = 0 on MUBUF loads | Tom Stellard | 2014-12-09 | 1 | -1/+1 |
| * | R600/SI: Move setting of the lds bit to the base MUBUF class | Tom Stellard | 2014-12-09 | 1 | -6/+9 |
| * | [Hexagon] Removing old def versions and replacing usages with versions that h... | Colin LeMahieu | 2014-12-08 | 5 | -182/+40 |
| * | MISched: Fix moving stores across barriers | Tom Stellard | 2014-12-08 | 1 | -6/+7 |
| * | [Hexagon] Adding any8, all8, and/or/xor/andn/orn/not predicate register forms... | Colin LeMahieu | 2014-12-08 | 1 | -0/+84 |
| * | [PowerPC]Activate FeatureVSX for the Power target | Bill Seurer | 2014-12-08 | 1 | -5/+3 |
| * | [PowerPC] Don't use a non-allocatable register to implement the 'cc' alias | Hal Finkel | 2014-12-08 | 2 | -9/+6 |
| * | [Hexagon] Adding xtype doubleword add, sub, and, or, xor and patterns. | Colin LeMahieu | 2014-12-08 | 1 | -46/+50 |
| * | [Hexagon] Adding xtype doubleword comparisons. Removing unused multiclass. | Colin LeMahieu | 2014-12-08 | 2 | -32/+50 |
| * | [Hexagon] Adding xtype parity, min, minu, max, maxu instructions. | Colin LeMahieu | 2014-12-08 | 4 | -0/+110 |
| * | [Hexagon] Adding xtype halfword add/sub ll/hl/lh/hh/sat/<<16 instructions. | Colin LeMahieu | 2014-12-08 | 1 | -2/+102 |
| * | R600/SI: Move continue after checking s_mov_b32. | Matt Arsenault | 2014-12-08 | 1 | -3/+3 |
| * | ConstantFold: Zero-sized globals might land on top of another global | David Majnemer | 2014-12-08 | 1 | -3/+15 |
| * | Lazily link GlobalVariables and GlobalAliases. | Rafael Espindola | 2014-12-08 | 1 | -119/+125 |
| * | [Hexagon] Adding add/sub with saturation. Removing unused def. Cleaning up ... | Colin LeMahieu | 2014-12-08 | 2 | -16/+22 |
| * | InstSimplify: Try to bring back the rest of r223583 | David Majnemer | 2014-12-08 | 1 | -2/+7 |
| * | [CompactUnwind] Fix register encoding logic | Bruno Cardoso Lopes | 2014-12-08 | 1 | -1/+1 |
| * | Don't crash when the key of a comdat is lazily linked. | Rafael Espindola | 2014-12-08 | 1 | -0/+9 |
| * | InstrProf: An intrinsic and lowering for instrumentation based profiling | Justin Bogner | 2014-12-08 | 4 | -0/+313 |
| * | AArch64: treat HFAs containing "half" types as blocks too. | Tim Northover | 2014-12-08 | 1 | -0/+5 |
| * | [X86] Improved tablegen patters for matching TZCNT/LZCNT. | Andrea Di Biagio | 2014-12-08 | 1 | -24/+29 |
| * | [Hexagon] Adding combine reg, reg with predicated forms. | Colin LeMahieu | 2014-12-08 | 1 | -0/+7 |
| * | [Hexagon] Adding packhl instruction. | Colin LeMahieu | 2014-12-08 | 1 | -0/+6 |
| * | [mips] Add Mips-specific CCIf's for accessing the MipsCCState. NFC. | Daniel Sanders | 2014-12-08 | 1 | -13/+28 |
| * | [X86] Improved lowering of packed v8i16 vector shifts by non-constant count. | Andrea Di Biagio | 2014-12-08 | 1 | -10/+20 |
| * | Move the ValueMap lookup inside linkFunctionBody. NFC. | Rafael Espindola | 2014-12-08 | 1 | -16/+15 |
