summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* [X86] Put no-op ADJCALLSTACK markers around all dynamic loweringsReid Kleckner2015-12-031-40/+29
| | | | | | | | | | | | | | | | | Summary: These ADJCALLSTACK markers don't generate code, but they keep dynamic alloca code that calls chkstk out of the prologue. This slightly pessimizes inalloca calls by preventing some register copy coalescing, but I can live with that. Reviewers: qcolombet Subscribers: hans, llvm-commits Differential Revision: http://reviews.llvm.org/D15200 llvm-svn: 254645
* Test commit.Easwaran Raman2015-12-031-2/+2
| | | | | | Remove blank spaces at the end of comments llvm-svn: 254630
* [WinEH] Avoid infinite loop in BranchFolding for multiple single block funcletsAndrew Kaylor2015-12-031-0/+8
| | | | | | Differential Revision: http://reviews.llvm.org/D14996 llvm-svn: 254629
* dwarfdump: Correctly indentify the indicies for DWP recordsDavid Blaikie2015-12-031-1/+1
| | | | | | The indicies are one-based, not zero-based, per the spec. llvm-svn: 254626
* [ThinLTO] Appending linkage fixesTeresa Johnson2015-12-031-5/+9
| | | | | | | | | | | | | | | | | | | | Summary: Fix import from module with appending var, which cannot be imported. The first fix is to remove an overly-aggressive error check. The second fix is to deal with restructuring introduced to the module linker yesterday in r254418 (actually, this fix was included already in r254559, just added some additional cleanup). Test by Mehdi Amini. Reviewers: joker.eph, rafael Subscribers: joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D15156 llvm-svn: 254624
* [Hexagon] Remove variable unused in NDEBUG buildKrzysztof Parzyszek2015-12-031-3/+2
| | | | llvm-svn: 254623
* AArch64FastISel: Use cbz/cbnz to branch on i1Matthias Braun2015-12-031-61/+25
| | | | | | | | | In the case of a conditional branch without a preceding cmp we used to emit a "and; cmp; b.eq/b.ne" sequence, use tbz/tbnz instead. Differential Revision: http://reviews.llvm.org/D15122 llvm-svn: 254621
* [Hexagon] Implement CONCAT_VECTORS for HVX using V6_vcombineKrzysztof Parzyszek2015-12-033-1/+26
| | | | llvm-svn: 254617
* [Hexagon] NFC Using canonicalizePacket to compound/duplex/pad packets rather ↵Colin LeMahieu2015-12-031-17/+11
| | | | | | than doing it separately. This also ensures the integrated assembler path matches the assembly parser path. llvm-svn: 254616
* Simplify ValueMap handling.Rafael Espindola2015-12-031-42/+49
| | | | | | We now just return values and let ValueMap handle the map. llvm-svn: 254615
* [Hexagon] Fix instruction descriptor flags for memory access sizeKrzysztof Parzyszek2015-12-031-2/+6
| | | | llvm-svn: 254613
* Don't pass member variables to member functions. NFC.Rafael Espindola2015-12-031-17/+12
| | | | llvm-svn: 254610
* [X86] MS inline asm: produce error when encountering "<type> ptr <reg name>"Marina Yatsina2015-12-031-2/+11
| | | | | | | | | | | | | Currently "<type> ptr <reg name>" treated as <reg name> in MS inline asm, ignoring the "<type> ptr" completely and possibly ignoring the intention of the user. Fixed llvm to produce an error when encountering "<type> ptr <reg name>" operands. For example: andpd xmm1,xmmword ptr xmm1 --> andpd xmm1, xmm1 though andpd has 2 possible matching formats - andpd xmm, xmm/m128 Patch by: ziv.izhar@intel.com Differential Revision: http://reviews.llvm.org/D14607 llvm-svn: 254607
* [X86] Add support for fcomip, fucomip for Intel syntaxMarina Yatsina2015-12-031-2/+2
| | | | | | | | According to x86 spec, fcomip and fucomip should be supported for Intel syntax. Differential Revision: http://reviews.llvm.org/D15104 llvm-svn: 254595
* Fix class SCEVPredicate has virtual functions and accessible non-virtual ↵Andy Gibbs2015-12-031-0/+2
| | | | | | | | | | destructor. It is not enough to simply make the destructor virtual since there is a g++ 4.7 issue (see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53613) that throws the error "looser throw specifier for ... overridding ~SCEVPredicate() noexcept". llvm-svn: 254592
* AMDGPU/SI: Emit constant arrays in the .hsrodata_readonly_agent sectionTom Stellard2015-12-037-1/+25
| | | | | | | | | | | | Summary: This is done only when targeting HSA. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D13807 llvm-svn: 254587
* Revert "ScheduleDAGInstrs: Rework schedule graph builder."Matthias Braun2015-12-031-159/+66
| | | | | | | | | | This works mostly fine but breaks some stage 1 builders when compiling compiler-rt on i386. Revert for further investigation as I can't see an obvious cause/fix. This reverts commit r254577. llvm-svn: 254586
* clang-format FunctionImport after refactoring (NFC)Mehdi Amini2015-12-031-9/+10
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 254585
* Refactor FunctionImporter::importFunctions with a helper function to process ↵Mehdi Amini2015-12-031-29/+45
| | | | | | | | | the Worklist (NFC) This precludes some more functional changes to perform bulk imports. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 254583
* Adapt comment and rename variable in ModuleLinker to describe more ↵Mehdi Amini2015-12-031-4/+4
| | | | | | | | | accurately the actual use. Thanks Sean Silva for the suggestion. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 254582
* Remove "ExportingModule" from ThinLTO Index (NFC)Mehdi Amini2015-12-033-10/+7
| | | | | | | | | | | | | | | | | | | | | There is no real reason the index has to have the concept of an exporting Module. We should be able to have one single unique instance of the Index, and it should be read-only after creation for the whole ThinLTO processing. The linker plugin should be able to process multiple modules (in parallel or in sequence) with the same index. The only reason the ExportingModule was present seems to be to implement hasExportedFunctions() that is used by the Module linker to decide what to do with the current Module. For now I replaced it with a query to the map of Modules path to see if this module was declared in the Index and consider that if it is the case then it is probably exporting function. On the long term the Linker interface needs to evolve and this call should not be needed anymore. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 254581
* Add a TODO item that the nop handling before FP conditional branches isJoerg Sonnenberger2015-12-031-0/+2
| | | | | | not enough for SPARCv7. llvm-svn: 254580
* ScheduleDAGInstrs: Rework schedule graph builder.Matthias Braun2015-12-031-66/+159
| | | | | | | | | | | | | | | The new algorithm remembers the uses encountered while walking backwards until a matching def is found. Contrary to the previous version this: - Works without LiveIntervals being available - Allows to increase the precision to subregisters/lanemasks (not used for now) The changes in the AMDGPU tests are necessary because the R600 scheduler is not stable with respect to the order of nodes in the ready queues. Differential Revision: http://reviews.llvm.org/D9068 llvm-svn: 254577
* RegisterPressure: Use range based for, fix else style; NFCMatthias Braun2015-12-031-41/+28
| | | | llvm-svn: 254575
* MC: Make sure to clear *all* of MCMachOStreamer's stateJustin Bogner2015-12-031-0/+1
| | | | | | | The CreatedADWARFSection flag was added in r232842, but isn't cleared properly when resetting the streamer's state. Fix that. llvm-svn: 254571
* [WebAssembly] Add a test for wasm-store-results passDerek Schuff2015-12-031-1/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D15167 llvm-svn: 254570
* [WebAssembly] Assert that byval and nest are not used for return types.Dan Gohman2015-12-021-4/+2
| | | | llvm-svn: 254567
* Forgot to add this file with r254562.David Majnemer2015-12-021-0/+41
| | | | llvm-svn: 254565
* [Hexagon] Improve lowering of instructions to the MC layerKrzysztof Parzyszek2015-12-023-24/+55
| | | | | | | | | - Add extenders when necessary. - Handle some basic relocations. This should fix the failure in tools/clang/test/CodeGenCXX/crash.cpp llvm-svn: 254564
* Move EH-specific helper functions to a more appropriate placeDavid Majnemer2015-12-0216-62/+15
| | | | | | No functionality change is intended. llvm-svn: 254562
* Fixup for r254547: use format_hex() to simplify code.Alexey Samsonov2015-12-021-2/+1
| | | | llvm-svn: 254560
* Switch the linker to having a whitelist of GVs.Rafael Espindola2015-12-021-51/+67
| | | | | | | | | | | | This replaces DoNotLinkFromSource with ValuesToLink. It also moves the computation of ValuesToLink earlier. It is a bit simpler and an important step in slitting the linker into an ir mover and a linker proper. The test change is because we now avoid creating dead declarations. llvm-svn: 254559
* Libfuzzer: do not pass null into user functionMike Aizatsky2015-12-022-1/+7
| | | | | | Differential Revision: http://reviews.llvm.org/D15098 llvm-svn: 254558
* Use std::string instead of strdup() and free() in WinCodeViewLineTablesReid Kleckner2015-12-022-15/+6
| | | | llvm-svn: 254557
* Delete what is now duplicated code.Rafael Espindola2015-12-021-28/+3
| | | | | | | | | Having to import an alias as declaration is not thinlto specific. The test difference are because when we already have a decl and we are not importing it, we just leave the decl alone. llvm-svn: 254556
* Fix a typo in LoopVectorize.cpp. NFC.Cong Hou2015-12-021-1/+1
| | | | llvm-svn: 254549
* [PowerPC] Remove wild call to RegScavenger::initRegState().Alexey Samsonov2015-12-021-2/+1
| | | | | | | | This call should in fact be made by RegScavenger::enterBasicBlock() called below. The first call does nothing except for triggering UB, indicated by UBSan (passing nullptr to memset()). llvm-svn: 254548
* [Hexagon] Remove std::hex in favor of format().Alexey Samsonov2015-12-021-5/+7
| | | | | | | | | std::hex is not used anywhere in LLVM code base except for this place, and it has a known undefined behavior (at least in libstdc++ 4.9.3): https://llvm.org/bugs/show_bug.cgi?id=18156, which fires in UBSan bootstrap of LLVM. llvm-svn: 254547
* Also copy private linkage globals when needed.Rafael Espindola2015-12-021-1/+1
| | | | | | | This was an omission when handling COFF style comdats with local keys. Should fix the sanitizer-windows bot. llvm-svn: 254543
* Don't copy information from aliasee to alias.Rafael Espindola2015-12-023-20/+18
| | | | | | They are independent. llvm-svn: 254541
* AMDGPU/SI: Correctly emit agent global segment variables when targeting HSATom Stellard2015-12-029-3/+196
| | | | | | Differential Revision: http://reviews.llvm.org/D14508 llvm-svn: 254540
* [Hexagon] Remove TFRI_V4 instruction, use existing A2_tfrsi insteadKrzysztof Parzyszek2015-12-021-20/+0
| | | | llvm-svn: 254539
* Fix linking when we copy over only a decl.Rafael Espindola2015-12-021-22/+34
| | | | | | | We were failing to copy the fact that the GV is weak and in the case of an alias, producing invalid IR. llvm-svn: 254538
* [CodeGen]: Fix bad interaction with AntiDep breaking and inline asm.Kyle Butt2015-12-021-3/+6
| | | | | | | | | AggressiveAntiDepBreaker was renaming registers specified by the user for inline assembly. While this will work for compiler-specified registers, it won't work for user-specified registers, and at the time this runs, I don't currently see a way to distinguish them. llvm-svn: 254532
* Test Commit: iterateeKyle Butt2015-12-021-2/+2
| | | | | | Remove whitespace from blank lines. NFC llvm-svn: 254531
* Fix accidental off by one changeFiona Glaser2015-12-021-1/+1
| | | | | | Didn't break any tests, but did unnecessary extra work. llvm-svn: 254529
* AMDGPU: Fix msan test failureTom Stellard2015-12-021-0/+1
| | | | llvm-svn: 254527
* Scheduler / Regalloc: use unique_ptr[] instead of std::vectorFiona Glaser2015-12-022-15/+16
| | | | | | | | | vector.resize() is significantly slower than memset in many STLs and the cost of initializing these vectors is significant on targets with many registers. Since we don't need the overhead of a vector, use a simple unique_ptr instead. llvm-svn: 254526
* [llvm-profdata] Change instr prof counter overflow to saturate rather than ↵Nathan Slingerland2015-12-021-5/+6
| | | | | | | | | | | | | | discard Summary: This changes overflow handling during instrumentation profile merge. Rathar than throwing away records that would result in counter overflow, merged counts are instead clamped to the maximum representable value. A warning about counter overflow is still surfaced to the user as before. Reviewers: dnovillo, davidxl, silvas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14893 llvm-svn: 254525
* AArch64: use ldxp/stxp pair to implement 128-bit atomic loads.Tim Northover2015-12-023-32/+40
| | | | | | | | The ARM ARM is clear that 128-bit loads are only guaranteed to have been atomic if there has been a corresponding successful stxp. It's less clear for AArch32, so I'm leaving that alone for now. llvm-svn: 254524
OpenPOWER on IntegriCloud