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| | llvm-svn: 134561 | 
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| | llvm-svn: 134559 | 
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| | llvm-svn: 134557 | 
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| | llvm-svn: 134555 | 
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| | one alloca.
llvm-svn: 134549 | 
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| | llvm-svn: 134547 | 
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| | llvm-svn: 134546 | 
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| | This allows us to remove the (bogus and unneeded) encoding information from
the pseudo-instruction class definitions. All of the pseudos that haven't
been converted yet and still need encoding information instance from the normal
instruction classes and explicitly set isCodeGenOnly, and so are distinct
from this change.
llvm-svn: 134540 | 
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| | llvm-svn: 134538 | 
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| | careful about referencing values.
llvm-svn: 134537 | 
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| | Pseudo-instructions don't have encoding information, as they're lowered
to real instructions by the time we're doing binary encoding.
llvm-svn: 134533 | 
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| | llvm-svn: 134532 | 
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| | llvm-svn: 134530 | 
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| | llvm-svn: 134527 | 
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| | llvm-svn: 134525 | 
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| | llvm-svn: 134521 | 
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| | The promotion code lost any alignment information, when hoisting loads and
stores out of the loop. This lead to incorrect aligned memory accesses. We now
use the largest alignment we can prove to be correct.
llvm-svn: 134520 | 
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| | llvm-svn: 134516 | 
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| | push with a small constant produces a 2-byte push.
llvm-svn: 134501 | 
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| | llvm-svn: 134457 | 
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| | extension points to be used by clang.
llvm-svn: 134444 | 
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| | llvm-svn: 134441 | 
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| | llvm-svn: 134439 | 
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| | llvm-svn: 134436 | 
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| | llvm-svn: 134433 | 
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| | used for open is 0666.  Therefore, add the necessary permission bits for
consistency.
rdar://8621462
llvm-svn: 134430 | 
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| | This is impossible in theory, I can prove it. In practice, our near-zero
threshold can cause the network to oscillate between equally good
solutions.
<rdar://problem/9720596>
llvm-svn: 134428 | 
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| | llvm-svn: 134427 | 
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| | use proper aliases for the pclmullqlqdq and friends. PR10269.
llvm-svn: 134424 | 
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| | Putting back the helper that I removed on 7/1 to do this right.
llvm-svn: 134423 | 
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| | If the function allocates reserved stack space for callee argument frames,
estimateStackSize() needs to account for that, as it doesn't show up as
ordinary frame objects. Otherwise, a callee with a large argument list will
throw off the calculations for whether to allocate an emergency spill slot
and we get assert() failures in the register scavenger.
rdar://9715469
llvm-svn: 134415 | 
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| | Remat during spilling triggers dead code elimination. If a phi-def
becomes unused, that may also cause live ranges to split into separate
connected components.
This type of splitting is different from normal live range splitting. In
particular, there may not be a common original interval.
When the split range is its own original, make sure that the new
siblings are also their own originals. The range being split cannot be
used as an original since it doesn't cover the new siblings.
llvm-svn: 134413 | 
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| | llvm-svn: 134412 | 
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| | llvm-svn: 134408 | 
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| | compare when the AND has more than one use.
This can pessimize code, inequalities are generally more expensive.
llvm-svn: 134379 | 
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| | Noticed by Benjamin Kramer!
llvm-svn: 134376 | 
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| | This fixes the issue noted in PR10251 where early tail dup of bbs with
indirectbr would cause a bb to be duplicated into a loop preheader
and then into its predecessors, creating phi nodes with identical
operands just before register allocation.
This helps with jsinterp.o size (__TEXT goes from 163568 to 126656)
and a bit with performance 1.005x faster on sunspider (jits still enabled).
The result on webkit with the jit disabled is more significant: 1.021x faster.
llvm-svn: 134372 | 
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| | HasIndirectbr variable to be just that. No functionality change.
llvm-svn: 134371 | 
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| | llvm-svn: 134370 | 
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| | A split point inserted in a block with a landing pad successor may be
hoisted above the call to ensure that it dominates all successors. The
code that handles the rest of the basic block must take this into
account.
I am not including a test case, it would be very fragile. PR10244 comes
from building clang with exceptions enabled.
llvm-svn: 134369 | 
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| | This is what both the ABI and clang says.
llvm-svn: 134367 | 
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| | llvm-svn: 134364 | 
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| | llvm-svn: 134323 | 
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| | is valid or not depends on which system you build.
llvm-svn: 134321 | 
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| | llvm-svn: 134319 | 
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| | llvm-svn: 134312 | 
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| | llvm-svn: 134311 | 
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| | asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^
llvm-svn: 134310 | 
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| | register number.
llvm-svn: 134309 | 
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| | Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.
This enables proper clang diagnostics from the backend:
$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.
llvm-svn: 134307 |