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* Remove dead code.Devang Patel2011-07-061-2/+0
| | | | llvm-svn: 134561
* Typo.Devang Patel2011-07-061-1/+1
| | | | llvm-svn: 134559
* Clean up the #includes.Bill Wendling2011-07-061-5/+4
| | | | llvm-svn: 134557
* Grammar and 80-col.Eric Christopher2011-07-061-7/+7
| | | | llvm-svn: 134555
* Handle cases where multiple dbg.declare and dbg.value intrinsics are tied to ↵Devang Patel2011-07-061-11/+58
| | | | | | one alloca. llvm-svn: 134549
* Add ARM MC registry routines.Evan Cheng2011-07-067-12/+129
| | | | llvm-svn: 134547
* Rename files for consistency.Evan Cheng2011-07-067-10/+10
| | | | llvm-svn: 134546
* Mark ARM pseudo-instructions as isPseudo.Jim Grosbach2011-07-061-5/+3
| | | | | | | | | | This allows us to remove the (bogus and unneeded) encoding information from the pseudo-instruction class definitions. All of the pseudos that haven't been converted yet and still need encoding information instance from the normal instruction classes and explicitly set isCodeGenOnly, and so are distinct from this change. llvm-svn: 134540
* Simplify. Consolidate dbg.declare handling in AllocaPromoter.Devang Patel2011-07-063-25/+22
| | | | llvm-svn: 134538
* indvars -disable-iv-rewrite: ExprToMap lives in Pass data, so be moreAndrew Trick2011-07-061-1/+2
| | | | | | careful about referencing values. llvm-svn: 134537
* Remove un-used encoding info from Pseudo MLAv5.Jim Grosbach2011-07-061-4/+1
| | | | | | | Pseudo-instructions don't have encoding information, as they're lowered to real instructions by the time we're doing binary encoding. llvm-svn: 134533
* Fix missing triple support for RTEMS target.Eli Friedman2011-07-061-0/+2
| | | | llvm-svn: 134532
* indvars -disable-iv-rewrite: Added SimplifyCongruentIVs.Andrew Trick2011-07-061-1/+58
| | | | llvm-svn: 134530
* Constify getCompactUnwindRegNum.Bill Wendling2011-07-062-3/+3
| | | | llvm-svn: 134527
* createMCInstPrinter doesn't need TargetMachine anymore.Evan Cheng2011-07-0617-32/+17
| | | | llvm-svn: 134525
* LICM: Remove trailing white spacesTobias Grosser2011-07-061-32/+32
| | | | llvm-svn: 134521
* LICM: Do not loose alignment on promotionTobias Grosser2011-07-061-8/+30
| | | | | | | | The promotion code lost any alignment information, when hoisting loads and stores out of the loop. This lead to incorrect aligned memory accesses. We now use the largest alignment we can prove to be correct. llvm-svn: 134520
* Introduce "expect" intrinsic instructions.Jakub Staszak2011-07-066-0/+183
| | | | llvm-svn: 134516
* Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that aKevin Enderby2011-07-061-1/+1
| | | | | | push with a small constant produces a 2-byte push. llvm-svn: 134501
* Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.Evan Cheng2011-07-062-5/+0
| | | | llvm-svn: 134457
* Remove the ObjC ARC passes from the default optimization list, and addDan Gohman2011-07-051-4/+0
| | | | | | extension points to be used by clang. llvm-svn: 134444
* Preserve debug loc.Devang Patel2011-07-052-2/+2
| | | | llvm-svn: 134441
* Use memcmp.Benjamin Kramer2011-07-051-3/+1
| | | | llvm-svn: 134439
* Really fix typo :-(Rafael Espindola2011-07-051-1/+1
| | | | llvm-svn: 134436
* Fix typo.Rafael Espindola2011-07-051-2/+2
| | | | llvm-svn: 134433
* By default mkstemp() creates a temporary file with mode 0600, but the modeChad Rosier2011-07-051-0/+3
| | | | | | | | used for open is 0666. Therefore, add the necessary permission bits for consistency. rdar://8621462 llvm-svn: 134430
* Break infinite loop when the Hopfield network oscillates.Jakob Stoklund Olesen2011-07-051-8/+6
| | | | | | | | | | This is impossible in theory, I can prove it. In practice, our near-zero threshold can cause the network to oscillate between equally good solutions. <rdar://problem/9720596> llvm-svn: 134428
* Compare all 4 bytes of the header.Rafael Espindola2011-07-051-2/+3
| | | | llvm-svn: 134427
* Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, ↵Eli Friedman2011-07-053-35/+42
| | | | | | use proper aliases for the pclmullqlqdq and friends. PR10269. llvm-svn: 134424
* indvars -disable-iv-rewrite: avoid multiple IVs in weird cases.Andrew Trick2011-07-051-18/+30
| | | | | | Putting back the helper that I removed on 7/1 to do this right. llvm-svn: 134423
* ARM estimateStackSize() needs to account for simplified call frames.Jim Grosbach2011-07-051-7/+39
| | | | | | | | | | | | If the function allocates reserved stack space for callee argument frames, estimateStackSize() needs to account for that, as it doesn't show up as ordinary frame objects. Otherwise, a callee with a large argument list will throw off the calculations for whether to allocate an emergency spill slot and we get assert() failures in the register scavenger. rdar://9715469 llvm-svn: 134415
* Fix PR10277.Jakob Stoklund Olesen2011-07-052-0/+7
| | | | | | | | | | | | | | | Remat during spilling triggers dead code elimination. If a phi-def becomes unused, that may also cause live ranges to split into separate connected components. This type of splitting is different from normal live range splitting. In particular, there may not be a common original interval. When the split range is its own original, make sure that the new siblings are also their own originals. The range being split cannot be used as an original since it doesn't cover the new siblings. llvm-svn: 134413
* Tweak comment and debug output.Jakob Stoklund Olesen2011-07-051-2/+3
| | | | llvm-svn: 134412
* Fix warnings.Michael J. Spencer2011-07-051-3/+3
| | | | llvm-svn: 134408
* PR10267: Don't combine an equality compare with an AND into an inequality ↵Benjamin Kramer2011-07-041-1/+5
| | | | | | | | compare when the AND has more than one use. This can pessimize code, inequalities are generally more expensive. llvm-svn: 134379
* Remove accidentaly left node from previous iteration of the patch.Roman Divacky2011-07-041-3/+0
| | | | | | Noticed by Benjamin Kramer! llvm-svn: 134376
* Move early tail duplication earlier.Rafael Espindola2011-07-041-6/+6
| | | | | | | | | | | | | | This fixes the issue noted in PR10251 where early tail dup of bbs with indirectbr would cause a bb to be duplicated into a loop preheader and then into its predecessors, creating phi nodes with identical operands just before register allocation. This helps with jsinterp.o size (__TEXT goes from 163568 to 126656) and a bit with performance 1.005x faster on sunspider (jits still enabled). The result on webkit with the jit disabled is more significant: 1.021x faster. llvm-svn: 134372
* Move most of the pre BB code to TailDuplicateAndUpdate. Change theRafael Espindola2011-07-041-112/+125
| | | | | | HasIndirectbr variable to be just that. No functionality change. llvm-svn: 134371
* Reduce indentation and fix the count of how many PHIs we have inserted.Rafael Espindola2011-07-041-75/+80
| | | | llvm-svn: 134370
* Fix PR10244.Jakob Stoklund Olesen2011-07-041-4/+4
| | | | | | | | | | | | A split point inserted in a block with a landing pad successor may be hoisted above the call to ensure that it dominates all successors. The code that handles the rest of the basic block must take this into account. I am not including a test case, it would be very fragile. PR10244 comes from building clang with exceptions enabled. llvm-svn: 134369
* Make the i64 and f64 be 64bit ABI aligned in the target description.Roman Divacky2011-07-031-1/+1
| | | | | | This is what both the ABI and clang says. llvm-svn: 134367
* Fix an easy fixme.Rafael Espindola2011-07-031-6/+10
| | | | llvm-svn: 134364
* Remove unused array.Duncan Sands2011-07-021-21/+0
| | | | llvm-svn: 134323
* Revert previous commit. It seems that whether casting to voidDuncan Sands2011-07-021-1/+1
| | | | | | is valid or not depends on which system you build. llvm-svn: 134321
* Supress gcc-4.5 warning about the result not being used.Duncan Sands2011-07-021-1/+1
| | | | llvm-svn: 134319
* Use getVNInfoAt.Rafael Espindola2011-07-021-2/+1
| | | | llvm-svn: 134312
* Consistent diagnostic capitalization and redundant context elimination.Jakob Stoklund Olesen2011-07-021-8/+5
| | | | llvm-svn: 134311
* Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen2011-07-022-22/+18
| | | | | | | | asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ llvm-svn: 134310
* Check the VN of the src register at the two copies, not just theRafael Espindola2011-07-021-1/+6
| | | | | | register number. llvm-svn: 134309
* Include a source location when complaining about bad inline assembly.Jakob Stoklund Olesen2011-07-022-10/+36
| | | | | | | | | | | | | | | | Add a MI->emitError() method that the backend can use to report errors related to inline assembly. Call it from X86FloatingPoint.cpp when the constraints are wrong. This enables proper clang diagnostics from the backend: $ clang -c pr30848.c pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack __asm__ ("" : "=u" (d)); /* { dg-error "output regs" } */ ^ 1 error generated. llvm-svn: 134307
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