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* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-2829-63/+64
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-2813-25/+13
| | | | llvm-svn: 134027
* Add MCInstrInfo registeration machinery.Evan Cheng2011-06-281-0/+6
| | | | llvm-svn: 134026
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-2862-87/+112
| | | | llvm-svn: 134024
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-2865-727/+727
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* Clean up the handling of the x87 fp stack to make it more robust.Jakob Stoklund Olesen2011-06-286-227/+362
| | | | | | | | | | | | | | | | | | | | Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
* Remove warning: 'c0' may be used uninitialized in this function.Chad Rosier2011-06-281-1/+2
| | | | llvm-svn: 134014
* Print registers by name instead of by number.Jakob Stoklund Olesen2011-06-281-6/+7
| | | | llvm-svn: 134013
* cleanup: misleading comment.Andrew Trick2011-06-281-2/+2
| | | | llvm-svn: 134010
* Implement ISD::VAARG lowering on PPC32.Roman Divacky2011-06-281-5/+123
| | | | llvm-svn: 134005
* PR10210: New method ConstantArray::getAsCString(). Use it in LTO toJay Foad2011-06-281-8/+23
| | | | | | avoid getting embedded trailing null bytes in std::strings. llvm-svn: 133999
* Cleanup. Fix a stupid variable name.Andrew Trick2011-06-281-3/+3
| | | | llvm-svn: 133995
* SCEVExpander: give new insts a name that identifies the reponsible pass.Andrew Trick2011-06-284-7/+8
| | | | llvm-svn: 133992
* whitespaceAndrew Trick2011-06-281-8/+8
| | | | llvm-svn: 133991
* Fix typo in comment.Nick Lewycky2011-06-281-1/+1
| | | | llvm-svn: 133990
* Fix cmake build.Rafael Espindola2011-06-281-1/+1
| | | | llvm-svn: 133989
* indvars --disable-iv-rewrite: sever ties with IVUsers.Andrew Trick2011-06-282-21/+6
| | | | llvm-svn: 133988
* indvars --disable-iv-rewrite: Defer evaluating s/zext until SCEVAndrew Trick2011-06-281-40/+57
| | | | | | evaluates all other IV exprs. llvm-svn: 133982
* Fix CMake build by removing this now dead file.Chandler Carruth2011-06-281-1/+0
| | | | llvm-svn: 133981
* Fix a bad iterator dereference that Evan uncovered.Jakob Stoklund Olesen2011-06-281-2/+4
| | | | llvm-svn: 133978
* ARM Thumb2 asm syntax optional destination operand for binary operators.Jim Grosbach2011-06-281-9/+29
| | | | | | | | | | | | | When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: and r1, #ff and r1, r1, #ff rdar://9672867 llvm-svn: 133973
* Remove RegClass2VRegMap from MachineRegisterInfo.Evan Cheng2011-06-271-14/+0
| | | | llvm-svn: 133967
* ARM Assembly support for Thumb mov-immediate.Jim Grosbach2011-06-273-4/+40
| | | | | | | | | | | Correctly parse the forms of the Thumb mov-immediate instruction: 1. 8-bit immediate 0-255. 2. 12-bit shifted-immediate. The 16-bit immediate "movw" form is also legal with just a "mov" mnemonic, but is not yet supported. More parser logic necessary there due to fixups. llvm-svn: 133966
* Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc ↵Evan Cheng2011-06-273-1440/+0
| | | | | | can split live ranges. llvm-svn: 133962
* indvars -disable-iv-rewrite: run RLEV after SimplifyIVUsers forAndrew Trick2011-06-271-4/+6
| | | | | | a bit more control over the order SCEVs are evaluated. llvm-svn: 133959
* During bottom up fast-isel, instructions emitted to materalize registers are ↵Devang Patel2011-06-272-0/+24
| | | | | | at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. llvm-svn: 133953
* Calculate GetBestDestForJumpOnUndef correctly.Jakub Staszak2011-06-271-1/+3
| | | | llvm-svn: 133946
* ARM Asm parsing of Thumb2 move immediate.Jim Grosbach2011-06-271-2/+3
| | | | | | | Thumb2 MOV mnemonic can accept both cc_out and predication. We don't (yet) encode the instruction properly, but this gets the parsing part. llvm-svn: 133945
* More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng2011-06-2716-48/+48
| | | | llvm-svn: 133944
* Add exception necessitated by 133938.Jim Grosbach2011-06-271-1/+1
| | | | llvm-svn: 133939
* ARM assembly carry set/clear condition code aliases for 'hi/lo'Jim Grosbach2011-06-271-0/+2
| | | | llvm-svn: 133938
* ARM assembler support for ldmfd/stmfd mnemonics.Jim Grosbach2011-06-271-0/+2
| | | | llvm-svn: 133936
* ARM assembler support for vpush/vpop.Jim Grosbach2011-06-271-0/+9
| | | | | | | | | Add aliases for the vpush/vpop mnemonics to the VFP load/store multiple writeback instructions w/ SP as the base pointer. rdar://9683231 llvm-svn: 133932
* ARM Assembly syntax support for arithmetic implied dest operand.Jim Grosbach2011-06-271-7/+25
| | | | | | | | | | | | | When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: sub r2, r2, #6 sub r2, #6 rdar://9682597 llvm-svn: 133925
* The index stored in the RegDefIter is one after the current index. When ↵Owen Anderson2011-06-271-1/+1
| | | | | | getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped. llvm-svn: 133923
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-2768-121/+130
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* pre-RA-sched: Cleanup register pressure tracking.Andrew Trick2011-06-272-16/+4
| | | | | | | | Removed the check that peeks past EXTRA_SUBREG, which I don't think makes sense any more. Intead treat it as a normal register def. No significant affect on x86 or ARM benchmarks. llvm-svn: 133917
* Track live-out physical registers in MachineDCE.Jakob Stoklund Olesen2011-06-271-3/+8
| | | | | | Patch by Sanjoy Das! llvm-svn: 133910
* Teach one piece of scalarrepl to handle lifetime markers. When transforming anNick Lewycky2011-06-271-13/+37
| | | | | | | | alloca that only holds a copy of a global and we're going to replace the users of the alloca with that global, just nuke the lifetime intrinsics. Part of PR10121. llvm-svn: 133905
* Move onlyUsedByLifetimeMarkers to ValueTracking so that it can be used by otherNick Lewycky2011-06-272-16/+17
| | | | | | passes as well. llvm-svn: 133904
* Grow the X86FloatingPoint register map to hold 16 registers.Jakob Stoklund Olesen2011-06-271-5/+15
| | | | | | | This allows for more live scratch registers which is needed to handle live ST registers before return and inline asm instructions. llvm-svn: 133903
* Distinguish early clobber output operands from clobbered registers.Jakob Stoklund Olesen2011-06-275-5/+8
| | | | | | | | | | | | | | | | | | | | | | Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we now use two different asm operand kinds. The new Kind_Clobber is treated identically to the old Kind_RegDefEarlyClobber for now, but x87 floating point stack inline assembly does care about the difference. This will pop a register off the stack: asm("fstp %st" : : "t"(x) : "st"); While this will pop the input and push an output: asm("fst %st" : "=&t"(r) : "t"(x)); We need to know if ST0 was a clobber or an output operand, and we can't depend on <dead> flags for that. llvm-svn: 133902
* Decode and pretty print inline asm operand descriptors.Jakob Stoklund Olesen2011-06-271-1/+22
| | | | | | | | | | The INLINEASM MachineInstrs have an immediate operand describing each original inline asm operand. Decode the bits in MachineInstr::print() so it is easier to read: INLINEASM <es:rorq $1,$0>, $0:[regdef], %vreg0<def>, %vreg1<def>, $1:[imm], 1, $2:[reguse] [tiedto:$0], %vreg2, %vreg3, $3:[regdef-ec], %EFLAGS<earlyclobber,imp-def> llvm-svn: 133901
* Remove unused methods.Rafael Espindola2011-06-261-13/+0
| | | | llvm-svn: 133900
* There is only one register coalescer. Merge it into the base class andRafael Espindola2011-06-268-197/+151
| | | | | | remove the analysis group. llvm-svn: 133899
* Merge SimpleRegisterCoalescing.cpp into RegisterCoalescer.cpp.Rafael Espindola2011-06-263-1541/+1523
| | | | llvm-svn: 133897
* merge SimpleRegisterCoalescing.h into RegisterCoalescer.h.Rafael Espindola2011-06-264-156/+129
| | | | llvm-svn: 133896
* Move RegisterCoalescer.h to lib/CodeGen.Rafael Espindola2011-06-269-9/+253
| | | | llvm-svn: 133895
* Remove unnecessary wrapper.Rafael Espindola2011-06-262-27/+17
| | | | llvm-svn: 133886
* Replace dyn_cast<> with cast<> since the cast is already guarded by the ↵Chad Rosier2011-06-251-1/+1
| | | | | | necessary check. llvm-svn: 133874
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