summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* Don't hard-code the mask size to be 32, which is incorrect on ppc64Dan Gohman2008-02-271-3/+5
| | | | | | | and was causing aborts with the new APInt changes. This may also be fixing an obscure ppc64 bug. llvm-svn: 47692
* This is done.Evan Cheng2008-02-271-24/+0
| | | | llvm-svn: 47688
* Fix a bug in dead spill slot elimination.Evan Cheng2008-02-271-0/+2
| | | | llvm-svn: 47687
* Remove the `else', at Evan's insistence.Dan Gohman2008-02-271-2/+1
| | | | llvm-svn: 47686
* Add a FIXME about the VECTOR_SHUFFLE evil hack.Duncan Sands2008-02-271-0/+2
| | | | llvm-svn: 47676
* Emit an error when a library is not found. It is the GNU ld behavior and it ↵Lauro Ramos Venancio2008-02-271-1/+1
| | | | | | is expected by the configure scripts. llvm-svn: 47674
* LegalizeTypes support for EXTRACT_VECTOR_ELT. TheDuncan Sands2008-02-276-59/+363
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | approach taken is different to that in LegalizeDAG when it is a question of expanding or promoting the result type: for example, if extracting an i64 from a <2 x i64>, when i64 needs expanding, it bitcasts the vector to <4 x i32>, extracts the appropriate two i32's, and uses those for the Lo and Hi parts. Likewise, when extracting an i16 from a <4 x i16>, and i16 needs promoting, it bitcasts the vector to <2 x i32>, extracts the appropriate i32, twiddles the bits if necessary, and uses that as the promoted value. This puts more pressure on bitcast legalization, and I've added the appropriate cases. They needed to be added anyway since users can generate such bitcasts too if they want to. Also, when considering various cases (Legal, Promote, Expand, Scalarize, Split) it is a pain that expand can correspond to Expand, Scalarize or Split, so I've changed the LegalizeTypes enum so it lists those different cases - now Expand only means splitting a scalar in two. The code produced is the same as by LegalizeDAG for all relevant testcases, except for 2007-10-31-extractelement-i64.ll, where the code seems to have improved (see below; can an expert please tell me if it is better or not). Before < vs after >. < subl $92, %esp < movaps %xmm0, 64(%esp) < movaps %xmm0, (%esp) < movl 4(%esp), %eax < movl %eax, 28(%esp) < movl (%esp), %eax < movl %eax, 24(%esp) < movq 24(%esp), %mm0 < movq %mm0, 56(%esp) --- > subl $44, %esp > movaps %xmm0, 16(%esp) > pshufd $1, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movd %xmm0, (%esp) > movq (%esp), %mm0 > movq %mm0, 8(%esp) < subl $92, %esp < movaps %xmm0, 64(%esp) < movaps %xmm0, (%esp) < movl 12(%esp), %eax < movl %eax, 28(%esp) < movl 8(%esp), %eax < movl %eax, 24(%esp) < movq 24(%esp), %mm0 < movq %mm0, 56(%esp) --- > subl $44, %esp > movaps %xmm0, 16(%esp) > pshufd $3, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movhlps %xmm0, %xmm0 > movd %xmm0, (%esp) > movq (%esp), %mm0 > movq %mm0, 8(%esp) < subl $92, %esp < movaps %xmm0, 64(%esp) --- > subl $44, %esp < movl 16(%esp), %eax < movl %eax, 48(%esp) < movl 20(%esp), %eax < movl %eax, 52(%esp) < movaps %xmm0, (%esp) < movl 4(%esp), %eax < movl %eax, 60(%esp) < movl (%esp), %eax < movl %eax, 56(%esp) --- > pshufd $1, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movd %xmm0, (%esp) > movd %xmm1, 12(%esp) > movd %xmm0, 8(%esp) < subl $92, %esp < movaps %xmm0, 64(%esp) --- > subl $44, %esp < movl 24(%esp), %eax < movl %eax, 48(%esp) < movl 28(%esp), %eax < movl %eax, 52(%esp) < movaps %xmm0, (%esp) < movl 12(%esp), %eax < movl %eax, 60(%esp) < movl 8(%esp), %eax < movl %eax, 56(%esp) --- > pshufd $3, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movhlps %xmm0, %xmm0 > movd %xmm0, (%esp) > movd %xmm1, 12(%esp) > movd %xmm0, 8(%esp) llvm-svn: 47672
* LegalizeTypes support for legalizing the maskDuncan Sands2008-02-272-0/+56
| | | | | | | | | | | | | | | | | | | | operand of a VECTOR_SHUFFLE. The mask is a vector of constant integers. The code in LegalizeDAG doesn't bother to legalize the mask, since it's basically just storage for a bunch of constants, however LegalizeTypes is more picky. The problem is that there may not exist any legal vector-of-integers type with a legal element type, so it is impossible to create a legal mask! Unless of course you cheat by creating a BUILD_VECTOR where the operands have a different type to the element type of the vector being built... This is pretty ugly but works - all relevant tests in the testsuite pass, and produce the same assembler with and without LegalizeTypes. llvm-svn: 47670
* LegalizeTypes support for INSERT_VECTOR_ELT.Duncan Sands2008-02-273-6/+47
| | | | llvm-svn: 47669
* Don't track max alignment during stack object allocations since they can be ↵Evan Cheng2008-02-271-2/+1
| | | | | | deleted later. Let PEI compute it. llvm-svn: 47668
* Support for legalizing MEMBARRIER.Duncan Sands2008-02-273-2/+19
| | | | llvm-svn: 47667
* Final de-tabification.Bill Wendling2008-02-279-112/+111
| | | | llvm-svn: 47663
* Add path separator support, patch by Sam Bishop. Chris Lattner2008-02-273-38/+23
| | | | llvm-svn: 47662
* Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead Chris Lattner2008-02-272-29/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | stack slot and store if the SINT_TO_FP is actually legal. This allows us to compile: double a(double b) {return (unsigned)b;} to: _a: cvttsd2siq %xmm0, %rax movl %eax, %eax cvtsi2sdq %rax, %xmm0 ret instead of: _a: subq $8, %rsp cvttsd2siq %xmm0, %rax movl %eax, %eax cvtsi2sdq %rax, %xmm0 addq $8, %rsp ret crazy. llvm-svn: 47660
* this code is correct but strange looking ;-)Chris Lattner2008-02-271-2/+1
| | | | llvm-svn: 47659
* Compile x86-64-and-mask.ll into:Chris Lattner2008-02-272-10/+14
| | | | | | | | | | | | | | | | | | | | _test: movl %edi, %eax ret instead of: _test: movl $4294967295, %ecx movq %rdi, %rax andq %rcx, %rax ret It would be great to write this as a Pat pattern that used subregs instead of a 'pseudo' instruction, but I don't know how to do that in td files. llvm-svn: 47658
* Spiller now remove unused spill slots.Evan Cheng2008-02-276-22/+110
| | | | llvm-svn: 47657
* Teach Legalize how to expand an EXTRACT_ELEMENT.Dan Gohman2008-02-271-0/+6
| | | | llvm-svn: 47656
* Convert the last remaining users of the non-APInt form ofDan Gohman2008-02-273-51/+39
| | | | | | | ComputeMaskedBits to use the APInt form, and remove the non-APInt form. llvm-svn: 47654
* Add comment.Devang Patel2008-02-271-1/+0
| | | | llvm-svn: 47653
* add a noteChris Lattner2008-02-271-0/+27
| | | | llvm-svn: 47652
* Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.Dan Gohman2008-02-272-141/+153
| | | | | | | | Change several cases in SimplifyDemandedMask that don't ever do any simplifying to reuse the logic in ComputeMaskedBits instead of duplicating it. llvm-svn: 47648
* regenerate.Devang Patel2008-02-263-272/+272
| | | | llvm-svn: 47642
* Add assert.Devang Patel2008-02-261-2/+2
| | | | llvm-svn: 47641
* Fix an issue where GVN had the sizes of the two memcpy's reverse, resultingOwen Anderson2008-02-261-2/+2
| | | | | | in an invalid transformation. llvm-svn: 47639
* Add assert to check return type.Devang Patel2008-02-261-5/+5
| | | | llvm-svn: 47637
* Refactor according to Evan's and Anton's suggestions.Arnold Schwaighofer2008-02-262-10/+27
| | | | llvm-svn: 47635
* regenerateDevang Patel2008-02-263-277/+281
| | | | llvm-svn: 47634
* Remove unncessary ReturnInst constructors.Devang Patel2008-02-262-21/+3
| | | | llvm-svn: 47633
* Use a smallvector for inactiveCounts and initialize it lazily Chris Lattner2008-02-261-4/+10
| | | | | | | | instead of init'ing it maximally to zeros on entry. getFreePhysReg is pretty hot and only a few elements are typically used. This speeds up linscan by 5% on 176.gcc. llvm-svn: 47631
* Rename PrintableName to Name.Bill Wendling2008-02-2616-43/+42
| | | | llvm-svn: 47629
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-2626-78/+81
| | | | | | would have been a Godsend here! llvm-svn: 47625
* Enable -coalescer-commute-instrs by default.Evan Cheng2008-02-261-1/+1
| | | | llvm-svn: 47623
* Use SmallVector while constructing ReturnInst.Devang Patel2008-02-262-2/+22
| | | | llvm-svn: 47619
* Avoid const_castsDevang Patel2008-02-261-5/+5
| | | | llvm-svn: 47616
* fix http://llvm.org/bugs/show_bug.cgi?id=2097Gabor Greif2008-02-261-1/+1
| | | | llvm-svn: 47615
* Remove unnecessary getOperand/setOperand overriders.Devang Patel2008-02-261-11/+0
| | | | | | Simplify getReturnValue() llvm-svn: 47614
* Avoid aborting on invalid shift counts.Dan Gohman2008-02-261-4/+18
| | | | llvm-svn: 47612
* Unify to ReturnInst::init() member functions.Devang Patel2008-02-261-22/+17
| | | | llvm-svn: 47611
* Fix for pr2093: direct operands aren't necessarily addresses, so don't Eli Friedman2008-02-261-1/+2
| | | | | | try to simplify them. llvm-svn: 47610
* Optimize most common case by using single RetVal in ReturnInst.Devang Patel2008-02-261-20/+34
| | | | llvm-svn: 47607
* Correct function comments.Arnold Schwaighofer2008-02-261-19/+23
| | | | llvm-svn: 47606
* Fix PR2096, a regression introduced with my patch last night. ThisChris Lattner2008-02-261-1/+1
| | | | | | also fixes cfrac, flops, and 175.vpr llvm-svn: 47605
* Fix a nasty bug in LegalizeTypes (spotted inDuncan Sands2008-02-266-60/+70
| | | | | | | | | | | | | | | | | CodeGen/PowerPC/illegal-element-type.ll): suppose a node X is processed, and processing maps it to a node Y. Then X continues to exist in the DAG, but with no users. While processing some other node, a new node may be created that happens to be equal to X, and thus X will be reused rather than a truly new node. This can cause X to "magically reappear", and since it is in the Processed state in will not be reprocessed, so at the end of type legalization the illegal node X can still be present. The solution is to replace X with Y whenever X gets resurrected like this. llvm-svn: 47601
* De-tabifyBill Wendling2008-02-263-6/+4
| | | | llvm-svn: 47600
* De-tabify.Bill Wendling2008-02-262-24/+24
| | | | llvm-svn: 47599
* De-tabify.Bill Wendling2008-02-262-9/+9
| | | | llvm-svn: 47598
* Add support for intermodule tail calls on x86/32bit withArnold Schwaighofer2008-02-261-12/+24
| | | | | | | | GOT-style position independent code. Before only tail calls to protected/hidden functions within the same module were optimized. Now all function calls are tail call optimized. llvm-svn: 47594
* Change the lowering of arguments for tail call optimizedArnold Schwaighofer2008-02-262-42/+84
| | | | | | | | | | | | calls. Before arguments that could overwrite each other were explicitly lowered to a stack slot, not giving the register allocator a chance to optimize. Now a sequence of copyto/copyfrom virtual registers ensures that arguments are loaded in (virtual) registers before they are lowered to the stack slot (and might overwrite each other). Also parameter stack slots are marked mutable for (potentially) tail calling functions. llvm-svn: 47593
* This is possible:Evan Cheng2008-02-261-2/+8
| | | | | | | | | vr1 = extract_subreg vr2, 3 ... vr3 = extract_subreg vr1, 2 The end result is vr3 is equal to vr2 with subidx 2. llvm-svn: 47592
OpenPOWER on IntegriCloud