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* [libFuzzer] remove dead code, NFCKostya Serebryany2017-01-061-47/+0
| | | | llvm-svn: 291195
* Add iterator support to DWARFDie to allow child DIE iteration.Greg Clayton2017-01-051-4/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D28303 llvm-svn: 291194
* Code cleanup: Remove tab indents.Logan Chien2017-01-051-3/+3
| | | | llvm-svn: 291193
* [CostModel][X86] Tidyup arithmetic costs code. NFCI.Simon Pilgrim2017-01-051-28/+15
| | | | | | Remove unnecessary braces, remove one use variables and keep LUTs to similar naming convention. llvm-svn: 291187
* [libFuzzer] improve error handling during the merge (handle various IO failures)Kostya Serebryany2017-01-059-0/+32
| | | | llvm-svn: 291182
* [AArch64] Fold some filled/spilled subreg COPYsGeoff Berry2017-01-052-10/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Extend AArch64 foldMemoryOperandImpl() to handle folding spills of subreg COPYs with read-undef defs like: %vreg0:sub_32<def,read-undef> = COPY %WZR; GPR64:%vreg0 by widening the spilled physical source reg and generating: STRXui %XZR <fi#0> as well as folding fills of similar COPYs like: %vreg0:sub_32<def,read-undef> = COPY %vreg1; GPR64:%vreg0, GPR32:%vreg1 by generating: %vreg0:sub_32<def,read-undef> = LDRWui <fi#0> Reviewers: MatzeB, qcolombet Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D27425 llvm-svn: 291180
* Fix typo. NFCXin Tong2017-01-051-1/+1
| | | | llvm-svn: 291178
* ThinLTO: add early "dead-stripping" on the IndexTeresa Johnson2017-01-056-28/+196
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Using the linker-supplied list of "preserved" symbols, we can compute the list of "dead" symbols, i.e. the one that are not reachable from a "preserved" symbol transitively on the reference graph. Right now we are using this information to mark these functions as non-eligible for import. The impact is two folds: - Reduction of compile time: we don't import these functions anywhere or import the function these symbols are calling. - The limited number of import/export leads to better internalization. Patch originally by Mehdi Amini. Reviewers: mehdi_amini, pcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23488 llvm-svn: 291177
* PR 31534: When emitting both DWARF unwind tables and debug information,Joerg Sonnenberger2017-01-053-3/+26
| | | | | | | do not use .cfi_sections. This requires checking if any non-declaration function in the module needs an unwind table. llvm-svn: 291172
* [LICM] Allow promotion of some stores that are not guaranteed to execute.Michael Kuperstein2017-01-051-4/+24
| | | | | | | | | | | | | Promotion is always legal when a store within the loop is guaranteed to execute. However, this is not a necessary condition - for promotion to be memory model semantics-preserving, it is enough to have a store that dominates every exit block. This is because if the store dominates every exit block, the fact the exit block was executed implies the original store was executed as well. Differential Revision: https://reviews.llvm.org/D28147 llvm-svn: 291171
* CodeGen: Assert that liveness is up to date when reading block live-ins.Matthias Braun2017-01-055-35/+47
| | | | | | | | | | | | | | | | | Add an assert that checks whether liveins are up to date before they are used. - Do not print liveins into .mir files anymore in situations where they are out of date anyway. - The assert in the RegisterScavenger is superseded by the new one in livein_begin(). - Skip parts of the liveness updating logic in IfConversion.cpp when liveness isn't tracked anymore (just enough to avoid hitting the new assert()). Differential Revision: https://reviews.llvm.org/D27562 llvm-svn: 291169
* Revert "Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")"Evgeniy Stepanov2017-01-051-33/+19
| | | | | | | | | | | | | | | | | | | Summary: This reverts commit r291144. It breaks build bots. http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/3270, http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fuzzer/builds/2058 lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:1638:12: error: could not convert ‘(const unsigned int*)(& Variants)’ from ‘const unsigned int*’ to ‘llvm::ArrayRef<unsigned int>’ return Variants; Reviewers: eugenis, tstellarAMD Patch by Alex Shlyapnikov. Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D28372 llvm-svn: 291168
* [CostModel][X86] Move vXi32 MUL costs into existing tables. NFCI.Simon Pilgrim2017-01-051-6/+5
| | | | llvm-svn: 291165
* Remove trailing whitespace. NFCI.Simon Pilgrim2017-01-051-3/+3
| | | | llvm-svn: 291163
* [CostModel][X86] Reordered SSE42 arithmetic cost LUT into descending order. ↵Simon Pilgrim2017-01-051-13/+11
| | | | | | NFCI. llvm-svn: 291162
* [CostModel][X86] Move vXi64 MUL costs into existing tables. NFCI.Simon Pilgrim2017-01-051-11/+3
| | | | | | Removes need for yet another LUT. llvm-svn: 291158
* [LICM] Small update to note changes made in hoistRegionAndrew Kaylor2017-01-051-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D28363 llvm-svn: 291157
* [CostModel][X86] Strip unused 256-bit vector shift costs. NFCI.Simon Pilgrim2017-01-051-8/+0
| | | | | | Remove SSE2 256-bit entries - AVX targets will have used the SSE42 costs instead. llvm-svn: 291152
* [CostModel][X86] Include the cost of 256-bit upper subvector ↵Simon Pilgrim2017-01-051-2/+2
| | | | | | | | extract/insertion in AVX1 v4i64 MUL Matches other MUL/ADD/SUB 256-bit case on AVX1 llvm-svn: 291149
* TypoJoerg Sonnenberger2017-01-051-1/+1
| | | | llvm-svn: 291147
* [CostModel][X86] Merged SK_PermuteSingleSrc/SK_PermuteTwoSrc into common ↵Simon Pilgrim2017-01-051-272/+227
| | | | | | shuffle cost LUTs. NFCI. llvm-svn: 291146
* Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")Matt Arsenault2017-01-051-19/+33
| | | | | | Arrays are supposed to be static const llvm-svn: 291144
* Remove a unnecessary hasLoopInvariantOperands check in loop sink.Xin Tong2017-01-051-2/+1
| | | | | | | | | | | | | | | | Summary: Preheader instruction's operands will always be invariant w.r.t. the loop which its the preheader for. Memory aliases are handled in canSinkOrHoistInst. Reviewers: danielcdh, davidxl Subscribers: mzolotukhin, llvm-commits Differential Revision: https://reviews.llvm.org/D28270 llvm-svn: 291132
* less braces; NFCSanjay Patel2017-01-051-2/+1
| | | | llvm-svn: 291126
* [CostModel][X86] Add support for broadcast shuffle costsSimon Pilgrim2017-01-051-9/+48
| | | | | | | | Currently only for broadcasts with input and output of the same width. Differential Revision: https://reviews.llvm.org/D27811 llvm-svn: 291122
* [X86] Optimize vector shifts with variable but uniform shift amountsZvi Rackover2017-01-051-16/+22
| | | | | | | | | | | | | | | Summary: For instructions such as PSLLW/PSLLD/PSLLQ a variable shift amount may be passed in an XMM register. The lower 64-bits of the register are evaluated to determine the shift amount. This patch improves the construction of the vector containing the shift amount. Reviewers: craig.topper, delena, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28353 llvm-svn: 291120
* [ThinLTO] Add parenthesis as per build warningTeresa Johnson2017-01-051-3/+2
| | | | | | Fixes a warning about "||" and "&&" due to r291108. llvm-svn: 291119
* [PowerPC] Implement missing ISA 2.06 instructions.Tony Jiang2017-01-054-1/+18
| | | | | | | Instructions: fctidu[.], fctiwu[.], ftdiv, ftsqrt are not implemented. Implement them and add corresponding test cases in this patch. llvm-svn: 291116
* [ThinLTO] Use DenseSet instead of SmallPtrSet for holding GUIDsTeresa Johnson2017-01-051-4/+4
| | | | | | | | | Should fix some more bot failures from r291108. This should have been a DenseSet, since GUID is not a pointer type. It caused some bots to fail, but for some reason I wasnt't getting a build failure. llvm-svn: 291115
* [CostModel][X86] Pulled out common type legalization codeSimon Pilgrim2017-01-051-7/+4
| | | | llvm-svn: 291109
* [ThinLTO] Subsume all importing checks into a single flagTeresa Johnson2017-01-055-117/+97
| | | | | | | | | | | | | | | | | | | Summary: This adds a new summary flag NotEligibleToImport that subsumes several existing flags (NoRename, HasInlineAsmMaybeReferencingInternal and IsNotViableToInline). It also subsumes the checking of references on the summary that was being done during the thin link by eligibleForImport() for each candidate. It is much more efficient to do that checking once during the per-module summary build and record it in the summary. Reviewers: mehdi_amini Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28169 llvm-svn: 291108
* Currently isLikelyComplexAddressComputation tries to figure out if the given ↵Mohammed Agabaria2017-01-058-55/+51
| | | | | | | | | | | | | stride seems to be 'complex' and need some extra cost for address computation handling. This code seems to be target dependent which may not be the same for all targets. Passed the decision whether the given stride is complex or not to the target by sending stride information via SCEV to getAddressComputationCost instead of 'IsComplex'. Specifically at X86 targets we dont see any significant address computation cost in case of the strided access in general. Differential Revision: https://reviews.llvm.org/D27518 llvm-svn: 291106
* [GlobalISel] Add support for address-taken basic blocksKristof Beyls2017-01-051-1/+4
| | | | | | | | | | | | | | | | | To make this work, pointers from the MachineBasicBlock to the LLVM-IR-level basic blocks need to be initialized, as the AsmPrinter uses this link to be able to print out labels for the basic blocks that are address-taken. Most of the changes in this commit are about adapting existing tests to include the basic block name that is now printed out in the MIR format, now that the name becomes available as the link to the LLVM-IR basic block is initialized. The relevant test change for the functionality added in this patch are the added "(address-taken)" strings in test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll. Differential Revision: https://reviews.llvm.org/D28123 llvm-svn: 291105
* [GlobalISel] Add support for switch statementsKristof Beyls2017-01-051-0/+39
| | | | | | | | | | This commit does this using a trivial chain of conditional branches. In the future, we probably want to reuse the optimized switch lowering used in SelectionDAG. Differential Revision: https://reviews.llvm.org/D28176 llvm-svn: 291099
* [GlobalISel] Fix AArch64 ICMP instruction selectionKristof Beyls2017-01-051-3/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D28175 llvm-svn: 291097
* [Test Commit] fixing some format issue in X86TTI to match clang-format output.Mohammed Agabaria2017-01-051-3/+6
| | | | llvm-svn: 291095
* AVX-512: Optimized pattern for truncate with unsigned saturation.Elena Demikhovsky2017-01-051-0/+63
| | | | | | | DAG patterns optimization: truncate + unsigned saturation supported by VPMOVUS* instructions in AVX-512. Differential revision: https://reviews.llvm.org/D28216 llvm-svn: 291092
* [X86] Add Intel Kaby Lake model numbers to getHostCPUName aliased to ↵Craig Topper2017-01-051-2/+4
| | | | | | | | "skylake" since there are no feature differences. Model numbers found here http://www.sandpile.org/x86/cpuid.htm llvm-svn: 291086
* MC: support passing search paths to the IASSaleem Abdulrasool2017-01-051-0/+2
| | | | | | | This is needed to support inclusion in inline assembly via the `.include` directive. llvm-svn: 291085
* [X86] Change getHostCPUName to report Intel model 0x4e as "skylake" instead ↵Craig Topper2017-01-051-3/+11
| | | | | | | | | | | | | | | | | | | of "skylake-avx512". Add the proper 0x55 model for "skylake-avx512". Summary: Intel's i5-6300U CPU is reporting to have a model id of 78 (4e). The Host detection assumes that to be Skylake Xeon (with AVX512 support), instead of a normal Skylake machine. Patch by: Valentin Churavy Reviewers: nalimilan, craig.topper Subscribers: hfinkel, tkelman, craig.topper, nalimilan, llvm-commits Differential Revision: https://reviews.llvm.org/D28221 llvm-svn: 291084
* [libFuzzer] use /tmp (or $TMPDIR, if present) to store temp files during mergeKostya Serebryany2017-01-054-2/+13
| | | | llvm-svn: 291078
* IR: Module summary representation for type identifiers; summary test ↵Peter Collingbourne2017-01-051-0/+51
| | | | | | | | | | | | | | | scaffolding for lowertypetests. Set up basic YAML I/O support for module summaries, plumb the summary into the pass and add a few command line flags to test YAML I/O support. Bitcode support to come separately, as will the code in LowerTypeTests that actually uses the summary. Also add a couple of tests that pass by virtue of the pass doing nothing with the summary (which happens to be the correct thing to do for those tests). Differential Revision: https://reviews.llvm.org/D28041 llvm-svn: 291069
* Revert r291025 ("AMDGPU: Remove unneccessary intermediate vector")Richard Smith2017-01-051-22/+18
| | | | | | | This caused buildbot failures due to returning ArrayRefs referencing local (temporary) objects. llvm-svn: 291067
* [DWARF] Null out the debug locs of load instructions that have been moved by ↵Wolfgang Pieb2017-01-041-2/+12
| | | | | | | | | | | GVN performing partial redundancy elimination (PRE). Not doing so can cause jumpy line tables and confusing (though correct) source attributions. Differential Revision: https://reviews.llvm.org/D27857 llvm-svn: 291037
* Use lazy-loading of Metadata in MetadataLoader when importing is enabled (NFC)Mehdi Amini2017-01-042-28/+377
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a relatively simple scheme: we use the index emitted in the bitcode to avoid loading all the global metadata. Instead we load the index with their position in the bitcode so that we can load each of them individually. Materializing the global metadata block in this condition only triggers loading the named metadata, and the ones referenced from there (transitively). When materializing a function, metadata from the global block are loaded lazily as they are referenced. Two main current limitations are: 1) Global values other than functions are not materialized on demand, so we need to eagerly load METADATA_GLOBAL_DECL_ATTACHMENT records (and their transitive dependencies). 2) When we load a single metadata, we don't recurse on the operands, instead we use a placeholder or a temporary metadata. Unfortunately tepmorary nodes are very expensive. This is why we don't have it always enabled and only for importing. These two limitations can be lifted in a subsequent improvement if needed. With this change, the total link time of opt with ThinLTO and Debug Info enabled is going down from 282s to 224s (~20%). Reviewers: pcc, tejohnson, dexonsmith Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28113 llvm-svn: 291027
* Change BitstreamCursor::skipRecord to return the record code (NFC)Mehdi Amini2017-01-041-4/+14
| | | | llvm-svn: 291026
* AMDGPU: Remove unneccessary intermediate vectorMatt Arsenault2017-01-041-18/+22
| | | | llvm-svn: 291025
* InstCombine: Fold cos(-x) -> cos(x)Matt Arsenault2017-01-041-0/+14
| | | | | | Also cos(fabs(x)) -> cos(x) llvm-svn: 291022
* Reapply "Make BitCodeAbbrev ownership explicit using shared_ptr rather than ↵David Blaikie2017-01-042-94/+94
| | | | | | | | | | | | | | | | | IntrusiveRefCntPtr"" If this is a problem for anyone (shared_ptr is two pointers in size, whereas IntrusiveRefCntPtr is 1 - and the ref count control block that make_shared adds is probably larger than the one int in RefCountedBase) I'd prefer to address this by adding a lower-overhead version of shared_ptr (possibly refactoring IntrusiveRefCntPtr into such a thing) to avoid the intrusiveness - this allows memory ownership to remain orthogonal to types and at least to me, seems to make code easier to understand (since no implicit ownership acquisition can happen). This recommits 291006, reverted in r291007. llvm-svn: 291016
* [Legalizer] Fix fp-to-uint to fp-tosint promotion assertion.Tim Shen2017-01-041-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When promoting fp-to-uint16 to fp-to-sint32, the result is actually zero extended. For example, given double 65534.0, without legalization: fp-to-uint16: 65534.0 -> 0xfffe With the legalization: fp-to-sint32: 65534.0 -> 0x0000fffe Without this patch, legalization wrongly emits a signed extend assertion, which is consumed by later icmp instruction, and cause miscompile. Note that the floating point value must be in [0, 65535), otherwise the behavior is undefined. This patch reverts r279223 behavior and adds more tests and documentations. In PR29041's context, James Molloy mentioned that: We don't need to mask because conversion from float->uint8_t is undefined if the integer part of the float value is not representable in uint8_t. Therefore we can assume this doesn't happen! which is totally true and good, because fptoui is documented clearly to have undefined behavior when overflow/underflow happens. We should take the advantage of this behavior so that we can save unnecessary mask instructions. Reviewers: jmolloy, nadav, echristo, kbarton Subscribers: mehdi_amini, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D28284 llvm-svn: 291015
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