summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* [WinEH] Don't skip landing pads that end with an unreachable instruction.Andrew Kaylor2015-04-231-6/+4
| | | | llvm-svn: 235563
* Switch lowering: extract jump tables and bit tests before building binary ↵Hans Wennborg2015-04-224-765/+903
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tree (PR22262) This is a re-commit of r235101, which also fixes the problems with the previous patch: - Switches with only a default case and non-fallthrough were handled incorrectly - The previous patch tickled a bug in PowerPC Early-Return Creation which is fixed here. > This is a major rewrite of the SelectionDAG switch lowering. The previous code > would lower switches as a binary tre, discovering clusters of cases > suitable for lowering by jump tables or bit tests as it went along. To increase > the likelihood of finding jump tables, the binary tree pivot was selected to > maximize case density on both sides of the pivot. > > By not selecting the pivot in the middle, the binary trees would not always > be balanced, leading to performance problems in the generated code. > > This patch rewrites the lowering to search for clusters of cases > suitable for jump tables or bit tests first, and then builds the binary > tree around those clusters. This way, the binary tree will always be balanced. > > This has the added benefit of decoupling the different aspects of the lowering: > tree building and jump table or bit tests finding are now easier to tweak > separately. > > For example, this will enable us to balance the tree based on profile info > in the future. > > The algorithm for finding jump tables is quadratic, whereas the previous algorithm > was O(n log n) for common cases, and quadratic only in the worst-case. This > doesn't seem to be major problem in practice, e.g. compiling a file consisting > of a 10k-case switch was only 30% slower, and such large switches should be rare > in practice. Compiling e.g. gcc.c showed no compile-time difference. If this > does turn out to be a problem, we could limit the search space of the algorithm. > > This commit also disables all optimizations during switch lowering in -O0. > > Differential Revision: http://reviews.llvm.org/D8649 llvm-svn: 235560
* [InstCombine] Use a more targeted fix instead of r235544David Majnemer2015-04-221-9/+8
| | | | | | | | | Only clear out the NSW/NUW flags if we are optimizing 'add'/'sub' while taking advantage that the sign bit is not set. We do this optimization to further shrink the mask but shrinking the mask isn't NSW/NUW preserving in this case. llvm-svn: 235558
* [SEH] Remove the old __C_specific_handler code now that WinEHPrepare worksReid Kleckner2015-04-224-121/+2
| | | | | | | | | | This removes the -sehprepare flag and makes __C_specific_handler functions always to use WinEHPrepare. This was tested by building all of chromium_builder_tests and running a few tests that use SEH, but if something breaks, we can revert this. llvm-svn: 235557
* [RuntimeDyld][COFF] Add external symbol resolution support to RuntimeDyldCOFF.Lang Hames2015-04-221-14/+16
| | | | | | Patch by Andy Ayers. Thanks Andy! llvm-svn: 235554
* [Hexagon] Some cleanup of instruction selection codeKrzysztof Parzyszek2015-04-225-800/+709
| | | | llvm-svn: 235552
* [WinEH] Demote values and phis live across exception handlers up frontReid Kleckner2015-04-221-68/+277
| | | | | | | | | | | | | | | | | | In particular, this handles SSA values that are live *out* of a handler. The existing code only handles values that are live *in* to a handler. It also handles phi nodes in the block where normal control should resume after the end of a catch handler. When EH return points have phi nodes, we need to split the return edge. It is impossible for phi elimination to emit copies in the previous block if that block gets outlined. The indirectbr that we leave in the function is only notional, and is eliminated from the MachineFunction CFG early on. Reviewers: majnemer, andrew.w.kaylor Differential Revision: http://reviews.llvm.org/D9158 llvm-svn: 235545
* [InstCombine] Clear out nsw/nuw if we modify computation in the chainDavid Majnemer2015-04-221-3/+10
| | | | | | | | | | | | An nsw/nuw operation relies on the values feeding into it to not overflow if 'poison' is not to be produced. This means that optimizations which make modifications to the bottom of a chain (like SimplifyDemandedBits) must strip out nsw/nuw if they cannot ensure that they will be preserved. This fixes PR23309. llvm-svn: 235544
* [Hexagon] Use A2_tfrsi for constant pool and jump table addressesKrzysztof Parzyszek2015-04-225-78/+151
| | | | llvm-svn: 235535
* Revert "[opaque pointer type] Avoid using PointerType::getElementType for a ↵David Blaikie2015-04-226-51/+32
| | | | | | | | | | | few cases of CallInst" This reverts commit r235458. It looks like this might be breaking something LTO-ish. Looking into it & will recommit with a fix/test case/etc once I've got more to go on. llvm-svn: 235533
* [AArch64] Use MachineRegisterInfo instead of LiveIntervals to calculate ↵Pete Cooper2015-04-221-4/+4
| | | | | | | | | | | | liveness. NFC. The CondOpt pass currently uses LiveIntervals to set the dead flag on a def. This patch uses MachineRegisterInfo::use_empty instead as that is equivalent to the def being dead. This removes an instance of LiveIntervals in the pass manager pipeline and saves 3.8% of compile time on llc conpiled for AArch64. Reviewed by Chad Rosier and Zhaoshi. llvm-svn: 235532
* don't repeat function names in comments; NFCSanjay Patel2015-04-221-38/+31
| | | | llvm-svn: 235531
* [Hexagon] Consider constant-extended offsets to be validKrzysztof Parzyszek2015-04-222-10/+15
| | | | llvm-svn: 235529
* Test commit: fix typo in comment.Luqman Aden2015-04-221-2/+2
| | | | llvm-svn: 235526
* Fix Windows build break: use LLVM_FUNCTION_NAME instead of __func__.Krzysztof Parzyszek2015-04-222-2/+2
| | | | llvm-svn: 235525
* R600: Fix always inline pass breaking noinline functionsMatt Arsenault2015-04-221-2/+3
| | | | | | No test since calls are not actually supported yet. llvm-svn: 235524
* [Hexagon] Overhaul of stack object allocationKrzysztof Parzyszek2015-04-2210-447/+1328
| | | | | | | | - Use static allocation for aligned stack objects. - Simplify dynamic stack object allocation. - Simplify elimination of frame-indices. llvm-svn: 235521
* [opaque pointer type] Use pointee type retrieved from asm, rather than ↵David Blaikie2015-04-221-2/+1
| | | | | | accessing it via the pointer type llvm-svn: 235520
* [x86] Add store-folded memop patterns for vcvtps2phSanjay Patel2015-04-221-0/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D7296 llvm-svn: 235517
* [Hexagon] Treat CFI as solo instructionsKrzysztof Parzyszek2015-04-221-3/+5
| | | | llvm-svn: 235516
* [Hexagon] Implement HexagonInstPrinter::printRegNameKrzysztof Parzyszek2015-04-222-6/+7
| | | | llvm-svn: 235514
* Fix a type mismatch assert in SCEV divisionBrendon Cahoon2015-04-221-0/+8
| | | | | | | | | | | | An assert was triggered when attempting to create a new SCEV with operands of different types in the visitAddRecExpr. In this test case, the operand types of the numerator and denominator are different. The SCEV division code should generate a conservative answer when this happens. Differential Revision: http://reviews.llvm.org/D9021 llvm-svn: 235511
* [X86][AVX] Fix failure due to a missing ISel pattern to select VBROADCAST ↵Andrea Di Biagio2015-04-221-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | nodes (PR23259). This fixes a regression introduced at revision 218263. On AVX, if we optimize for size, a splat build_vector of a load is lowered into a VBROADCAST node. This is done even if the value type of the splat build_vector node is v2i64. Since AVX doesn't support v2f64/v2i64 broadcasts, revision 218263 added two extra tablegen patterns to allow selecting a VMOVDDUPrm from an X86VBroadcast where the scalar element comes from a loadi64/loadf64. However, revision 218263 forgot to add an extra fallback pattern for the case where we have a X86VBroadcast of a loadi64 with multiple uses. This patch adds the missing tablegen pattern in X86InstrSSE.td. This patch also adds an extra test to 'splat-for-size.ll' to verify that ISel doesn't crash with a 'fatal error in the backend' due to a missing AVX pattern to select v2i64 X86ISD::BROADCAST nodes. llvm-svn: 235509
* Fixed logic to enable complex FMA formation.Olivier Sallenave2015-04-221-2/+2
| | | | llvm-svn: 235508
* [mips][microMIPSr6] Implement mips32 to microMIPSr6 mapping supportZoran Jovanovic2015-04-222-3/+24
| | | | | | Differential Revision: http://reviews.llvm.org/D8661 llvm-svn: 235505
* [DAGCombine] Disable select(c, load,load) for indexed loadsHal Finkel2015-04-221-0/+3
| | | | | | | | | This turned up after r235333, but was a pre-existing bug. The optimization which transforms select(c, load, load) into a load of a select of the addresses does not handle indexed loads (pre/post inc/dec). However, it did not check for them either, leading to a crash if it tried to transform one of them. llvm-svn: 235497
* Revert "[mips][FastISel] Implement shift ops for Mips fast-isel."Vasileios Kalintiris2015-04-221-80/+0
| | | | | | | This reverts commit r235194. It was causing a failure in FastISel buildbots due to sign-extension issues. llvm-svn: 235495
* [AArch64] Disable complex GEP optimization by default.James Molloy2015-04-221-1/+1
| | | | | | | | Enough concerns were raised that this optimization is pessimising some code patterns. The obvious fix, to add a Reassociate run afterwards, causes even more pessimisation in some cases due to fewer complex addressing modes being matched. As there isn't a trivial fix for this, backing this out by default until someone gets a chance to fix the addressing mode matcher. llvm-svn: 235491
* Have more strict type checks when creating BinOp nodes in BitcodeReaderFilipe Cabecinhas2015-04-221-14/+29
| | | | | | | | | | | | Summary: Bug found with AFL. Reviewers: rafael, bkramer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9015 llvm-svn: 235489
* [patchpoint] Add support for symbolic patchpoint targets to SelectionDAG and theLang Hames2015-04-224-26/+58
| | | | | | | | | | | | X86 backend. The code generated for symbolic targets is identical to the code generated for constant targets, except that a relocation is emitted to fix up the actual target address at link-time. This allows IR and object files containing patchpoints to be cached across JIT-invocations where the target address may change. llvm-svn: 235483
* [TableGen] Use range based for loops.Craig Topper2015-04-221-14/+4
| | | | llvm-svn: 235482
* [TableGen] Remove some deletes that violate ownership semantics. These don't ↵Craig Topper2015-04-221-10/+2
| | | | | | seem to execute in our codebase today and date back to a time when there was an allocation in this function. llvm-svn: 235481
* [TableGen] Make BitRecTy::baseClassOf return true when RHS is an IntRecTy.Craig Topper2015-04-221-1/+1
| | | | | | Previously the code was accidentally checking if 'this' was an IntRecTy which it can't be since 'this' is a BitRecTy. Looking back at the history it appears it was intended to check RHS. llvm-svn: 235477
* Don't use 'nullptr' in comment. Just use 'null'.Craig Topper2015-04-221-1/+1
| | | | llvm-svn: 235476
* [opaque pointer types] Serialize the value type for atomic store instructionsDavid Blaikie2015-04-221-4/+8
| | | | | | | | Without pointee types the space optimization of storing only the pointer type and not the value type won't be viable - so add the extra type information that would be missing. llvm-svn: 235475
* [opaque pointer types] Serialize the value type for store instructionsDavid Blaikie2015-04-222-5/+9
| | | | | | | | | | Without pointee types the space optimization of storing only the pointer type and not the value type won't be viable - so add the extra type information that would be missing. Storeatomic coming soon. llvm-svn: 235474
* Linker: Add flag to override linkage rulesDuncan P. N. Exon Smith2015-04-221-6/+18
| | | | | | | | | | | | | | | | Add a flag to lib/Linker (and `llvm-link`) to override linkage rules. When set, the functions in the source module *always* replace those in the destination module. The `llvm-link` option is `-override=abc.ll`. All the "regular" modules are loaded and linked first, followed by the `-override` modules. This is useful for debugging workflows where some subset of the module (e.g., a single function) is extracted into a separate file where it's optimized differently, before being merged back in. Patch by Luqman Aden! llvm-svn: 235473
* Revert "[TableGen] Use cast instead of dyn_cast where result isn't checked ↵Craig Topper2015-04-221-1/+1
| | | | | | | | before being dereferenced." Turns out I misread the parentheses. Though I'm pretty sure its always a RecordRecTy and non of the callers really seem to expect null. But until I'm completely sure I'm going to revert this. llvm-svn: 235469
* Fix stale comment that mentioned 0 instead of nullptr. NFC.Craig Topper2015-04-221-1/+1
| | | | llvm-svn: 235468
* [TableGen] Remove Pool helper class and just use unique_ptr in the maps.Craig Topper2015-04-221-41/+24
| | | | llvm-svn: 235467
* [TableGen] Use StringRecTy::get() instead of allocating (and leaking) a ↵Craig Topper2015-04-221-2/+2
| | | | | | StringRecTy object. llvm-svn: 235466
* [TableGen] Use 'isa' to identify UnsetInits rather than comparing with the ↵Craig Topper2015-04-221-2/+2
| | | | | | singleton object created by UnsetInit::get(). Makes it more consistent with the other types. llvm-svn: 235465
* [TableGen] Use cast instead of dyn_cast where result isn't checked before ↵Craig Topper2015-04-221-1/+1
| | | | | | being dereferenced. llvm-svn: 235463
* [x86] allow 64-bit extracted vector element integer stores on a 32-bit systemSanjay Patel2015-04-221-0/+21
| | | | | | | | | | | | | | | | | | | | | With SSE2, we can generate a 'movq' or other 64-bit store op on a 32-bit system even though 64-bit integers are not legal types. So instead of producing this: pshufd $229, %xmm0, %xmm1 ## xmm1 = xmm0[1,1,2,3] movd %xmm0, (%eax) movd %xmm1, 4(%eax) We can do: movq %xmm0, (%eax) This is a fix for the problem noted in D7296. Differential Revision: http://reviews.llvm.org/D9134 llvm-svn: 235460
* [WinEH] Correctly handle inlined __finally blocks with capturesReid Kleckner2015-04-221-6/+33
| | | | | | | | We should also teach the inliner to collapse framerecover of frameaddress of the current frame down to an alloca, but that can happen later. llvm-svn: 235459
* [opaque pointer type] Avoid using PointerType::getElementType for a few ↵David Blaikie2015-04-216-32/+51
| | | | | | | | | | | | | | | | | | | | | | | | cases of CallInst Calls to llvm::Value::mutateType are becoming extra-sensitive now that instructions have extra type information that will not be derived from operands or result type (alloca, gep, load, call/invoke, etc... ). The special-handling for mutateType will get more complicated as this work continues - it might be worth making mutateType virtual & pushing the complexity down into the classes that need special handling. But with only two significant uses of mutateType (vectorization and linking) this seems OK for now. Totally open to ideas/suggestions/improvements, of course. With this, and a bunch of exceptions, we can roundtrip an indirect call site through bitcode and IR. (a direct call site is actually trickier... I haven't figured out how to deal with the IR deserializer's lazy construction of Function/GlobalVariable decl's based on the type of the entity which means looking through the "pointer to T" type referring to the global) llvm-svn: 235458
* Limiting gep merging to fix the performance problem described inWei Mi2015-04-211-0/+5
| | | | | | | | | | | | | | | | | | https://llvm.org/bugs/show_bug.cgi?id=23163. Gep merging sometimes behaves like a reverse CSE/LICM optimization, which has negative impact on performance. In this patch we restrict gep merging to happen only when the indexes to be merged are both consts, which ensures such merge is always beneficial. The patch makes gep merging only happen in very restrictive cases. It is possible that some analysis/optimization passes rely on the merged geps to get better result, and we havn't notice them yet. We will be ready to further improve it once we see the cases. Differential Revision: http://reviews.llvm.org/D8911 llvm-svn: 235455
* Revert r235451 since it is attached to a wrong Differential Revision. Sorry.Wei Mi2015-04-211-5/+0
| | | | llvm-svn: 235453
* Limiting gep merging to fix the performance problem described inWei Mi2015-04-211-0/+5
| | | | | | | | | | | | | | | | | | https://llvm.org/bugs/show_bug.cgi?id=23163. Gep merging sometimes behaves like a reverse CSE/LICM optimizations, which has negative impact on performance. In this patch we restrict gep merging to happen only when the indexes to be merged are both consts, which ensures such merge is always beneficial. The patch makes gep merging only happen in very restrictive cases. It is possible that some analysis/optimization passes rely on the merged geps to get better result, and we havn't notice them yet. We will be ready to further improve it once we see the cases. Differential Revision: http://reviews.llvm.org/D9007 llvm-svn: 235451
* [MemCpyOpt] Use the raw i8* dest when optimizing memset+memcpy.Ahmed Bougacha2015-04-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | MemIntrinsic::getDest() looks through pointer casts, and using it directly when building the new GEP+memset results in stuff like: %0 = getelementptr i64* %p, i32 16 %1 = bitcast i64* %0 to i8* call ..memset(i8* %1, ...) instead of the correct: %0 = bitcast i64* %p to i8* %1 = getelementptr i8* %0, i32 16 call ..memset(i8* %1, ...) Instead, use getRawDest, which just gives you the i8* value. While there, use the memcpy's dest, as it's live anyway. In most cases, when the optimization triggers, the memset and memcpy sizes are the same, so the built memset is 0-sized and eliminated. The problem occurs when they're different. Fixes a regression caused by r235232: PR23300. llvm-svn: 235419
OpenPOWER on IntegriCloud