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* Pass a MCSymbol to needsRelocateWithSymbol.Rafael Espindola2015-05-295-12/+11
| | | | llvm-svn: 238589
* MachineCopyPropagation: Remove the copies instead of using KILL instructions.Matthias Braun2015-05-292-22/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some history here see the commit messages of r199797 and r169060. The original intent was to fix cases like: %EAX<def> = COPY %ECX<kill>, %RAX<imp-def> %RCX<def> = COPY %RAX<kill> where simply removing the copies would have RCX undefined as in terms of machine operands only the ECX part of it is defined. The machine verifier would complain about this so 169060 changed such COPY instructions into KILL instructions so some super-register imp-defs would be preserved. In r199797 it was finally decided to always do this regardless of super-register defs. But this is wrong, consider: R1 = COPY R0 ... R0 = COPY R1 getting changed to: R1 = KILL R0 ... R0 = KILL R1 It now looks like R0 dies at the first KILL and won't be alive until the second KILL, while in reality R0 is alive and must not change in this part of the program. As this only happens after register allocation there is not much code still performing liveness queries so the issue was not noticed. In fact I didn't manage to create a testcase for this, without unrelated changes I am working on at the moment. The fix is simple: As of r223896 the MachineVerifier allows reads from partially defined registers, so the whole transforming COPY->KILL thing is not necessary anymore. This patch also changes a similar (but more benign case as the def and src are the same register) case in the VirtRegRewriter. Differential Revision: http://reviews.llvm.org/D10117 llvm-svn: 238588
* [YAMLIO] Make line-wrapping configurable and test it.Frederic Riss2015-05-291-3/+4
| | | | | | | | | | | | | | | | Summary: We would wrap flow mappings and sequences when they go over a hardcoded 70 characters limit. Make the wrapping column configurable (and default to 70 co the change should be NFC for current users). Passing 0 allows to completely suppress the wrapping which makes it easier to handle in tools like FileCheck. Reviewers: bogner Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10109 llvm-svn: 238584
* Move common symbol related information from MCSectionData to MCSymbol.Rafael Espindola2015-05-299-27/+22
| | | | llvm-svn: 238583
* Store MCSymbols in PendingLabels.Rafael Espindola2015-05-291-2/+3
| | | | llvm-svn: 238582
* Move SymbolSize from MCSymbolData to MCSymbol.Rafael Espindola2015-05-292-5/+4
| | | | llvm-svn: 238580
* Fix crash in MCExpr::print.Pete Cooper2015-05-291-1/+1
| | | | | | | | | | | | Symbols are no longer required to be named, but this leads to a crash here if an unnamed symbol checks that its first character is '$'. Change the code to first check for a name, then check its first character. No test case i'm afraid as this is debugging code, but any test case with temp labels and 'llc --debug --filetype=obj' would have crashed. llvm-svn: 238579
* Add support for VSX FMA single-precision instructions to the PPC back endNemanja Ivanovic2015-05-292-9/+94
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D9941 It adds the various FMA instructions introduced in the version 2.07 of the ISA along with the testing for them. These are operations on single precision scalar values in VSX registers. llvm-svn: 238578
* MIR Serialization: use correct line and column numbers for LLVM IR errors.Alex Lorenz2015-05-291-1/+40
| | | | | | | | | | | | | This commit translates the line and column numbers for LLVM IR errors from the numbers in the YAML block scalar to the numbers in the MIR file so that the MIRParser users can report LLVM IR errors with the correct line and column numbers. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10108 llvm-svn: 238576
* [WinEH] Emit EH tables for __CxxFrameHandler3 on 32-bit x86Reid Kleckner2015-05-297-140/+200
| | | | | | | | | | | | | Small (really small!) C++ exception handling examples work on 32-bit x86 now. This change disables the use of .seh_* directives in WinException when CFI is not in use. It also uses absolute symbol references in the tables instead of imagerel32 relocations. Also fixes a cache invalidation bug in MMI personality classification. llvm-svn: 238575
* [NVPTXFavorNonGenericAddrSpaces] recursively trace into GEP and BitCastJingyue Wu2015-05-291-60/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch allows NVPTXFavorNonGenericAddrSpaces to remove addrspacecast from longer chains consisting of GEPs and BitCasts. For example, it can now optimize %0 = addrspacecast [10 x float] addrspace(3)* @a to [10 x float]* %1 = gep [10 x float]* %0, i64 0, i64 %i %2 = bitcast float* %1 to i32* %3 = load i32* %2 ; emits ld.u32 to %0 = gep [10 x float] addrspace(3)* @a, i64 0, i64 %i %1 = bitcast float addrspace(3)* %0 to i32 addrspace(3)* %3 = load i32 addrspace(3)* %1 ; emits ld.shared.f32 Test Plan: @ld_int_from_global_float in access-non-generic.ll Reviewers: broune, eliben, jholewinski, meheff Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10074 llvm-svn: 238574
* [DependenceAnalysis] Extend unifySubscriptType for handling coupled ↵Jingyue Wu2015-05-291-17/+53
| | | | | | | | | | | | | | | | | | | | | | | subscript groups. Summary: In continuation to an earlier commit to DependenceAnalysis.cpp by jingyue (r222100), the type for all subscripts in a coupled group need to be the same since constraints from one subscript may be propagated to another during testing. During testing, new SCEVs may be created and the operands for these need to be the same. This patch extends unifySubscriptType() to work on lists of subscript pairs, ensuring a common extended type for all of them. Test Plan: Added a test case to NonCanonicalizedSubscript.ll which causes dependence analysis to crash without this fix. All regression tests pass. Reviewers: spop, sebpop, jingyue Reviewed By: jingyue Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9698 llvm-svn: 238573
* Simplify now that symbols contain the correct section.Rafael Espindola2015-05-291-9/+4
| | | | | | | The complexity in here was because before r233995 variable symbols would report the incorrect section. llvm-svn: 238559
* [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle ↵Colin LeMahieu2015-05-2912-160/+408
| | | | | | at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. llvm-svn: 238556
* Fix ELFObjectWriter::isLocal for signature symbols.Rafael Espindola2015-05-291-8/+8
| | | | | | | | | And with that simplify the logic for inserting them in ExternalSymbolData or LocalSymbolData. No functionality change overall since the old code avoided the isLocal bug. llvm-svn: 238555
* [mips] Remove 2 unused variables in MipsTargetStreamer.cpp. NFC.Toma Tabacu2015-05-291-2/+0
| | | | llvm-svn: 238554
* [TableGen] Remove convertValue functions for UnOpInit, BinOpInit, and ↵Craig Topper2015-05-291-48/+0
| | | | | | | | TernOpInit as they weren't able to be called. I don't think converting the inputs to the Ops was the right behavior anyway. llvm-svn: 238543
* This should have been a referenceMatthias Braun2015-05-291-1/+1
| | | | llvm-svn: 238540
* CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperandsMatthias Braun2015-05-2912-91/+99
| | | | | | | | | | | | | | | | | | | | | | | | MIOperands/ConstMIOperands are classes iterating over the MachineOperand of a MachineInstr, however MachineInstr::mop_iterator does the same thing. I assume these two iterators exist to have a uniform interface to iterate over the operands of a machine instruction bundle and a single machine instruction. However in practice I find it more confusing to have 2 different iterator classes, so this patch transforms (nearly all) the code to use mop_iterators. The only exception being MIOperands::anlayzePhysReg() and MIOperands::analyzeVirtReg() still needing an equivalent, I leave that as an exercise for the next patch. Differential Revision: http://reviews.llvm.org/D9932 This version is slightly modified from the proposed revision in that it introduces MachineInstr::getOperandNo to avoid the extra counting variable in the few loops that previously used MIOperands::getOperandNo. llvm-svn: 238539
* [IR] fptrunc-of-fptrunc isn't an EliminableCastPair.Ahmed Bougacha2015-05-291-1/+1
| | | | | | | Double and single rounding can produce different results. This is the IR counterpart to r228911. llvm-svn: 238531
* MachineFrameInfo: Simplify pristine register calculation.Matthias Braun2015-05-285-50/+9
| | | | | | | | | | | | | | | | | | | | | | | | | About pristine regsiters: Pristine registers "hold a value that is useless to the current function, but that must be preserved - they are callee saved registers that have not been saved." This concept saves compile time as it frees the prologue/epilogue inserter from adding every such register to every basic blocks live-in list. However the current code in getPristineRegs is formulated in a complicated way: Inside the function prologue and epilogue all callee saves are considered pristine, while in the rest of the code only the non-saved ones are considered pristine. This requires logic to differentiate between prologue/epilogue and the rest and in the presence of shrink-wrapping this even becomes complicated/expensive. It's also unnecessary because the prologue epilogue inserters already mark callee-save registers that are saved/restores properly in the respective blocks in the prologue/epilogue (see updateLiveness() in PrologueEpilogueInserter.cpp). So only declaring non-saved/restored callee saved registers as pristine just works. Differential Revision: http://reviews.llvm.org/D10101 llvm-svn: 238524
* Fix typos in variable/grammar names.Eric Christopher2015-05-281-6/+6
| | | | llvm-svn: 238523
* Rename Win64Exception.(cpp|h) to WinException.(cpp|h)Reid Kleckner2015-05-284-18/+18
| | | | | | | This is in preparation for reusing this for 32-bit x86 EH table emission. Also updates the type name for consistency. NFC llvm-svn: 238521
* MIR Serialization: print and parse machine function names.Alex Lorenz2015-05-282-15/+81
| | | | | | | | | | | | | | | | | | This commit introduces a serializable structure called 'llvm::yaml::MachineFunction' that stores the machine function's name. This structure will mirror the machine function's state in the future. This commit prints machine functions as YAML documents containing a YAML mapping that stores the state of a machine function. This commit also parses the YAML documents that contain the machine functions. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D9841 llvm-svn: 238519
* [MachineCopyPropagation] Fix a bug with undef handling when the value is ↵Quentin Colombet2015-05-281-5/+9
| | | | | | | | actualy alive. Test case will follow. llvm-svn: 238518
* [WinEH] Start inserting state number stores for C++ EHReid Kleckner2015-05-283-413/+537
| | | | | | | | | | | | This moves all the state numbering code for C++ EH to WinEHPrepare so that we can call it from the X86 state numbering IR pass that runs before isel. Now we just call the same state numbering machinery and insert a bunch of stores. It also populates MachineModuleInfo with information about the current function. llvm-svn: 238514
* Don't special case undefined symbol when deciding the symbol order.Rafael Espindola2015-05-281-9/+1
| | | | | | | | | ELF has no restrictions on where undefined symbols go relative to other defined symbols. In fact, gas just sorts them together. Do the same. This was there since r111174 probably just because the MachO writer has it. llvm-svn: 238513
* Enable exitValue rewrite only when the cost of expansion is low.Wei Mi2015-05-282-24/+154
| | | | | | | | The patch evaluates the expansion cost of exitValue in indVarSimplify pass, and only does the rewriting when the expansion cost is low or loop can be deleted with the rewriting. It provides an option "-replexitval=" to control the default aggressiveness of the exitvalue rewriting. It also fixes some missing cases in SCEVExpander::isHighCostExpansionHelper to enhance the evaluation of SCEV expansion cost. Differential Revision: http://reviews.llvm.org/D9800 llvm-svn: 238507
* Remove a trivial forwarding function. NFC.Rafael Espindola2015-05-2816-36/+35
| | | | llvm-svn: 238506
* [SelectionDAG] Scalar shift amounts may require legalizationDavid Majnemer2015-05-281-3/+6
| | | | | | | | | The shift amount may be too small to cope with promoted left hand side, make sure to promote it as well. This fixes PR23664. llvm-svn: 238503
* Remove debug prints from r238487Reid Kleckner2015-05-281-6/+1
| | | | llvm-svn: 238501
* Inline trivial method. NFC.Rafael Espindola2015-05-281-14/+2
| | | | llvm-svn: 238492
* Disable x86 tail call optimizations that jump through GOTReid Kleckner2015-05-281-2/+20
| | | | | | | | | | | | | | | | | | | | For x86 targets, do not do sibling call optimization when materializing the callee's address would require a GOT relocation. We can still do tail calls to internal functions, hidden functions, and protected functions, because they do not require this kind of relocation. It is still possible to get GOT relocations when the user explicitly asks for it with musttail or -tailcallopt, both of which are supposed to guarantee TCO. Based on a patch by Chih-hung Hsieh. Reviewers: srhines, timmurray, danalbert, enh, void, nadav, rnk Subscribers: joerg, davidxl, llvm-commits Differential Revision: http://reviews.llvm.org/D9799 llvm-svn: 238487
* Revert r238427 - [mips] Make TTypeEncoding indirect to allow .eh_frame to be ↵Daniel Sanders2015-05-281-10/+3
| | | | | | | | read-only. It caused a smaller number of failures than the previous attempt at committing but still caused a couple on the llvm-linux-mips builder. Reverting while I investigate the remainder. llvm-svn: 238483
* Remove structure field that can be computed just before use.Rafael Espindola2015-05-281-14/+15
| | | | llvm-svn: 238480
* Avoid warnings when building without asserts.Rafael Espindola2015-05-281-7/+2
| | | | llvm-svn: 238479
* Move these vectors to the only function where they are used.Rafael Espindola2015-05-281-6/+4
| | | | llvm-svn: 238477
* Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM.Peter Collingbourne2015-05-286-33/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | We were previously codegen'ing these as regular load/store operations and hoping that the register allocator would allocate registers in ascending order so that we could apply an LDM/STM combine after register allocation. According to the commit that first introduced this code (r37179), we planned to teach the register allocator to allocate the registers in ascending order. This never got implemented, and up to now we've been stuck with very poor codegen. A much simpler approach for achiveing better codegen is to create LDM/STM instructions with identical sets of virtual registers, let the register allocator pick arbitrary registers and order register lists when printing an MCInst. This approach also avoids the need to repeatedly calculate offsets which ultimately ought to be eliminated pre-RA in order to decrease register pressure. This is implemented by lowering the memcpy intrinsic to a series of SD-only MCOPY pseudo-instructions which performs a memory copy using a given number of registers. During SD->MI lowering, we lower MCOPY to LDM/STM. This is a little unusual, but it avoids the need to encode register lists in the SD, and we can take advantage of SD use lists to decide whether to use the _UPD variant of the instructions. Fixes PR9199. Differential Revision: http://reviews.llvm.org/D9508 llvm-svn: 238473
* [WinEH] Remove debugging dump() callReid Kleckner2015-05-281-1/+0
| | | | llvm-svn: 238472
* Merge redundant loops. NFC.Rafael Espindola2015-05-281-18/+11
| | | | llvm-svn: 238471
* AsmPrinter: Stop exposing underlying DIE children list, NFCDuncan P. N. Exon Smith2015-05-284-8/+5
| | | | | | | Update `DIE` API to hide the implementation of `DIE::Children` so we can swap it out. llvm-svn: 238468
* Simplify LastLocalSymbolIndex computation. NFC.Rafael Espindola2015-05-281-4/+2
| | | | llvm-svn: 238465
* Use range loops. NFC.Rafael Espindola2015-05-281-7/+3
| | | | llvm-svn: 238463
* Add BranchProbabilityInfo::releaseMemory to clear the Weights field.Pete Cooper2015-05-281-0/+4
| | | | | | | | BranchProbabilityInfo was leaking 3MB of memory when running 'opt -O2 verify-uselistorder.lto.bc'. This was due to the Weights member not being cleared once the pass is no longer needed. This adds the releaseMemory override to clear that field. The other fields are cleared at the end of runOnFunction so can stay there. llvm-svn: 238462
* Remove temporary FileSymbolData. NFC.Rafael Espindola2015-05-281-12/+8
| | | | llvm-svn: 238461
* AsmPrinter: Rename begin_values() => values_begin(), NFCDuncan P. N. Exon Smith2015-05-281-2/+2
| | | | llvm-svn: 238456
* [llvm] Parameterizing the output stream for dumpbytes and outputting ↵Colin LeMahieu2015-05-281-0/+9
| | | | | | directly to stream. llvm-svn: 238453
* [InstCombine] Fold IntToPtr and PtrToInt into preceding loads.David Majnemer2015-05-281-5/+10
| | | | | | | | | | | Currently we only fold a BitCast into a Load when the BitCast is its only user. Do the same for any no-op cast. Differential Revision: http://reviews.llvm.org/D9152 llvm-svn: 238452
* Reuse Loc variable. NFC.Chad Rosier2015-05-281-1/+1
| | | | llvm-svn: 238448
* Use range loops for accessing file names. NFC.Rafael Espindola2015-05-282-10/+9
| | | | llvm-svn: 238446
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