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* I'm starting to commit KNL backend. I'll push patches one-by-one. This patch ↵Elena Demikhovsky2013-07-248-27/+190
| | | | | | | | includes support for the extended register set XMM16-31, YMM16-31, ZMM0-31. The full ISA you can see here: http://software.intel.com/en-us/intel-isa-extensions llvm-svn: 187030
* Fix PR16687 where we were incorrectly promoting an alloca that hadChandler Carruth2013-07-241-12/+29
| | | | | | | | | | | | | | | | | | | | | | pending speculation for a phi node. The problem here is that we were using growth of the specluation set as an indicator of whether speculation would occur, and if the phi node is already in the set we don't see it grow. This is a symptom of the fact that this signal is a total hack. Unfortunately, I couldn't really come up with a non-hacky way of signaling that promotion remains valid *after* speculation occurs, such that we only speculate when all else looks good for promotion. In the end, I went with at least a much more explicit approach of doing the work of queuing inside the phi and select processing and setting a preposterously named flag to convey that we're in the special state of requiring speculating before promotion. Thanks to Richard Trieu and Nick Lewycky for the excellent work reducing a testcase for this from a pretty giant, nasty assert in a big application. =] The testcase was excellent. llvm-svn: 187029
* allow tests to run on powerpc-darwin8 again, checking for __ppc__David Fang2013-07-241-2/+2
| | | | llvm-svn: 187027
* Split generated asm mnemonic matching table into a separate table for each ↵Craig Topper2013-07-245-1/+5
| | | | | | | | asm variant. This removes the need to store the asm variant in each row of the single table that existed before. Shaves ~16K off the size of X86AsmParser.o. llvm-svn: 187026
* Revert accidental commit.Craig Topper2013-07-241-1/+1
| | | | llvm-svn: 187021
* Fix aliases for shrd/shld to handle Intel syntax properly. Also suppress ↵Craig Topper2013-07-242-14/+14
| | | | | | them from being used by the asm printer. llvm-svn: 187020
* [mips] Use pristine object file while processing relocations.Akira Hatanaka2013-07-241-7/+20
| | | | | | | | | | | | | | | | | | | Similar to ARM change r182800, dynamic linker will read bits/addends from the original object rather than from the object that might have been patched previously. For the purpose of relocations for MCJIT stubs on MIPS, we internally use otherwise unused MIPS relocations. The change also enables MCJIT unit tests for MIPS (EL/BE), and the following two tests now pass: - MCJITTest.return_global and - MCJITTest.multiple_functions. These issues have been tracked as Bug 16250. Patch by Petar Jovanovic. llvm-svn: 187019
* Replace with a "null" RAUW with an assert since we'd actually likeEric Christopher2013-07-241-8/+8
| | | | | | to assume we're replacing. Clarify comments. llvm-svn: 187018
* Remove dead code.Eric Christopher2013-07-241-5/+0
| | | | llvm-svn: 187017
* Remove unnecessary constructors as the default conversions will handleEric Christopher2013-07-241-18/+0
| | | | | | | all enumerated cases. Reformat the rest of the existing constructors to match. llvm-svn: 187015
* More constructor cleanup.Eric Christopher2013-07-241-6/+0
| | | | | | | Move to a single constructor with a default argument and avoid the check and nullification. llvm-svn: 187014
* Collapse logic and move and reword comment for clarity.Eric Christopher2013-07-241-3/+5
| | | | llvm-svn: 187013
* Add a fixme and reformat.Eric Christopher2013-07-241-4/+3
| | | | llvm-svn: 187012
* DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)FreeTom Stellard2013-07-233-2/+19
| | | | | | | This commit also implements these functions for R600 and removes a test case that was relying on the buggy behavior. llvm-svn: 187007
* R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessaryTom Stellard2013-07-232-19/+7
| | | | | | | | | | These are really the same address space in hardware. The only difference is that CONSTANT_ADDRESS uses a special cache for faster access. When we are unable to use the constant kcache for some reason (e.g. smaller types or lack of indirect addressing) then the instruction selector must use GLOBAL_ADDRESS loads instead. llvm-svn: 187006
* Debug Info: improve the Finder.Manman Ren2013-07-231-0/+9
| | | | | | | Improve the Finder to handle context of a DIVariable. If Scope is a DICompileUnit, add it to the list of CUs. llvm-svn: 187003
* Debug Info: clean up.Manman Ren2013-07-231-18/+6
| | | | llvm-svn: 187002
* Remove unused function.Eric Christopher2013-07-231-7/+0
| | | | llvm-svn: 187001
* [ARM][ISel] Improve the lowering of vector loads.Quentin Colombet2013-07-231-1/+3
| | | | | | | | | | | | | | | | When vectors are built from a single value, the ARM lowering issues a scalar_to_vector node. This node is then always morphed into a move from the general purpose unit to the vector unit. When the value comes from a load, this can be simplified into a vector load to the right lane. This patch changes the lowering of insert_vector_elt to expose a vector friendly pattern in this situation. This is a step toward fixing <rdar://problem/14170854>. llvm-svn: 186999
* Fix spellingMatt Arsenault2013-07-231-1/+1
| | | | llvm-svn: 186997
* Reformat options.Eric Christopher2013-07-231-40/+41
| | | | llvm-svn: 186994
* Debug Info: code cleanup, use getNodeField if possible.Manman Ren2013-07-231-28/+15
| | | | | | | Use getNodeField to access a field as a MDNode. No functionality change. llvm-svn: 186985
* Split getOpenFile into getOpenFile and getOpenFileSlice.Rafael Espindola2013-07-231-7/+25
| | | | | | | | | | | | | | | | The main observation is that we never need both the filesize and the map size. When mapping a slice of a file, it doesn't make sense to request a null terminator and that would be the only case where the filesize would be used. There are other cleanups that should be done in this area: * A client should not have to pass the size (even an explicit -1) to say if it wants a null terminator or not, so we should probably swap the argument order. * The default should be to not require a null terminator. Very few clients require this, but many end up asking for it just because it is the default. llvm-svn: 186984
* DebugInfo Verifier: verify the actual type.Manman Ren2013-07-231-0/+10
| | | | llvm-svn: 186972
* Revert "Remove use of asymmetric std::lower_bound comparator."Ahmed Bougacha2013-07-231-18/+12
| | | | | | | This reverts commit r185676. Originally done because of VS 2008. llvm-svn: 186969
* Remove some errant space charcters in mnemonic strings.Craig Topper2013-07-232-12/+12
| | | | llvm-svn: 186932
* Don't let x86 asm printer use the no operand movsd alias. It should use the ↵Craig Topper2013-07-231-1/+1
| | | | | | normal movsl instead. llvm-svn: 186924
* R600: Add support for 24-bit MAD instructionsTom Stellard2013-07-232-2/+12
| | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186923
* R600: Add support for 24-bit MUL instructionsTom Stellard2013-07-234-5/+75
| | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186922
* R600: Improve support for < 32-bit loadsTom Stellard2013-07-234-11/+39
| | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186921
* R600: Rename AMDILISelDAGToDAG.cpp -> AMDGPUISelDAGToDAG.cppTom Stellard2013-07-232-1/+1
| | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186920
* R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select()Tom Stellard2013-07-234-49/+160
| | | | | | | | | | This increases the number of opportunites we have for folding. With the previous implementation we were unable to fold into any instructions other than the first when multiple instructions were selected from a single SDNode. Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186919
* R600: Use KCache for kernel argumentsTom Stellard2013-07-234-49/+22
| | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186918
* R600: Simplify assembly for KCache registers using the TableGen !add operatorTom Stellard2013-07-231-4/+4
| | | | | | | | | | | | | Before: MOV * T0.W, KC0[131-128].Y After: MOV * T0.W, KC0[3].Y Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186917
* R600: Use the same compute kernel calling convention for all GPUsTom Stellard2013-07-233-11/+27
| | | | | | | | A side-effect of this is that now the compiler expects kernel arguments to be 4-byte aligned. Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186916
* R600: Use correct LoadExtType when lowering kernel argumentsTom Stellard2013-07-231-1/+9
| | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186915
* R600: Clean up extended load patternsTom Stellard2013-07-234-15/+31
| | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186914
* R600: Expand vector FNEGTom Stellard2013-07-231-0/+3
| | | | llvm-svn: 186913
* Revert r186907 to fix bots.Craig Topper2013-07-231-1/+1
| | | | llvm-svn: 186910
* Don't let x86 asm printer use the no operand movsd alias. It should use the ↵Craig Topper2013-07-231-1/+1
| | | | | | normal movsl instead. llvm-svn: 186907
* Add aliases to map 'imm, mem' form of x86 bts/btr/btc without a size suffix ↵Craig Topper2013-07-231-0/+7
| | | | | | | | to their 32-bit forms. This makes them consistent with 'bt' which already had this handling. gas has the same behavior. There have been discussions on the mailing list about determining size based on the immediate, but my goal here was just to remove the inconsistency. llvm-svn: 186904
* Debug Info Finder: use processDeclare and processValue to list debug infoManman Ren2013-07-232-1/+36
| | | | | | | | | | | MDNodes used by DbgDeclareInst and DbgValueInst. Another 16 testing cases failed and they are disabled with -disable-debug-info-verifier. A total of 34 cases are disabled with -disable-debug-info-verifier and will be corrected. llvm-svn: 186902
* Explicitly don't let the asm printer use the clrb/w/l aliases for xor %reg, ↵Craig Topper2013-07-231-4/+4
| | | | | | | | %reg. It only didn't use it before because it seems InstAlias handling in the asm printer fails to count tied operands so it tried to find an xor with 2 operands instead of the 3 it wfails to count tied. llvm-svn: 186900
* Suppress argumentless aliases for some x86 FP operations from being used by ↵Craig Topper2013-07-231-14/+14
| | | | | | the asm writer. Prefer to use the explicit %st(1) form. llvm-svn: 186897
* Remove extraneous null statement. No functionality change!Nick Lewycky2013-07-221-1/+1
| | | | llvm-svn: 186893
* Use switch instead of if. No functionality change.Jakub Staszak2013-07-221-14/+17
| | | | llvm-svn: 186892
* Remove trailing spaces.Jakub Staszak2013-07-221-37/+37
| | | | llvm-svn: 186890
* Typo.Eric Christopher2013-07-221-1/+1
| | | | llvm-svn: 186886
* 80-column tidying. Formatting choices by clang-format.Eric Christopher2013-07-221-14/+16
| | | | llvm-svn: 186885
* When we vectorize across multiple basic blocks we may vectorize PHINodes ↵Nadav Rotem2013-07-221-3/+31
| | | | | | that create a cycle. We already break the cycle on phi-nodes, but arithmetic operations are still uplicated. This patch adds code that checks if the operation that we are vectorizing was vectorized during the visit of the operands and uses this value if it can. llvm-svn: 186883
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