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* Revert "Revert "Invariant start/end intrinsics overloaded for address space""Mehdi Amini2016-08-131-1/+27
| | | | | | This reverts commit 32fc6488e48eafc0ca1bac1bd9cbf0008224d530. llvm-svn: 278609
* Revert "Invariant start/end intrinsics overloaded for address space"Mehdi Amini2016-08-131-27/+1
| | | | | | This reverts commit r276447. llvm-svn: 278608
* [IRCE] Use dyn_cast instead of explicit isa/cast; NFCSanjoy Das2016-08-131-10/+8
| | | | llvm-svn: 278607
* [IRCE] Use range-for; NFCSanjoy Das2016-08-131-5/+3
| | | | llvm-svn: 278606
* Test commitAditya Kumar2016-08-131-2/+4
| | | | llvm-svn: 278598
* [X86] Add a check of isCommutable at the top of ↵Craig Topper2016-08-131-0/+3
| | | | | | | | X86InstrInfo::findCommutedOpIndices. Most callers don't check if the instruction is commutable before calling. This saves us the trouble of ending up in the default of the switch and having to determine if this is an FMA or not. llvm-svn: 278597
* [AVX-512] Add isCommutable to scalar FMA3 instructions.Craig Topper2016-08-131-5/+5
| | | | llvm-svn: 278596
* [AVX-512] Add commutable flags to 132 form FMA3 instructions.Craig Topper2016-08-131-3/+3
| | | | llvm-svn: 278595
* [X86] Remove patterns for (vzmovl (insert_subvector undef, ↵Craig Topper2016-08-131-11/+0
| | | | | | (scalar_to_vector))) as the (vzmovl VR256) pattern has higher priority. NFC llvm-svn: 278594
* [AVX-512] Remove an AddedComplexity that was prioritizing basic vzmovl ↵Craig Topper2016-08-131-1/+1
| | | | | | patterns over more complex ones that produce better code. llvm-svn: 278593
* [AVX-512] Add patterns to support VZEXT_MOVL from 512-bit vectors with ↵Craig Topper2016-08-131-1/+16
| | | | | | | | 64-bit and 32-bit elements. Fixes PR28961. llvm-svn: 278592
* [PM] Port LoopDataPrefetch to new pass managerTeresa Johnson2016-08-134-61/+103
| | | | | | | | | | | | | | | | Summary: Refactor the existing support into a LoopDataPrefetch implementation class and a LoopDataPrefetchLegacyPass class that invokes it. Add a new LoopDataPrefetchPass for the new pass manager that utilizes the LoopDataPrefetch implementation class. Reviewers: mehdi_amini Subscribers: sanjoy, mzolotukhin, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D23483 llvm-svn: 278591
* AMDGPU: Fix not estimating MBB operand sizes correctlyMatt Arsenault2016-08-132-2/+26
| | | | llvm-svn: 278590
* AMDGPU: Fix missing test for addressing mode with odd offsetsMatt Arsenault2016-08-131-0/+1
| | | | | | Add test if the constant offset looks unaligned. llvm-svn: 278589
* AMDGPU/R600: Remove macrosMatt Arsenault2016-08-135-36/+33
| | | | llvm-svn: 278588
* Fix more dereferenced end() iterators after r278532Hans Wennborg2016-08-135-8/+16
| | | | llvm-svn: 278587
* Constify ValueTracking. NFC.Pete Cooper2016-08-131-99/+125
| | | | | | | Almost all of the method here are only analysing Value's as opposed to mutating them. Mark all of the easy ones as const. llvm-svn: 278585
* [IndVars] Ignore (s|z)exts that don't extend the induction variableSanjoy Das2016-08-131-0/+8
| | | | | | | | | | | | | | | | | | `IVVisitor::visitCast` used to have the invariant that if the instruction it was passed was a sext or zext instruction, the result of the instruction would be wider than the induction variable. This is no longer true after rL275037, so this change teaches `IndVarSimplify` s implementation of `IVVisitor::visitCast` to work with the relaxed invariant. A corresponding change to SimplifyIndVar to preserve the said invariant after rL275037 would also work, but given how `IVVisitor::visitCast` is spelled (no indication of said invariant), I figured the current fix is cleaner. Fixes PR28935. llvm-svn: 278584
* Fix some Clang-tidy modernize-use-using and Include What You Use warnings.Eugene Zelenko2016-08-132-18/+78
| | | | | | Differential revision: https://reviews.llvm.org/D23478 llvm-svn: 278583
* [LSV] Use a set rather than an ArraySlice at the end of ↵Justin Lebar2016-08-131-6/+5
| | | | | | | | | | | | | | getVectorizablePrefix. NFC Summary: This avoids a small O(n^2) loop. Reviewers: asbirlea Subscribers: mzolotukhin, llvm-commits, arsenm Differential Revision: https://reviews.llvm.org/D23473 llvm-svn: 278581
* [LSV] Use OrderedBasicBlock instead of rolling it ourselves. NFCJustin Lebar2016-08-131-23/+21
| | | | | | | | | | | | | | | | | | | Summary: In getVectorizablePrefix, this is less efficient (because we have to iterate over the BB twice), but boy is it simpler. Given how much trouble we've had here, I think the simplicity gain is worthwhile. In reorder(), this is actually more efficient, as DominatorTree::dominates iterates over the BB from the beginning when the two instructions are in the same BB. Reviewers: asbirlea Subscribers: arsenm, llvm-commits, mzolotukhin Differential Revision: https://reviews.llvm.org/D23472 llvm-svn: 278580
* Minor comment fix ("generate" --> "generates").Justin Lebar2016-08-121-1/+1
| | | | llvm-svn: 278578
* X86: Fix another dereferenced end() iterator after r278532Hans Wennborg2016-08-121-1/+1
| | | | llvm-svn: 278577
* Reapply [BranchFolding] Restrict tail merging loop blocks after MBPHaicheng Wu2016-08-121-9/+23
| | | | | | | | | Fixed a bug in the test case. To fix PR28104, this patch restricts tail merging to blocks that belong to the same loop after MBP. llvm-svn: 278575
* Avoid accessing LLVM/DWARF register mappings if undefinedDominic Chen2016-08-121-0/+4
| | | | | | | | | | | | | | | | | Summary: If the backend does not define LLVM/DWARF register mappings, the associated variables are undefined since the map initializer is called by auto-generated TableGen routines. This patch initializes the pointers and sizes to nullptr and zero, respectively, and checks that they are valid before searching for a mapping. Reviewers: grosbach, dschuff Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23458 llvm-svn: 278574
* [LoopVectorize] Detect loops in the innermost loop before creating ↵Tim Shen2016-08-121-6/+87
| | | | | | | | | | | | | InnerLoopVectorizer InnerLoopVectorizer shouldn't handle a loop with cycles inside the loop body, even if that cycle isn't a natural loop. Fixes PR28541. Differential Revision: https://reviews.llvm.org/D22952 llvm-svn: 278573
* X86: Stop dereferencing end() in X86FrameLowering::emitEpilogueDuncan P. N. Exon Smith2016-08-121-5/+7
| | | | | | | | | | | | | On a Windows build of Chromium, r278532 (up to r278539) X86FrameLowering::emitEpilogue because it wasn't wary enough of the return of MachineBasicBlock::getFirstTerminator. Guard all the uses here. Note that r278532 *looks* like an NFC commit (just an API change), but it removes a couple of layers of abstraction and is probably causing optimization differences in MSVC. llvm-svn: 278572
* [Inliner] Don't treat inalloca allocas as staticReid Kleckner2016-08-121-3/+10
| | | | | | | | | They aren't static, and moving them to the entry block across something else will only result in tears. Root cause of http://crbug.com/636558. llvm-svn: 278571
* [NVPTX] Use untyped (.b) integer registers in PTX.Artem Belevich2016-08-121-3/+21
| | | | | | | | | | | | This bring LLVM-generated PTX closer to what nvcc generates and avoids triggering issues in ptxas. For instance, ptxas does not accept .s16 (or .u16) registers as operands for .fp16 instructions. Differential Revision: https://reviews.llvm.org/D23460 llvm-svn: 278568
* Fixed typo.David L Kreitzer2016-08-121-1/+1
| | | | llvm-svn: 278565
* [Hexagon] Cleanup and standardize vector load/store pseudo instructionsKrzysztof Parzyszek2016-08-123-243/+187
| | | | | | | | | | | | | | | | | | | | Remove the following single-vector load/store pseudo instructions, use real instructions instead: LDriv_pseudo_V6 STriv_pseudo_V6 LDriv_pseudo_V6_128B STriv_pseudo_V6_128B LDrivv_indexed STrivv_indexed LDrivv_indexed_128B STrivv_indexed_128B Rename the double-vector load/store pseudo instructions, add unaligned counterparts: -- old -- -- new -- -- unaligned -- LDrivv_pseudo_V6 PS_vloadrw_io PS_vloadrwu_io LDrivv_pseudo_V6_128B PS_vloadrw_io_128B PS_vloadrwu_io_128B STrivv_pseudo_V6 PS_vstorerw_io PS_vstorerwu_io STrivv_pseudo_V6_128B PS_vstorerw_io_128 PS_vstorerwu_io_128 llvm-svn: 278564
* [AArch64LoadStoreOptimizer] Check aliasing correctly when creating paired ↵Eli Friedman2016-08-121-1/+4
| | | | | | | | | | loads/stores. The existing code accidentally skipped the aliasing check in edge cases. Differential revision: https://reviews.llvm.org/D23372 llvm-svn: 278562
* [AArch64] Registering default MCInstrAnalysisMike Aizatsky2016-08-121-0/+8
| | | | | | | | | | | | Even in this form it is useful: it can detect branch instructions. https://github.com/google/sanitizers/issues/706 Subscribers: aemerson, rengolin Differential Revision: https://reviews.llvm.org/D23426 llvm-svn: 278560
* [AArch64LoadStoreOpt] Handle offsets correctly for post-indexed paired loads.Eli Friedman2016-08-121-5/+5
| | | | | | | | Trunk would try to create something like "stp x9, x8, [x0], #512", which isn't actually a valid instruction. Differential revision: https://reviews.llvm.org/D23368 llvm-svn: 278559
* Next set of additional error checks for invalid Mach-O files.Kevin Enderby2016-08-121-17/+96
| | | | | | | | | | This contains the two missing checks for LC_SEGMENT load command fields. And checks for the Mach-O sections fields that would make them invalid. With the new checks, some of the existing malformed file checks now trips one of these instead of the issue it was having before so those tests were adjusted. llvm-svn: 278557
* [PPC] Memoize getValueBits. NFC.Tim Shen2016-08-121-35/+49
| | | | | | | | | | | | Summary: It triggers exponential behavior when the DAG has many branches. Reviewers: hfinkel, kbarton Subscribers: iteratee, nemanjai, echristo Differential Revision: https://reviews.llvm.org/D23428 llvm-svn: 278548
* [WebAssembly] Plug MachineMemOperand leaks.Benjamin Kramer2016-08-121-6/+6
| | | | llvm-svn: 278545
* [LibFuzzer] Fix `-jobs=<N>` where <N> > 1 and the number of workers is > 1 ↵Dan Liew2016-08-125-4/+198
| | | | | | | | | | | | | | | | | | | | | | | on macOS. The original `ExecuteCommand()` called `system()` from the C library. The C library implementation of this on macOS contains a mutex which serializes calls to `system()`. This prevented the `-jobs=` flag from running copies of the fuzzing binary in parallel which is the opposite of what is intended. To fix this on macOS an alternative implementation of `ExecuteCommand()` is provided that can be used concurrently. This is provided in `FuzzerUtilDarwin.cpp` which is guarded to only compile code on Apple platforms. The existing implementation has been moved to a new file `FuzzerUtilLinux.cpp` which is guarded to only compile code on Linux. This commit includes a simple test to check that LibFuzzer is being executed in parallel when requested. Differential Revision: https://reviews.llvm.org/D22742 llvm-svn: 278544
* [PM] Port LowerInvoke to the new pass managerMichael Kuperstein2016-08-124-18/+35
| | | | llvm-svn: 278531
* constify InstCombine::foldAllocaCmp. NFC.Pete Cooper2016-08-122-10/+12
| | | | | | | | This is part of an effort to constify ValueTracking.cpp. This change is to methods which need const Value* instead of Value* to go with the upcoming changes to ValueTracking. llvm-svn: 278528
* Fine tuning of sample profile propagation algorithm.Dehao Chen2016-08-121-31/+100
| | | | | | | | | | | | Summary: The refined propagation algorithm is more accurate and robust. Reviewers: davidxl, dnovillo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23224 llvm-svn: 278522
* [x86] X86ISelLowering zext(add_nuw(x, C)) --> add(zext(x), C_zext)Artur Pilipenko2016-08-121-16/+33
| | | | | | | | | | | | | Currently X86ISelLowering has a similar transformation for sexts: sext(add_nsw(x, C)) --> add(sext(x), C_sext) In this change I extend this code to handle zexts as well. Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D23359 llvm-svn: 278520
* [BasicAA] Avoid calling GetUnderlyingObject, when the result of a previous ↵Ehsan Amiri2016-08-121-13/+25
| | | | | | | | | | call can be reused. Recursive calls to aliasCheck from alias[GEP|Select|PHI] may result in a second call to GetUnderlyingObject for a Value, whose underlying object is already computed. This patch ensures that in this situations, the underlying object is not computed again, and the result of the previous call is resued. https://reviews.llvm.org/D22305 llvm-svn: 278519
* [LVI] Take guards into accountArtur Pilipenko2016-08-121-11/+29
| | | | | | | | | | Teach LVI to gather control dependant constraints from guards. Reviewed By: sanjoy Differential Revision: https://reviews.llvm.org/D23358 llvm-svn: 278518
* [AArch64] Re-factor code shared by AArch64LoadStoreOpt and AArch64InstrInfo.Geoff Berry2016-08-123-67/+40
| | | | | | | | | | | | | | | | | | | | | | | | | This re-factoring could cause the following slight changes in generated code, though none were observed during testing: - MachineScheduler could decide not to cluster some loads/stores if there are other load/stores with non-pairable opcodes that have the same base register and offset as a pairable set of load/stores. One case of different MachineScheduler pairing did show up in my testing, but it wasn't due to this issue, but due BaseMemOpClusterMutation::clusterNeighboringMemOps() being unstable w.r.t. the order it considers memory operations. See PR28942. - The ImplicitNullChecks optimization could be done for more load/store opcodes. This optimization isn't done for C/C++ code, so it didn't show up in my testing. Reviewers: mcrosier, t.p.northover Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D23365 llvm-svn: 278515
* [LVI] Fix potential memory corruption in getValueFromConditionArtur Pilipenko2016-08-121-2/+4
| | | | | | Rewrite Visited[Cond] = getValueFromConditionImpl(..., Visited) statement which can lead to a memory corruption since getValueFromConditionImpl changes Visited map and invalidates the iterators. llvm-svn: 278514
* ADT: Share code for embedded sentinel traits, NFCDuncan P. N. Exon Smith2016-08-121-14/+3
| | | | | | | | | | | | | | | | | | | | | | | Share code for the (mostly problematic) embedded sentinel traits. - Move the LLVM_NO_SANITIZE("object-size") attribute to ilist_half_embedded_sentinel_traits and ilist_embedded_sentinel_traits (previously it spread throughout the code duplication). - Add an ilist_full_embedded_sentinel_traits which has no UB (but has the downside of storing the complete node). - Replace all the custom sentinel traits in LLVM with a declaration of ilist_sentinel_traits that inherits from one of the embedded sentinel traits classes. There are still custom sentinel traits in other LLVM subprojects. I'll remove those in a follow-up. Nothing at all should be changing here, this is just rearranging code. Note that the final goal here is to remove the sentinel traits altogether, settling on the memory layout of ilist_half_embedded_sentinel_traits without the UB. This intermediate step moves the logic into ilist.h. llvm-svn: 278513
* Revert "[Sparc] Leon errata fix passes."James Y Knight2016-08-128-947/+228
| | | | | | | | | | | ...and the two followup commits: Revert "[Sparc][Leon] Missed resetting option flags from check-in 278489." Revert "[Sparc][Leon] Errata fixes for various errata in different versions of the Leon variants of the Sparc 32 bit processor." This reverts commit r274856, r278489, and r278492. llvm-svn: 278511
* [PM] Port NameAnonFunction pass to new pass managerTeresa Johnson2016-08-124-8/+22
| | | | | | | | | | | | | | | Summary: Port the NameAnonFunction pass and add a test. Depends on D23439. Reviewers: mehdi_amini Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D23440 llvm-svn: 278509
* [PM] Port ModuleSummaryIndex analysis to new pass managerTeresa Johnson2016-08-124-6/+20
| | | | | | | | | | | | | | | | | | | Summary: Port the ModuleSummaryAnalysisWrapperPass to the new pass manager. Use it in the ported BitcodeWriterPass (similar to how we use the legacy ModuleSummaryAnalysisWrapperPass in the legacy WriteBitcodePass). Also, pass the -module-summary opt flag through to the new pass manager pipeline and through to the bitcode writer pass, and add a test that uses it. Reviewers: mehdi_amini Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D23439 llvm-svn: 278508
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