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* When emulating vselect using OR/AND/XOR make sure to bitcast the result back ↵Nadav Rotem2012-04-151-1/+2
| | | | | | to the original type. llvm-svn: 154764
* Added VPERM optimization for AVX2 shufflesElena Demikhovsky2012-04-155-4/+76
| | | | llvm-svn: 154761
* HexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with ↵NAKAMURA Takumi2012-04-151-0/+2
| | | | | | -Asserts. llvm-svn: 154759
* Target/Hexagon: Tweak to fix msvc build.NAKAMURA Takumi2012-04-151-2/+2
| | | | llvm-svn: 154758
* Rename "fpaccuracy" metadata to the more generic "fpmath". That's because I'mDuncan Sands2012-04-142-9/+9
| | | | | | | | | thinking of generalizing it to be able to specify other freedoms beyond accuracy (such as that NaN's don't have to be respected). I'd like the 3.1 release (the first one with this metadata) to have the more generic name already rather than having to auto-upgrade it in 3.2. llvm-svn: 154744
* Fix an error in BBVectorize important for vectorizing pointer types.Hal Finkel2012-04-141-0/+31
| | | | | | | | | | When vectorizing pointer types it is important to realize that potential pairs cannot be connected via the address pointer argument of a load or store. This is because even after vectorization, the address is still a scalar because the address of the higher half of the pair is implicit from the address of the lower half (it need not be, and should not be, explicitly computed). llvm-svn: 154735
* Enhance BBVectorize to more-properly handle pointer values and vectorize GEPs.Hal Finkel2012-04-141-2/+27
| | | | llvm-svn: 154734
* misched: Added CanHandleTerminators.Andrew Trick2012-04-131-3/+3
| | | | | | | | | This is a special flag for targets that really want their block terminators in the DAG. The default scheduler cannot handle this correctly, so it becomes the specialized scheduler's responsibility to schedule terminators. llvm-svn: 154712
* Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ↵Richard Smith2012-04-132-27/+33
| | | | | | ~*x & y. llvm-svn: 154705
* Remove iostream from New Value Jump.Sirish Pande2012-04-131-1/+0
| | | | llvm-svn: 154703
* Add support to BBVectorize for vectorizing selects.Hal Finkel2012-04-131-0/+8
| | | | llvm-svn: 154700
* Add support for Hexagon Architectural feature, New Value Jump.Sirish Pande2012-04-137-10/+684
| | | | llvm-svn: 154696
* Pass to replace tranfer/copy instructions into combine instruction where ↵Sirish Pande2012-04-135-0/+484
| | | | | | possible. llvm-svn: 154695
* Reduce malloc traffic in DwarfAccelTableBenjamin Kramer2012-04-132-58/+28
| | | | | | | | | - Don't copy offsets into HashData, the underlying vector won't change once the table is finalized. - Allocate HashData and HashDataContents in a BumpPtrAllocator. - Allocate string map entries in the same allocator. - Random cleanups. llvm-svn: 154694
* On Darwin targets, only use vfma etc. if the source use fma() intrinsic ↵Evan Cheng2012-04-131-2/+5
| | | | | | explicitly. llvm-svn: 154689
* Add some comments, and fix a few places that missed setting Changed.Dan Gohman2012-04-131-2/+24
| | | | llvm-svn: 154687
* For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby2012-04-131-2/+2
| | | | | | | targets so if the branch target has the high bit set it does not get printed as: beq 0xffffffff8008c404 llvm-svn: 154685
* Consider ObjC runtime calls objc_storeWeak and others which make a copy ofDan Gohman2012-04-131-14/+29
| | | | | | | their argument as "escape" points for objc_retainBlock optimization. This fixes rdar://11229925. llvm-svn: 154682
* By default, use Early-CSE instead of GVN for vectorization cleanup.Hal Finkel2012-04-131-2/+9
| | | | | | | | | | As has been suggested by Duncan and others, Early-CSE and GVN should do similar redundancy elimination, but Early-CSE is much less expensive. Most of my autovectorization benchmarks show a performance regresion, but all of these are < 0.1%, and so I think that it is still worth using the less expensive pass. llvm-svn: 154673
* Remove unused variable.Benjamin Kramer2012-04-131-3/+0
| | | | llvm-svn: 154661
* Silence various build warnings from Hexagon backend that show up in release ↵Craig Topper2012-04-135-240/+220
| | | | | | builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds. llvm-svn: 154660
* Use the new Use-aware dominates method to apply the objc runtimeDan Gohman2012-04-131-8/+5
| | | | | | | library return value optimization for phi uses. Even when the phi itself is not dominated, the specific use may be dominated. llvm-svn: 154647
* Code-gen may inject code into the IR before it emits the ASM. The linkerBill Wendling2012-04-131-0/+6
| | | | | | | | obviously cannot know that this code is present, let alone used. So prevent the internalize pass from internalizing those global values which code-gen may insert. llvm-svn: 154645
* Don't move objc_autorelease calls past autorelease pool boundaries whenDan Gohman2012-04-131-3/+43
| | | | | | | optimizing autorelease calls on phi nodes with null operands. This fixes rdar://11207070. llvm-svn: 154642
* Def here is an Instruction, so !isa<Instruction>(Def) is always false,Dan Gohman2012-04-131-3/+2
| | | | | | as Eli noticed. llvm-svn: 154641
* Add forms of dominates and isReachableFromEntry that accept a UseDan Gohman2012-04-121-0/+81
| | | | | | | | directly instead of a user Instruction. This allows them to test whether a def dominates a particular operand if the user instruction is a PHI. llvm-svn: 154631
* Fix a few more places in the ARM disassembler so that branches getKevin Enderby2012-04-122-4/+30
| | | | | | symbolic operands added when using the C disassembler API. llvm-svn: 154628
* Update CMake build.Ted Kremenek2012-04-122-4/+5
| | | | llvm-svn: 154622
* Hexagon: fix CMake error.Evandro Menezes2012-04-121-1/+1
| | | | llvm-svn: 154620
* HexagonPacketizer patch.Sirish Pande2012-04-1219-540/+7580
| | | | llvm-svn: 154616
* This patch improves the MCJIT runtime dynamic loader by adding new handlingPreston Gurd2012-04-126-63/+234
| | | | | | | | | | of zero-initialized sections, virtual sections and common symbols and preventing the loading of sections which are not required for execution such as debug information. Patch by Andy Kaylor! llvm-svn: 154610
* Generalize r153635 to deal with TokenFactor chains; also clean up the logic ↵Evan Cheng2012-04-121-41/+51
| | | | | | and fix the tests. rdar://11069732, rdar://11236106 llvm-svn: 154604
* Hexagon: enable assembler output through the MC layer.Evandro Menezes2012-04-1216-376/+685
| | | | llvm-svn: 154597
* Remove README entry obsoleted by register masks.Benjamin Kramer2012-04-121-16/+0
| | | | llvm-svn: 154588
* Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are ↵Craig Topper2012-04-121-4/+4
| | | | | | integer instructions. llvm-svn: 154580
* ARM 'adr' fixups don't need the interworking addend tweaking.Jim Grosbach2012-04-121-0/+3
| | | | | | | | They reference the PC directly, so things work properly that way. rdar://11231229 llvm-svn: 154576
* Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,Akira Hatanaka2012-04-112-3/+9
| | | | | | otherwise expand FNEG during legalization. llvm-svn: 154546
* Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka2012-04-113-0/+65
| | | | | | Invalid operation is signaled if the operand of these instructions is NaN. llvm-svn: 154545
* Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby2012-04-111-0/+2
| | | | | | of a VST instruction. llvm-svn: 154544
* Fix bugs in lowering of FCOPYSIGN nodes.Akira Hatanaka2012-04-111-52/+91
| | | | | | | | | | - FCOPYSIGN nodes that have operands of different types were not handled. - Different code was generated depending on the endianness of the target. Additionally, code is added that emits INS and EXT instructions, if they are supported by target (they are R2 instructions). llvm-svn: 154540
* Typo.Chad Rosier2012-04-111-1/+1
| | | | llvm-svn: 154522
* ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-112-2/+5
| | | | | | | | | | While there is an encoding for it in VUZP, the result of that is undefined, so we should avoid it. Define the instruction as a pseudo for VTRN.32 instead, as the ARM ARM indicates. rdar://11222366 llvm-svn: 154511
* ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-112-2/+5
| | | | | | | | | | While there is an encoding for it in VZIP, the result of that is undefined, so we should avoid it. Define the instruction as a pseudo for VTRN.32 instead, as the ARM ARM indicates. rdar://11221911 llvm-svn: 154505
* Fix the build under Debian GNU/Hurd.Sylvestre Ledru2012-04-113-2/+17
| | | | | | Thanks to Pino Toscano for the patch llvm-svn: 154500
* Cache the hash value of the operands in the MDNode.Benjamin Kramer2012-04-112-0/+25
| | | | | | | | | | | | | | | | | | FoldingSet is implemented as a chained hash table. When there is a hash collision during insertion, which is common as we fill the table until a load factor of 2.0 is hit, we walk the chained elements, comparing every operand with the new element's operands. This can be very expensive if the MDNode has many operands. We sacrifice a word of space in MDNode to cache the full hash value, reducing compares on collision to a minimum. MDNode grows from 28 to 32 bytes + operands on x86. On x86_64 the new bits fit nicely into existing padding, not growing the struct at all. The actual speedup depends a lot on the test case and is typically between 1% and 2% for C++ code with clang -c -O0 -g. llvm-svn: 154497
* FoldingSet: Push the hash through FoldingSetTraits::Equals, so clients can ↵Benjamin Kramer2012-04-111-3/+3
| | | | | | use it. llvm-svn: 154496
* Compute hashes directly with hash_combine instead of taking a detour through ↵Benjamin Kramer2012-04-112-11/+6
| | | | | | FoldingSetNodeID. llvm-svn: 154495
* remove unused argumentNadav Rotem2012-04-111-2/+2
| | | | llvm-svn: 154494
* Add a C binding to the Target and TargetMachine classes to allow for emittingDuncan Sands2012-04-112-0/+198
| | | | | | | binary and assembly. Patch by Carlo Kok. Emitting was inspired by but not based on the D llvm bindings. llvm-svn: 154493
* Add two statistics to help track how we are computing the inline cost.Chandler Carruth2012-04-112-0/+11
| | | | | | Yea, 'NumCallerCallersAnalyzed' isn't a great name, suggestions welcome. llvm-svn: 154492
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