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* Minor simplification.Eli Friedman2011-07-271-2/+2
| | | | llvm-svn: 136202
* Move some code around to open opportunity for more shuffle matchingBruno Cardoso Lopes2011-07-271-18/+18
| | | | llvm-svn: 136201
* The vpermilps and vpermilpd have different behaviour regarding theBruno Cardoso Lopes2011-07-274-32/+140
| | | | | | | | | usage of the shuffle bitmask. Both work in 128-bit lanes without crossing, but in the former the mask of the high part is the same used by the low part while in the later both lanes have independent masks. Handle this properly and and add support for vpermilpd. llvm-svn: 136200
* Remove more dead code!Bruno Cardoso Lopes2011-07-271-15/+5
| | | | llvm-svn: 136199
* Fix AliasSetTracker so that it doesn't make any assumptions about ↵Eli Friedman2011-07-271-51/+46
| | | | | | instructions it doesn't know about (like the atomic instructions I'm adding). llvm-svn: 136198
* Support .code32 and .code64 in X86 assembler.Evan Cheng2011-07-278-13/+53
| | | | llvm-svn: 136197
* It is quiet possible that inlined function body is split into multiple ↵Devang Patel2011-07-271-16/+41
| | | | | | chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry. llvm-svn: 136196
* Add support for multi-way live range splitting.Jakob Stoklund Olesen2011-07-261-64/+165
| | | | | | | | | | | | | | | | | | | | | When splitting global live ranges, it is now possible to split for multiple destination intervals at once. Previously, we only had the main and stack intervals. Each edge bundle is assigned to a split candidate, and splitAroundRegion will insert copies between the candidate intervals and the stack interval as needed. The multi-way splitting is used to split around compact regions when enabled with -compact-regions. The best candidate register still gets all the bundles it wants, but everything outside the main interval is first split around compact regions before we create single-block intervals. Compact region splitting still causes some regressions, so it is not enabled by default. llvm-svn: 136186
* Print out the MBB live-in registers.Jakob Stoklund Olesen2011-07-261-0/+4
| | | | llvm-svn: 136178
* Eliminate copies of undefined values during coalescing.Jakob Stoklund Olesen2011-07-262-0/+53
| | | | | | | | | | These copies would coalesce easily, but the resulting value would be defined by a deleted instruction. Now we also remove the undefined value number from the destination register. This fixes PR10503. llvm-svn: 136174
* Add a neat little two's complement hack for x86.Benjamin Kramer2011-07-262-28/+38
| | | | | | | | | | On x86 we can't encode an immediate LHS of a sub directly. If the RHS comes from a XOR with a constant we can fold the negation into the xor and add one to the immediate of the sub. Then we can turn the sub into an add, which can be commuted and encoded efficiently. This code is generated for __builtin_clz and friends. llvm-svn: 136167
* Recognize unpckh* masks and match 256-bit versions. The new versions areBruno Cardoso Lopes2011-07-265-47/+90
| | | | | | | different from the previous 128-bit because they work in lanes. Update a few comments and add testcases llvm-svn: 136157
* Delete unnecessarily cautious LastCALLSEQ code.Dan Gohman2011-07-261-14/+1
| | | | llvm-svn: 136156
* ARM rot_imm printing adjustment.Jim Grosbach2011-07-263-9/+9
| | | | | | | Allow the rot_imm operand to be optional. This sets the stage for refactoring away the "rr" versions from the multiclasses and replacing them with Pat<>s. llvm-svn: 136154
* ARM cleanup of rot_imm encoding.Jim Grosbach2011-07-268-44/+47
| | | | | | | | Start of cleaning this up a bit. First step is to remove the encoder hook by storing the operand as the bits it'll actually encode to so it can just be directly used. Map it to the assembly source values 8/16/24 when we print it. llvm-svn: 136152
* Prevent x86-specific DAGCombine from creating nodes with illegal type (which ↵Eli Friedman2011-07-261-1/+2
| | | | | | could not be selected). Fixes a minor isel issue that was breaking the testcase from r136130. llvm-svn: 136148
* Remove one last reference to Target in MC library.Evan Cheng2011-07-261-1/+1
| | | | llvm-svn: 136145
* Split am2offset into register addend and immediate addend forms, necessary ↵Owen Anderson2011-07-267-50/+163
| | | | | | for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE. llvm-svn: 136141
* Update generated code to use new API of GetElementPtrInst::Create.Nicolas Geoffray2011-07-261-2/+1
| | | | llvm-svn: 136138
* Fix over-zealous rename from r136095.Jim Grosbach2011-07-261-3/+3
| | | | llvm-svn: 136132
* Add obvious missing case to switch. PR10497.Eli Friedman2011-07-261-2/+1
| | | | llvm-svn: 136130
* Use the correct for for the version. It's little endian and my brain isBill Wendling2011-07-261-1/+1
| | | | | | | obviously big endian. :-) PR10502 llvm-svn: 136111
* ARM diagnostics for ldrexd/stredx out of order paired register operands.Jim Grosbach2011-07-261-1/+39
| | | | llvm-svn: 136110
* Remove now unused patterns. 0 insertions(+), 98 deletions(-)Bruno Cardoso Lopes2011-07-261-98/+0
| | | | llvm-svn: 136109
* Cleanup old matching for PUNPCK* variantsBruno Cardoso Lopes2011-07-261-44/+42
| | | | llvm-svn: 136108
* While extracting lexical scopes from machine instruction stream, work on one ↵Devang Patel2011-07-261-9/+9
| | | | | | machine basic block at a time. llvm-svn: 136106
* ARM fix for LDREX source register encoding.Jim Grosbach2011-07-261-2/+2
| | | | | | rdar://9842203 llvm-svn: 136102
* SCEV: Added a data structure for storing not-taken info per loopAndrew Trick2011-07-261-127/+212
| | | | | | | exit. Added an interfaces for querying either the loop's exact/max backedge taken count or a specific loop exit's not-taken count. llvm-svn: 136100
* ARM assembly parsing and encoding for SWP[B] instructions.Jim Grosbach2011-07-262-6/+6
| | | | llvm-svn: 136098
* ARM SWP instructions store, too, not just load.Jim Grosbach2011-07-261-5/+3
| | | | llvm-svn: 136096
* Clean up the ARM asm parser a bit.Jim Grosbach2011-07-263-93/+95
| | | | | | | No intendeded functional change. Just cleaning up a bit to make things more self-consistent in layout and style. llvm-svn: 136095
* ARM fix asm parsing range check for [0,31] immediates.Jim Grosbach2011-07-261-1/+3
| | | | llvm-svn: 136091
* ARM parsing and encoding for SVC instruction.Jim Grosbach2011-07-263-4/+25
| | | | llvm-svn: 136090
* Teach the Triple class about kfreebsd (FreeBSD kernel withDuncan Sands2011-07-261-0/+3
| | | | | | a GNU userspace). llvm-svn: 136085
* Add LLVMAddAlwaysInlinerPass to the C API.Rafael Espindola2011-07-261-0/+4
| | | | llvm-svn: 136083
* LLVM 3.0 is here, remove old do nothing method.Rafael Espindola2011-07-261-5/+0
| | | | llvm-svn: 136082
* SrcDef is only written and never read. Remove it.Duncan Sands2011-07-261-8/+7
| | | | llvm-svn: 136080
* Add helper function for getting true/false constants in a uniformDuncan Sands2011-07-261-34/+48
| | | | | | | way for i1 and vector of i1 types. Use these to make some code more self-documenting. llvm-svn: 136079
* The compact unwinding offsets are divided by 8 on 64-bit machines.Bill Wendling2011-07-261-2/+4
| | | | llvm-svn: 136065
* Add 256-bit isel for movsldup/movshdupBruno Cardoso Lopes2011-07-261-21/+28
| | | | llvm-svn: 136051
* More movsldup/movshdup cleanup. Rewrite the mask matching function and addBruno Cardoso Lopes2011-07-262-37/+44
| | | | | | support for 256-bit versions (but no instruction selection yet, coming next). llvm-svn: 136050
* More cleanup, subtarget info isn't used here.Bruno Cardoso Lopes2011-07-261-8/+5
| | | | llvm-svn: 136049
* Add 128-bit AVX versions of movshdup/mosldupBruno Cardoso Lopes2011-07-261-0/+11
| | | | llvm-svn: 136048
* Cleanup movsldup/movshdup matching.Bruno Cardoso Lopes2011-07-262-62/+27
| | | | | | 27 insertions(+), 62 deletions(-) llvm-svn: 136047
* Revert to RA_Assign when a virtreg separates into components.Jakob Stoklund Olesen2011-07-261-1/+3
| | | | | | | | | | | | | When dead code elimination deletes a PHI value, the virtual register may split into multiple connected components. In that case, revert each component to the RS_Assign stage. The new components are guaranteed to be smaller (the original value numbers are distributed among the components), so this will always be making progress. The components are now allowed to evict other live ranges or be split again. llvm-svn: 136034
* Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to ↵Evan Cheng2011-07-265-36/+36
| | | | | | createMCObjectStreamer. llvm-svn: 136031
* Remove a file from CMakeLists.txt that Evan removed in r136027.Chandler Carruth2011-07-261-1/+0
| | | | llvm-svn: 136030
* Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng2011-07-2626-74/+73
| | | | | | MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. llvm-svn: 136027
* Clean up a pile of hacks in our CMake build relating to TableGen.Chandler Carruth2011-07-2639-13/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. llvm-svn: 136023
* TargetAsmBackend has been renamed to MCAsmBackend.Evan Cheng2011-07-251-1/+1
| | | | llvm-svn: 136012
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