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* [NVPTX] run LSR before straight-line optimizationsJingyue Wu2015-07-231-5/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Straight-line optimizations can simplify the loop body and make LSR's cost analysis more precise. This significantly improves several Eigen3 CUDA benchmarks. With this change, EigenContractionKernel runs up to 40% faster (https://bitbucket.org/eigen/eigen/src/753ceee5f206ff7dde9f6a41a5a420749fc9406f/unsupported/Eigen/CXX11/src/Tensor/TensorContractionCuda.h?at=default#cl-502). EigenConvolutionKernel2D runs up to 10% faster (https://bitbucket.org/eigen/eigen/src/753ceee5f206ff7dde9f6a41a5a420749fc9406f/unsupported/Eigen/CXX11/src/Tensor/TensorConvolution.h?at=default#cl-605). I have some difficulties writing small tests that benefit from this reordering due to a seemingly issue with LSR (being discussed at http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-July/088244.html). See the review thread for the compilation time impact of GVN. Reviewers: eliben, jholewinski Subscribers: llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11304 llvm-svn: 242982
* [GMR] Further improve the FunctionInfo API inside of GlobalsModRef, NFC.Chandler Carruth2015-07-231-24/+21
| | | | | | | | | | | | | This takes the operation of merging a callee's information into the current information and embeds it into the FunctionInfo type itself. This is much cleaner as now we don't need to expose iteration of the globals, etc. Also, switched all the uses of a raw integer two maintain the mod/ref info during the SCC walk into just directly manipulating it in the FunctionInfo object. llvm-svn: 242976
* [GMR] Wrap all of the per-function information behind a more stronglyChandler Carruth2015-07-221-63/+92
| | | | | | | | | | | typed interface as a precursor to rewriting how it is stored. This way we know that the access paths are controlled and it should be easy to store these bits in a different way. No functionality changed. llvm-svn: 242974
* [PM/AA] Extract the ModRef enums from the AliasAnalysis class inChandler Carruth2015-07-2227-370/+365
| | | | | | | | | | | | | | | | | | | | | | | preparation for de-coupling the AA implementations. In order to do this, they had to become fake-scoped using the traditional LLVM pattern of a leading initialism. These can't be actual scoped enumerations because they're bitfields and thus inherently we use them as integers. I've also renamed the behavior enums that are specific to reasoning about the mod/ref behavior of functions when called. This makes it more clear that they have a very narrow domain of applicability. I think there is a significantly cleaner API for all of this, but I don't want to try to do really substantive changes for now, I just want to refactor the things away from analysis groups so I'm preserving the exact original design and just cleaning up the names, style, and lifting out of the class. Differential Revision: http://reviews.llvm.org/D10564 llvm-svn: 242963
* [GMR] Continue my quest to remove linked datastructures from GMR, NFC.Chandler Carruth2015-07-221-3/+2
| | | | | | | | | This replaces the next-to-last std::map with a DenseMap. While DenseMap doesn't yet make tons of sense (there are 32 bytes or so in the value type), my next change will reduce the value type to a single pointer -- we only need a pointer and 3 bits, and that is exactly what we can have. llvm-svn: 242956
* [ConstantFolding] Support folding loads from a GlobalAliasDavid Majnemer2015-07-221-0/+4
| | | | | | | | | | | | | | The MSVC ABI requires that we generate an alias for the vtable which means looking through a GlobalAlias which cannot be overridden improves our ability to devirtualize. Found while investigating PR20801. Patch by Andrew Zhogin! Differential Revision: http://reviews.llvm.org/D11306 llvm-svn: 242955
* Revert "Improve merging of stores from static constructors in GlobalOpt"Anthony Pesch2015-07-221-249/+77
| | | | | | This reverts commit 0a9dee959a30b81b9e7df64c9a58ff9898c24024. llvm-svn: 242954
* Revert "IPO: Avoid brace initialization of a map, some versions of libc++ ↵Anthony Pesch2015-07-221-4/+1
| | | | | | | | don't like it" This reverts commit fc2dad0c68f8d32273d3c2d790ed496961f829af. llvm-svn: 242953
* [GMR] Make the collection of readers and writers of globals much moreChandler Carruth2015-07-221-20/+22
| | | | | | | | | | | | | | | | | | | | | | | efficient, NFC. Previously, we built up vectors of function pointers to track readers and writers. The primary problem here is that we would add the same function to this vector every time we found an instruction that reads or writes to the pointer. This could be a *lot* of redudant function pointers. Instead of doing that, we can use a SmallPtrSet. This does more than just reduce the size of the list of readers or writers. We walk the entire lists of each and do a map lookup for each one. By having sets, we will only do one map lookup per reader or writer function. But only one user of the pointer analyzer actually needs this information, so we can also skip accumulating it (and doing a lot of heap allocations) for all the other pointer analysis. This is particularly useful because there are very many more pointers in some of the other cases. llvm-svn: 242950
* fix typo; NFCSanjay Patel2015-07-221-4/+4
| | | | llvm-svn: 242947
* fix indent; NFCSanjay Patel2015-07-221-20/+20
| | | | llvm-svn: 242946
* IPO: Avoid brace initialization of a map, some versions of libc++ don't like itJustin Bogner2015-07-221-1/+4
| | | | | | | | | Should fix the build failure on these darwin bots: http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/12427/ http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/10389/ llvm-svn: 242945
* [PeepholeOptimizer] Refactor optimizeUncoalescable logicBruno Cardoso Lopes2015-07-221-127/+246
| | | | | | | | | | | | | | | | | | | Reapply r242294. - Create a new CopyRewriter for Uncoalescable copy-like instructions - Change the ValueTracker to return a ValueTrackerResult This makes optimizeUncoalescable looks more like optimizeCoalescable and use the CopyRewritter infrastructure. This is also the preparation for looking up into PHI nodes in the ValueTracker. rdar://problem/20404526 Differential Revision: http://reviews.llvm.org/D11195 llvm-svn: 242940
* WebAssembly: basic bitcode → assembly CodeGen testJF Bastien2015-07-2215-18/+310
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Add a basic CodeGen bitcode test which (for now) only prints out the function name and nothing else. The current code merely implements the basic needed for the test run to not crash / assert. Getting to that point required: - Basic InstPrinter. - Basic AsmPrinter. - DiagnosticInfoUnsupported (not strictly required, but nice to have, duplicated from AMDGPU/BPF's ISelLowering). - Some SP and register setup in WebAssemblyTargetLowering. - Basic LowerFormalArguments. - GenInstrInfo. - Placeholder LowerFormalArguments. - Placeholder CanLowerReturn and LowerReturn. - Basic DAGToDAGISel::Select, which requiresGenDAGISel.inc as well as GET_INSTRINFO_ENUM with GenInstrInfo.inc. - Remove WebAssemblyFrameLowering::determineCalleeSaves and rely on default. - Implement WebAssemblyFrameLowering::hasFP, same as AArch64's implementation. Follow-up patches will implement a real AsmPrinter, which will require adding MI opcodes specific to WebAssembly. Reviewers: sunfish Subscribers: aemerson, jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D11369 llvm-svn: 242939
* MIR Serialization: Serialize the machine instruction's debug location.Alex Lorenz2015-07-224-2/+22
| | | | llvm-svn: 242938
* Rename RunCallBacksToRun to llvm::sys::RunSignalHandlersYaron Keren2015-07-223-3/+3
| | | | | | | | | | | | And expose it in Signals.h, allowing clients to call it directly, possibly LLVMErrorHandler which currently calls RunInterruptHandlers but not RunSignalHandlers, thus for example not printing the stack backtrace on Unixish OSes. On Windows it does happen because RunInterruptHandlers ends up calling the callbacks as well via Cleanup(). This difference in behaviour and code structures in */Signals.inc should be patched in the future. llvm-svn: 242936
* Improve merging of stores from static constructors in GlobalOptAnthony Pesch2015-07-221-77/+249
| | | | | | | | | | | | | | | | | | | Summary: While working on a project I wound up generating a fairly large lookup table (10k entries) of callbacks inside of a static constructor. Clang was taking upwards of ~10 minutes to compile the lookup table. I generated a smaller test case (http://www.inolen.com/static_initializer_test.ll) that, after running with -ftime-report, pointed fingers at GlobalOpt and MemCpyOptimizer. Running globalopt took around ~9 minutes. The slowdown came from how GlobalOpt merged stores from static constructors individually into the global initializer in EvaluateStaticConstructor. For each store it discovered and wanted to commit, it would copy the existing global initializer and then merge in the individual store. I changed this so that stores are now grouped by global, and sorted from most significant to least significant by their GEP indexes (e.g. a store to GEP 0, 0 comes before GEP 0, 0, 1). With this representation, the existing initializer can be copied and all new stores merged into it in a single pass. With this patch and http://reviews.llvm.org/D11198, the lookup table that was taking ~10 minutes to compile now compiles in around 5 seconds. I've ran 'make check' and the test-suite, which all passed. I'm not really sure who to tag as a reviewer, Lang mentioned that Chandler may be appropriate. Reviewers: chandlerc, nlewycky Subscribers: nlewycky, llvm-commits Differential Revision: http://reviews.llvm.org/D11200 llvm-svn: 242935
* MIR Parser: Extract the MDNode parsing code into a separate method. NFC.Alex Lorenz2015-07-221-2/+11
| | | | | | | This change would allow the machine instruction parser to reuse this method when parsing the metadata node for the machine instruction's debug location property. llvm-svn: 242934
* Fix -Wextra-semi warnings.Hans Wennborg2015-07-226-6/+6
| | | | | | | | Patch by Eugene Zelenko! Differential Revision: http://reviews.llvm.org/D11400 llvm-svn: 242930
* Fix fetching the symbol table of a thin archive.Rafael Espindola2015-07-221-6/+11
| | | | | | We were trying to read it as an external file. llvm-svn: 242926
* De-duplicate Unix & Windows CallBacksToRunYaron Keren2015-07-223-20/+17
| | | | | | | | | Move CallBacksToRun into the common Signals.cpp, create RunCallBacksToRun() and use these in both Unix/Signals.inc and Windows/Signals.inc. Lots of potential code to be merged here. llvm-svn: 242925
* Test commit, added blank lineAnthony Pesch2015-07-221-0/+1
| | | | llvm-svn: 242923
* Simplify switch as all cases other than default return true. NFC.Chad Rosier2015-07-221-10/+0
| | | | llvm-svn: 242922
* Identify thin archives as archives.Rafael Espindola2015-07-221-1/+2
| | | | llvm-svn: 242921
* Remove C++98 workaround in llvm::sys::DontRemoveFileOnSignal()Yaron Keren2015-07-221-7/+0
| | | | llvm-svn: 242920
* MIR Serialization: Serialize the metadata machine operands.Alex Lorenz2015-07-224-0/+26
| | | | llvm-svn: 242916
* [ARM] Make the frame lowering code ready for shrink-wrapping.Quentin Colombet2015-07-223-119/+173
| | | | | | | | Shrink-wrapping can now be tested on ARM with -enable-shrink-wrap. Related to <rdar://problem/20821730> llvm-svn: 242908
* [X86][AVX512] add reduce/range/scalef/rndScaleAsaf Badouh2015-07-225-90/+203
| | | | | | | | include encoding and intrinsics Differential Revision: http://reviews.llvm.org/D11222 llvm-svn: 242896
* [GMR] Add a flag to enable GlobalsModRef in the normal compilationChandler Carruth2015-07-221-0/+11
| | | | | | | | | | | | | | | pipeline. Even before I started improving its runtime, it was already crazy fast once the call graph exists, and if we can get it to be conservatively correct, will still likely catch a lot of interesting and useful cases. So it may well be useful to enable by default. But more importantly for me, this should make it easier for me to test that changes aren't breaking it in fundamental ways by enabling it for normal builds. llvm-svn: 242895
* [GMR] Switch from std::set to SmallPtrSet. NFC.Chandler Carruth2015-07-221-3/+3
| | | | | | | | | This almost certainly doesn't matter in some deep sense, but std::set is essentially always going to be slower here. Now the alias query should be essentially constant time instead of having to chase the set tree each time. llvm-svn: 242893
* [GMR] Only look in the associated allocs map for an underlying value ifChandler Carruth2015-07-221-4/+4
| | | | | | | | it wasn't one of the indirect globals (which clearly cannot be an allocation function call). Also only do a single lookup into this map instead of two. NFC. llvm-svn: 242892
* [GMR] Switch to a DenseMap and clean up the iteration loop. NFC.Chandler Carruth2015-07-221-11/+6
| | | | | | | | | | | | | Since we have to iterate this map not that infrequently, we should use a map that is efficient for iteration. It is also almost certainly much faster for lookups as well. There is more to do in terms of reducing the wasted overhead of GMR's runtime though. Not sure how much is worthwhile though. The loop improvements should hopefully address the code review that Duncan gave when he saw this code as I moved it around. llvm-svn: 242891
* Fix a -Winconsistent-missing-override failure in the .intel_syntaxChandler Carruth2015-07-221-1/+1
| | | | | | patch. llvm-svn: 242890
* [PM/AA] Try to fix libc++ build bots which require the type used inChandler Carruth2015-07-221-40/+39
| | | | | | | std::list to be complete by hoisting the entire definition into the class. Ugly, but hopefully works. llvm-svn: 242888
* [X86] Add .intel_syntax noprefix directive to intel-syntax x86 asm outputMichael Kuperstein2015-07-223-0/+14
| | | | | | | Patch by: michael.zuckerman@intel.com Differential Revision: http://reviews.llvm.org/D11223 llvm-svn: 242886
* Fix mem2reg to correctly handle allocas only used in a single blockMichael Kuperstein2015-07-221-15/+23
| | | | | | | | | | | | | | | Currently, a load from an alloca that is used in as single block and is not preceded by a store is replaced by undef. This is not always correct if the single block is inside a loop. Fix the logic so that: 1) If there are no stores in the block, replace the load with an undef, as before. 2) If there is a store (regardless of where it is in the block w.r.t the load), bail out, and let the rest of mem2reg handle this alloca. Patch by: gil.rapaport@intel.com Differential Revision: http://reviews.llvm.org/D11355 llvm-svn: 242884
* [asan] Improve moving of non-instrumented allocasKuba Brecka2015-07-221-6/+12
| | | | | | | | In r242510, non-instrumented allocas are now moved into the first basic block. This patch limits that to only move allocas that are present *after* the first instrumented one (i.e. only move allocas up). A testcase was updated to show behavior in these two cases. Without the patch, an alloca could be moved down, and could cause an invalid IR. Differential Revision: http://reviews.llvm.org/D11339 llvm-svn: 242883
* [PM/AA] Remove all of the dead AliasAnalysis pointers being threadedChandler Carruth2015-07-2211-65/+51
| | | | | | | | | | through APIs that are no longer necessary now that the update API has been removed. This will make changes to the AA interfaces significantly less disruptive (I hope). Either way, it seems like a really nice cleanup. llvm-svn: 242882
* [PM/AA] Remove the last of the legacy update API from AliasAnalysis asChandler Carruth2015-07-229-49/+2
| | | | | | | | | | | | | part of simplifying its interface and usage in preparation for porting to work with the new pass manager. Note that this will likely expose that we have dead arguments, members, and maybe even pass requirements for AA. I'll be cleaning those up in seperate patches. This just zaps the actual update API. Differential Revision: http://reviews.llvm.org/D11325 llvm-svn: 242881
* [PM/AA] Switch to an early-exit. NFC. This was split out of anotherChandler Carruth2015-07-221-36/+35
| | | | | | | | | change because the diff is *useless*. I assure you, I just switched to early-return in this function. Cleanup in preparation for my next commit, as requested in code review! llvm-svn: 242880
* [PM/AA] Put the 'final' keyword in the correct place. And actuallyChandler Carruth2015-07-221-1/+1
| | | | | | succeed at compiling my change before committing it too! llvm-svn: 242879
* [PM/AA] Replace the only use of the AliasAnalysis::deleteValue API (inChandler Carruth2015-07-221-35/+58
| | | | | | | | | | | | | | | | | | | | | | GlobalsModRef) with CallbackVHs that trigger the same behavior. This is technically more expensive, but in benchmarking some LTO runs, it seems unlikely to even be above the noise floor. The only way I was able to measure the performance of GMR at all was to run nothing else but this one analysis on a linked clang bitcode file. The call graph analysis still took 5x more time than GMR, and this change at most made GMR 2% slower (this is well within the noise, so its hard for me to be sure that this is an actual change). However, in a real LTO run over the same bitcode, the GMR run takes so little time that the pass timers don't measure it. With this, I can remove the last update API from the AliasAnalysis interface, but I'll actually remove the interface hook point in a follow-up commit. Differential Revision: http://reviews.llvm.org/D11324 llvm-svn: 242878
* AVX-512: Added intrinsics for VCVT* instructions.Elena Demikhovsky2015-07-222-7/+181
| | | | | | | | All SKX forms. All VCVT instructions for float/double/int/long types. Differential Revision: http://reviews.llvm.org/D11343 llvm-svn: 242877
* [LoopUnswitch] Code refactoring to separate trivial loop unswitch and ↵Chen Li2015-07-221-96/+112
| | | | | | | | | | | | | | non-trivial loop unswitch in processCurrentLoop() Summary: The current code in LoopUnswtich::processCurrentLoop() mixes trivial loop unswitch and non-trivial loop unswitch together. It goes over all basic blocks in the loop and checks if a condition is trivial or non-trivial unswitch condition. However, trivial unswitch condition can only occur in the loop header basic block (where it controls whether or not the loop does something at all). This refactoring separate trivial loop unswitch and non-trivial loop unswitch. Before going over all basic blocks in the loop, it checks if the loop header contains a trivial unswitch condition. If so, unswitch it. Otherwise, go over all blocks like before but don't check trivial condition any more since they are not possible to be in the other blocks. This code has no functionality change. Reviewers: meheff, reames, broune Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11276 llvm-svn: 242873
* [BranchFolding] do not iterate the aliases of virtual registersJingyue Wu2015-07-222-16/+28
| | | | | | | | | | | | | | | | | Summary: MCRegAliasIterator only works for physical registers. So, do not run it on virtual registers. With this issue fixed, we can resurrect the BranchFolding pass in NVPTX backend. Reviewers: jholewinski, bkramer Subscribers: henryhu, meheff, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11174 llvm-svn: 242871
* [SROA] Fix a nasty pile of bugs to do with big-endian, different allocaChandler Carruth2015-07-221-11/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | types and loads, loads or stores widened past the size of an alloca, etc. This started off with a bug report about big-endian behavior with bitfields and loads and stores to a { i32, i24 } struct. An initial attempt to fix this was sent for review in D10357, but that didn't really get to the root of the problem. The core issue was that canConvertValue and convertValue in SROA were handling different bitwidth integers by doing a zext of the integer. It wouldn't do a trunc though, only a zext! This would in turn lead SROA to form an i24 load from an i24 alloca, zext it to i32, and then use it. This would at least produce the wrong value for big-endian systems. One of my many false starts here was to correct the computation for big-endian systems by shifting. But this doesn't actually work because the original code has a 64-bit store to the entire 8 bytes, and a 32-bit load of the last 4 bytes, and because the alloc size is 8 bytes, we can't lose that last (least significant if bigendian) byte! The real problem here is that we're forming an i24 load in SROA which is actually not sufficiently wide to load all of the necessary bits here. The source has an i32 load, and SROA needs to form that as well. The straightforward way to do this is to disable the zext logic in canConvertValue and convertValue, forcing us to actually load all 32-bits. This seems like a really good change, but it in turn breaks several other parts of SROA. First in the chain of knock-on failures, we had places where we were doing integer-widening promotion even though some of the integer loads or stores extended *past the end* of the alloca's memory! There was even a comment about preventing this, but it only prevented the case where the type had a different bit size from its store size. So I added checks to handle the cases where we actually have a widened load or store and to avoid trying to special integer widening promotion in those cases. Second, we actually rely on the ability to promote in the face of loads past the end of an alloca! This is important so that we can (for example) speculate loads around PHI nodes to do more promotion. The bits loaded are garbage, but as long as they aren't used and the alignment is suitable high (which it wasn't in the test case!) this is "fine". And we can't stop promoting here, lots of things stop working well if we do. So we need to add specific logic to handle the extension (and truncation) case, but *only* where that extension or truncation are over bytes that *are outside the alloca's allocated storage* and thus totally bogus to load or store. And of course, once we add back this correct handling of extension or truncation, we need to correctly handle bigendian systems to avoid re-introducing the exact bug that started us off on this chain of misery in the first place, but this time even more subtle as it only happens along speculated loads atop a PHI node. I've ported an existing test for PHI speculation to the big-endian test file and checked that we get that part correct, and I've added several more interesting big-endian test cases that should help check that we're getting this correct. Fun times. llvm-svn: 242869
* [Fuzzer] Rely on $PATH expansion instead of hardcoding paths in tests. NFC.Alexey Samsonov2015-07-213-14/+15
| | | | llvm-svn: 242851
* [Fuzzer] Clearly separate regular and DFSan tests. NFC.Alexey Samsonov2015-07-215-7/+10
| | | | llvm-svn: 242850
* MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset.Alex Lorenz2015-07-214-1/+56
| | | | | | | | This commit begins serialization of the CFI index machine operands by serializing one kind of CFI instruction - the .cfi_def_cfa_offset instruction. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242845
* Fix a performance problem in memcpyopt by removing a linear scan over ranges ↵Nick Lewycky2015-07-211-16/+9
| | | | | | when inserting a new range. No functionality change intended. Patch by Anthony Pesch! llvm-svn: 242843
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