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* Error on .code16 instead of producing wrong (32bit) code.Roman Divacky2011-01-281-0/+3
| | | | llvm-svn: 124498
* This dyn_cast should be a cast. Pointed out by Frits van Bommel.Duncan Sands2011-01-281-1/+1
| | | | llvm-svn: 124497
* Thread divisions over selects and phis. This doesn't fire much and has ↵Duncan Sands2011-01-281-9/+19
| | | | | | | | basically zero effect on the testsuite (it improves two Ada testcases). llvm-svn: 124496
* PR9030: Fix disassembly of ARM "mov pc, lr" instruction.Bob Wilson2011-01-281-2/+2
| | | | | | Patch by Jyun-Yan You. llvm-svn: 124492
* My auto-simplifier noticed that ((X/Y)*Y)/Y occurs several times in SPECDuncan Sands2011-01-282-56/+131
| | | | | | | | | | | | | | | | | benchmarks, and that it can be simplified to X/Y. (In general you can only simplify (Z*Y)/Y to Z if the multiplication did not overflow; if Z has the form "X/Y" then this is the case). This patch implements that transform and moves some Div logic out of instcombine and into InstructionSimplify. Unfortunately instcombine gets in the way somewhat, since it likes to change (X/Y)*Y into X-(X rem Y), so I had to teach instcombine about this too. Finally, thanks to the NSW/NUW flags, sometimes we know directly that "Z*Y" does not overflow, because the flag says so, so I added that logic too. This eliminates a bunch of divisions and subtractions in 447.dealII, and has good effects on some other benchmarks too. It seems to have quite an effect on tramp3d-v4 but it's hard to say if it's good or bad because inlining decisions changed, resulting in massive changes all over. llvm-svn: 124487
* Fix libffi usage when it is on a custom path.Oscar Fuentes2011-01-281-9/+1
| | | | llvm-svn: 124486
* Add support for parsing .floatRoman Divacky2011-01-281-1/+1
| | | | llvm-svn: 124485
* Rename functions to follow coding standard. Also rejiggers comments. NoNick Lewycky2011-01-281-89/+88
| | | | | | functionality change. llvm-svn: 124482
* Add a doxygen comment for this class.Nick Lewycky2011-01-281-0/+2
| | | | llvm-svn: 124480
* Reorder for readability. (Chris, is this what you meant?)Nick Lewycky2011-01-281-148/+150
| | | | llvm-svn: 124479
* Revert r124462. There are a few big regressions that I need to fix first.Evan Cheng2011-01-282-13/+5
| | | | llvm-svn: 124478
* Reduce the number of functions we look at in the first pass, and preallocateNick Lewycky2011-01-281-1/+3
| | | | | | the function equality set. llvm-svn: 124475
* Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger!Nick Lewycky2011-01-281-1/+2
| | | | llvm-svn: 124472
* Fold select + select where both selects are on the same condition.Nick Lewycky2011-01-281-0/+13
| | | | llvm-svn: 124469
* Print the visibility of declarations.Rafael Espindola2011-01-281-1/+14
| | | | llvm-svn: 124468
* PR8951: Support for .equiv in integrated assembler, patch by Jörg Sonnenberger!Nico Weber2011-01-281-8/+12
| | | | llvm-svn: 124467
* - Stop simplifycfg from duplicating "ret" instructions into unconditionalEvan Cheng2011-01-282-5/+13
| | | | | | | | branches. PR8575, rdar://5134905, rdar://8911460. - Allow codegen tail duplication to dup small return blocks after register allocation is done. llvm-svn: 124462
* Fix PLD encoding.Evan Cheng2011-01-271-2/+2
| | | | llvm-svn: 124458
* Changed llvm-mc arm target to give an error if .syntax divided is used. SinceKevin Enderby2011-01-271-1/+1
| | | | | | only .syntax unified is supported. llvm-svn: 124454
* Use the paths to libffi's header and library even when no customOscar Fuentes2011-01-271-6/+10
| | | | | | location was stated with FFI_INCLUDE_DIR/FFI_LIBRARY_DIR. llvm-svn: 124449
* [AVX] Clean up the code to configure target lowering for AVX. SpecifyDavid Greene2011-01-271-73/+47
| | | | | | | how to lower more/new operations. This is a prerequisite for adding additional AVX lowering. llvm-svn: 124447
* Remove a temporary workaround for a lencod miscompile. Depends on the fix in ↵Andrew Trick2011-01-271-2/+0
| | | | | | r124442. llvm-svn: 124443
* VirtRegRewriter fix: update kill flags, which are used by the scavenger.Andrew Trick2011-01-271-64/+88
| | | | | | | | | | | | | | | | | | | | | | | rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3 Added ResurrectKill to remove kill flags after we decide to reused a physical register. And (hopefully) ensure that we call it in all the right places. Sorry, I'm not checking in a unit test given that it's a miscompile I can't reproduce easily with a toy example. Failures in the rewriter depend on a series of heuristic decisions maked during one of the many upstream phases in codegen. This case would require coercing regalloc to generate a couple of rematerialzations in a way that causes the scavenger to reuse the same register at just the wrong point. The general way to test this is to implement kill flags verification. Then we could have a simple, robust compile-only unit test. That would be worth doing if the whole pass was not about to disappear. At this point we focus verification work on the next generation of regalloc. llvm-svn: 124442
* Unbreak the build.Benjamin Kramer2011-01-271-1/+1
| | | | llvm-svn: 124426
* Expound upon this comparison!Nick Lewycky2011-01-271-0/+2
| | | | llvm-svn: 124406
* Use dyn_cast instead of isa+cast.Nick Lewycky2011-01-271-2/+1
| | | | llvm-svn: 124404
* Speculatively revert r124380.Devang Patel2011-01-272-4/+1
| | | | llvm-svn: 124397
* While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal ↵Devang Patel2011-01-272-1/+4
| | | | | | | | nodes. Take 2. This includes fix for dragonegg crash. llvm-svn: 124380
* Add support for specifying register name in cfi-register/offset/defRoman Divacky2011-01-271-3/+23
| | | | | | as well as register number. llvm-svn: 124379
* Introduce virtual ParseRegister method in TargetAsmParser.Roman Divacky2011-01-273-6/+19
| | | | | | Create override of this method in X86/ARM/MBlaze. llvm-svn: 124378
* Fix indentation.Jay Foad2011-01-271-9/+9
| | | | llvm-svn: 124375
* Fix surprising missed optimization in mergefunc where we forgot to considerNick Lewycky2011-01-271-3/+12
| | | | | | that relationships like "i8* null" is equivalent to "i32* null". llvm-svn: 124368
* Avoid modifying the OneClassForEachPhysReg map while iterating over it.Bob Wilson2011-01-271-2/+6
| | | | | | | | | Linear scan regalloc is currently assuming that any register aliased with a member of a regclass must also be in at least one regclass. That is not always true. For example, for X86, RIP is in a regclass but IP is not. If you're unlucky, this can cause a crash by invalidating the iterator. llvm-svn: 124365
* Use the incoming VT not the VT of where we're trying to store to determineEric Christopher2011-01-271-2/+2
| | | | | | | | if we can store a value. Also, the exclusion is or, not and. Fixes rdar://8920247. llvm-svn: 124357
* lib/Target/X86/X86ISelDAGToDAG.cpp: __main should be WINCALL64 on Win64.NAKAMURA Takumi2011-01-271-1/+1
| | | | | | CALL64 marks %xmm* as dead. llvm-svn: 124354
* Try harder to not have unused variables.Matt Beaumont-Gay2011-01-271-0/+2
| | | | llvm-svn: 124350
* Opt-mode -Wunused-variable cleanupMatt Beaumont-Gay2011-01-271-4/+2
| | | | llvm-svn: 124346
* Reapply 124301Devang Patel2011-01-271-1/+5
| | | | llvm-svn: 124339
* Initialize variable to get rid of clang warning.Bill Wendling2011-01-261-1/+1
| | | | llvm-svn: 124331
* Simplify User::operator delete().Jay Foad2011-01-261-10/+3
| | | | llvm-svn: 124330
* Revert 124301.Devang Patel2011-01-261-5/+1
| | | | llvm-svn: 124327
* Revert r124302Devang Patel2011-01-261-3/+0
| | | | llvm-svn: 124320
* Add support for printing out floating point values from the ARM assemblyBill Wendling2011-01-261-2/+27
| | | | | | | parser. The parser will always give us a binary representation of the floating point number. llvm-svn: 124318
* Temporarily revert 124275 to see if it brings the dragonegg buildbot back.Eric Christopher2011-01-261-85/+82
| | | | llvm-svn: 124312
* [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides aDavid Greene2011-01-264-1/+96
| | | | | | | | default implementation for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VINSERTF128 if AVX is available. llvm-svn: 124307
* While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal ↵Devang Patel2011-01-261-0/+3
| | | | | | nodes. llvm-svn: 124302
* Process valid SDDbgValues even if the node does not have any order assigned.Devang Patel2011-01-261-1/+5
| | | | llvm-svn: 124301
* Refactor.Devang Patel2011-01-261-19/+30
| | | | llvm-svn: 124300
* [AVX] Support EXTRACT_SUBVECTOR on x86. This provides a defaultDavid Greene2011-01-264-5/+37
| | | | | | | | implementation of EXTRACT_SUBVECTOR for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VEXTRACTF128 if AVX is available. llvm-svn: 124292
* fix the encoding and add testcases for ARM nop, yield, wfe and wfi instructionsBruno Cardoso Lopes2011-01-261-0/+1
| | | | llvm-svn: 124288
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