Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Codegen pass definition cleanup. No functionality. | Andrew Trick | 2012-02-08 | 25 | -177/+106 | |
| | | | | | | | | | | | | | Moving toward a uniform style of pass definition to allow easier target configuration. Globally declare Pass ID. Globally declare pass initializer. Use INITIALIZE_PASS consistently. Add a call to the initializer from CodeGen.cpp. Remove redundant "createPass" functions and "getPassName" methods. While cleaning up declarations, cleaned up comments (sorry for large diff). llvm-svn: 150100 | |||||
* | Move pass configuration out of pass constructors: MachineLICM. | Andrew Trick | 2012-02-08 | 2 | -5/+6 | |
| | | | | llvm-svn: 150099 | |||||
* | whitespace | Andrew Trick | 2012-02-08 | 1 | -11/+11 | |
| | | | | llvm-svn: 150098 | |||||
* | Move pass configuration out of pass constructors: StackSlotColoring. | Andrew Trick | 2012-02-08 | 3 | -4/+4 | |
| | | | | llvm-svn: 150097 | |||||
* | Move pass configuration out of pass constructors: PostRAScheduler. | Andrew Trick | 2012-02-08 | 3 | -8/+10 | |
| | | | | llvm-svn: 150096 | |||||
* | Move pass configuration out of pass constructors: BranchFolderPass | Andrew Trick | 2012-02-08 | 5 | -20/+28 | |
| | | | | llvm-svn: 150095 | |||||
* | whitespace | Andrew Trick | 2012-02-08 | 8 | -80/+80 | |
| | | | | llvm-svn: 150094 | |||||
* | Added TargetPassConfig::setOpt | Andrew Trick | 2012-02-08 | 3 | -1/+14 | |
| | | | | llvm-svn: 150093 | |||||
* | Added Pass::createPass(ID) to handle pass configuration by ID | Andrew Trick | 2012-02-08 | 2 | -2/+13 | |
| | | | | llvm-svn: 150092 | |||||
* | Move pass configuration out of pass constructors: TailDuplicate::PreRegAlloc | Andrew Trick | 2012-02-08 | 3 | -10/+11 | |
| | | | | llvm-svn: 150091 | |||||
* | Add Register mask support to RABasic. | Jakob Stoklund Olesen | 2012-02-08 | 1 | -0/+14 | |
| | | | | | | | When a virtual register is live across a call, limit the search space to call-preserved registers. llvm-svn: 150081 | |||||
* | Use TSFlag bit to describe instruction properties. | Brendon Cahoon | 2012-02-08 | 6 | -314/+208 | |
| | | | | | | | | Creating the isPredicated TSFlag enables the code to use the property defined in the instruction format instead of using a large switch statement. llvm-svn: 150078 | |||||
* | Keep track of register masks in LiveIntervalAnalysis. | Jakob Stoklund Olesen | 2012-02-08 | 1 | -0/+62 | |
| | | | | | | | | | | | | | Build an ordered vector of register mask operands (i.e., calls) when computing live intervals. Provide a checkRegMaskInterference() function that computes a bit mask of usable registers for a live range. This is a quick way of determining of a live range crosses any calls, and restricting it to the callee saved registers if it does. Previously, we had to discover call clobbers for each candidate register independently. llvm-svn: 150077 | |||||
* | Use Use::set rather than finding the operand number of the use | Duncan Sands | 2012-02-08 | 1 | -6/+3 | |
| | | | | | | and setting that. llvm-svn: 150074 | |||||
* | PathV2: Remove static StringRef ctors. | Benjamin Kramer | 2012-02-08 | 1 | -4/+4 | |
| | | | | llvm-svn: 150071 | |||||
* | Fixed a bug in printing "cmp" pseudo ops. | Elena Demikhovsky | 2012-02-08 | 4 | -41/+115 | |
| | | | | | | | | | | | | | | | | | | | | | | > This IR code > %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14) > fails with assertion: > > llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed. > 0 llc 0x0000000001355803 > 1 llc 0x0000000001355dc9 > 2 libpthread.so.0 0x00007f79a30575d0 > 3 libc.so.6 0x00007f79a23a1945 gsignal + 53 > 4 libc.so.6 0x00007f79a23a2f21 abort + 385 > 5 libc.so.6 0x00007f79a239a810 __assert_fail + 240 > 6 llc 0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119 I added the full testing for all possible pseudo-ops of cmp. I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp. You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in. llvm-svn: 150068 | |||||
* | Remove a couple unneeded intrinsic patterns | Craig Topper | 2012-02-08 | 1 | -6/+0 | |
| | | | | llvm-svn: 150067 | |||||
* | Remove GCC builtins for vpermilp* intrinsics as clang no longer needs them. ↵ | Craig Topper | 2012-02-08 | 2 | -32/+15 | |
| | | | | | | Custom lower the intrinsics to the vpermilp target specific node and remove intrinsic patterns. llvm-svn: 150060 | |||||
* | [fast-isel] Add support for SUBs with non-legal types. | Chad Rosier | 2012-02-08 | 1 | -0/+5 | |
| | | | | llvm-svn: 150047 | |||||
* | [fast-isel] Add support for ORs with non-legal types. | Chad Rosier | 2012-02-08 | 1 | -2/+13 | |
| | | | | llvm-svn: 150045 | |||||
* | Added MachineInstr::isBundled() to check if an instruction is part of a bundle. | Andrew Trick | 2012-02-08 | 2 | -1/+11 | |
| | | | | llvm-svn: 150044 | |||||
* | misched: bug in debug output. | Andrew Trick | 2012-02-08 | 1 | -2/+4 | |
| | | | | llvm-svn: 150043 | |||||
* | stale comment | Andrew Trick | 2012-02-08 | 1 | -2/+0 | |
| | | | | llvm-svn: 150041 | |||||
* | Add support for a temporary forward decl type. We want this so we | Eric Christopher | 2012-02-08 | 1 | -0/+22 | |
| | | | | | | | | can rauw forward declarations if we decide to emit the full type. Part of rdar://10809898 llvm-svn: 150024 | |||||
* | Remove tabs. | Devang Patel | 2012-02-08 | 2 | -19/+19 | |
| | | | | llvm-svn: 150022 | |||||
* | [fast-isel] Add support for indirect branches. | Chad Rosier | 2012-02-07 | 1 | -0/+13 | |
| | | | | llvm-svn: 150014 | |||||
* | Remove tabs. | Devang Patel | 2012-02-07 | 1 | -17/+17 | |
| | | | | llvm-svn: 150012 | |||||
* | Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang. | Evan Cheng | 2012-02-07 | 4 | -21/+52 | |
| | | | | llvm-svn: 150008 | |||||
* | Correct use of const in ParseCommandLineOptions | David Blaikie | 2012-02-07 | 1 | -5/+5 | |
| | | | | llvm-svn: 149999 | |||||
* | Do not fold ADD / SUB into load / store (to form pre-indexed, post-indexed | Evan Cheng | 2012-02-07 | 1 | -24/+58 | |
| | | | | | | | | load / store) if the ADD / SUB has a live definition of CPSR. Bug reported by David Meyer. Alas, no test case. llvm-svn: 149970 | |||||
* | Add instruction selection for 256-bit VPSHUFD and 128-bit VPERMILPS/VPERMILPD. | Craig Topper | 2012-02-07 | 2 | -22/+32 | |
| | | | | llvm-svn: 149968 | |||||
* | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 30 | -89/+66 | |
| | | | | llvm-svn: 149967 | |||||
* | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 42 | -151/+106 | |
| | | | | llvm-svn: 149961 | |||||
* | Cache the sizes of vectors instead of calculating them all over the place. | Bill Wendling | 2012-02-07 | 1 | -9/+11 | |
| | | | | llvm-svn: 149954 | |||||
* | Reserve space in these vectors to prevent having to grow the array too | Bill Wendling | 2012-02-07 | 2 | -6/+8 | |
| | | | | | | much. This gets us an addition 0.9% on 445.gobmk. llvm-svn: 149952 | |||||
* | Fix win32 build breakage from bitcode streaming patch | Derek Schuff | 2012-02-07 | 1 | -1/+4 | |
| | | | | llvm-svn: 149941 | |||||
* | [fast-isel] Add support for ADDs with non-legal types. | Chad Rosier | 2012-02-06 | 1 | -5/+34 | |
| | | | | llvm-svn: 149934 | |||||
* | Expose TargetPassConfig to PEI Pass | Andrew Trick | 2012-02-06 | 2 | -0/+2 | |
| | | | | llvm-svn: 149927 | |||||
* | Add TargetPassConfig to the PassManager for use inside passes | Andrew Trick | 2012-02-06 | 2 | -5/+7 | |
| | | | | llvm-svn: 149926 | |||||
* | The patch resolves the conflict between AddressSanitizer and load widening ↵ | Kostya Serebryany | 2012-02-06 | 1 | -0/+8 | |
| | | | | | | | | | (GVN). The problem initially reported by Mozilla folks (http://code.google.com/p/address-sanitizer/issues/detail?id=20), but it also prevents us from enabling LLVM bootstrap with AddressSanitizer. llvm-svn: 149925 | |||||
* | Fix comment-rulers. | Nick Lewycky | 2012-02-06 | 2 | -2/+2 | |
| | | | | llvm-svn: 149922 | |||||
* | Don't explicitly renumber slot indices. | Jakob Stoklund Olesen | 2012-02-06 | 1 | -2/+0 | |
| | | | | | | We have automatic local renumbering now. llvm-svn: 149920 | |||||
* | Enable streaming of bitcode | Derek Schuff | 2012-02-06 | 14 | -90/+415 | |
| | | | | | | | This CL delays reading of function bodies from initial parse until materialization, allowing overlap of compilation with bitcode download. llvm-svn: 149918 | |||||
* | Remove some dead code and tidy things up now that vectors use ConstantDataVector | Chris Lattner | 2012-02-06 | 8 | -107/+39 | |
| | | | | | | instead of always using ConstantVector. llvm-svn: 149912 | |||||
* | Make sure a reserved register has a live interval before merging. | Jakob Stoklund Olesen | 2012-02-06 | 1 | -1/+5 | |
| | | | | llvm-svn: 149910 | |||||
* | [unwind removal] Remove all of the code for the dead 'unwind' instruction. There | Bill Wendling | 2012-02-06 | 8 | -93/+6 | |
| | | | | | | | were no 'unwind' instructions being generated before this, so this is in effect a no-op. llvm-svn: 149906 | |||||
* | [unwind removal] Don't write out the dead 'unwind' instruction. | Bill Wendling | 2012-02-06 | 1 | -3/+0 | |
| | | | | llvm-svn: 149905 | |||||
* | [unwind removal] We no longer have 'unwind' instructions being generated, so | Bill Wendling | 2012-02-06 | 11 | -134/+9 | |
| | | | | | | remove the code that handles them. llvm-svn: 149901 | |||||
* | 'unwind' is a keyword, not an instruction. | Bill Wendling | 2012-02-06 | 2 | -2/+3 | |
| | | | | llvm-svn: 149898 | |||||
* | [unwind removal] Remove the 'unwind' instruction parsing bits. | Bill Wendling | 2012-02-06 | 2 | -5/+0 | |
| | | | | llvm-svn: 149897 |