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* Refactor FP intrinisic setup. Per review feedback.Dale Johannesen2008-09-221-117/+28
| | | | llvm-svn: 56456
* CMake build system: support for parallel builds.Oscar Fuentes2008-09-222-1/+6
| | | | llvm-svn: 56453
* Per review feedback: Only performEvan Cheng2008-09-221-39/+27
| | | | | | | (srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c)) etc. when both "trunc" and "and" have single uses. llvm-svn: 56452
* Change the calling convention used when tail call optimization is enabled ↵Arnold Schwaighofer2008-09-223-22/+2
| | | | | | from CC_X86_32_TailCall to CC_X86_32_FastCC. llvm-svn: 56436
* Initial support for the CMake build system.Oscar Fuentes2008-09-2225-0/+427
| | | | llvm-svn: 56419
* Add helper function to get a 32-bit floating point constant. No ↵Bill Wendling2008-09-221-189/+106
| | | | | | functionality change. llvm-svn: 56418
* Fold immediates into X86 shifts with fast isel. This generates:Chris Lattner2008-09-211-15/+24
| | | | | | | | | | | | | sarl $3, %ecx instead of: movl $3, %ecx sarl %cl, %edx This shrinks fast isel 176.gcc by about 2000 instructions (.3%) llvm-svn: 56413
* Factor out code into HandleVirtRegDef, for consistency withDan Gohman2008-09-211-13/+12
| | | | | | | Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check for register zero, and redundant checks for isPhysicalRegister. llvm-svn: 56412
* Instead of building a list and sorting it just to find a maximum element,Dan Gohman2008-09-211-26/+9
| | | | | | compute the maximum element directly. llvm-svn: 56411
* Fetch the starting index of the block when assigning intervals. This gets ↵Owen Anderson2008-09-211-2/+2
| | | | | | | | live-in indices correct in the presence of things like EH labels. llvm-svn: 56410
* don't print GlobalAddressSDNode's with an offset of zero as "foo0".Chris Lattner2008-09-211-5/+6
| | | | llvm-svn: 56399
* add a noteChris Lattner2008-09-201-1/+32
| | | | llvm-svn: 56391
* Implement review feedback from Devang: make useDuncan Sands2008-09-201-26/+11
| | | | | | of mayReadFromMemory and mayWriteToMemory. llvm-svn: 56387
* Teach coalescer about earlyclobber bits.Dale Johannesen2008-09-202-2/+17
| | | | | | Check bits for preferred register. llvm-svn: 56384
* Fix PR2808. When regalloc runs out of register, it spill a physical register ↵Evan Cheng2008-09-201-1/+4
| | | | | | around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. llvm-svn: 56381
* No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.Evan Cheng2008-09-201-3/+10
| | | | llvm-svn: 56378
* 80 column violation.Evan Cheng2008-09-201-4/+8
| | | | llvm-svn: 56377
* Fix a FastISel GlobalVariable CSE bug.Dan Gohman2008-09-191-2/+4
| | | | llvm-svn: 56376
* Continue after removing the current MI.Evan Cheng2008-09-191-0/+1
| | | | llvm-svn: 56372
* Refactor X86SelectConstAddr, folding it into X86SelectAddress. ThisDan Gohman2008-09-192-101/+81
| | | | | | | results in better code for globals. Also, unbreak the local CSE for GlobalValue stub loads. llvm-svn: 56371
* Make earlyclobber stuff work when virtual regsDale Johannesen2008-09-191-8/+26
| | | | | | have previously been assigned conflicting physreg. llvm-svn: 56364
* Re-materalized definition instructions may be dead. Whack them.Evan Cheng2008-09-192-7/+33
| | | | llvm-svn: 56352
* backing out my last commit, it was not intended to go on the trunkGabor Greif2008-09-193-510/+11
| | | | llvm-svn: 56349
* first shot at removing Use::ValGabor Greif2008-09-193-11/+510
| | | | | | untested, Use::swap() is definitely not done yet llvm-svn: 56348
* Remove the MarkModRef pass (use AddReadAttrs instead).Duncan Sands2008-09-191-69/+0
| | | | | | | | Unfortunately this means removing one regression test of GlobalsModRef because I couldn't work out how to perform it without MarkModRef. llvm-svn: 56342
* Add a new pass AddReadAttrs which works out which functionsDuncan Sands2008-09-191-0/+135
| | | | | | | | | can get the readnone/readonly attributes, and gives them it. The plan is to remove markmodref (which did the same thing by querying GlobalsModRef) and delete the analogous functionality from GlobalsModRef. llvm-svn: 56341
* Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen2008-09-193-73/+79
| | | | | | | and redo as linked list walk. Logic moved into RA. Per review feedback. llvm-svn: 56326
* splitLoop does not handle split condition EQ.Devang Patel2008-09-181-0/+6
| | | | | | Fixes PR 2805 llvm-svn: 56321
* Address-mode folding for X86FastISel. It's pretty basic, but itDan Gohman2008-09-181-18/+95
| | | | | | | | catches a fair number of common cases. Note that this currently causes Fast-ISel to leave behind lots of dead instructions. Those will be dealt with in subsequent commits. llvm-svn: 56320
* Decrementing the iterator here could be wrong if the worklist is empty after ↵Bill Wendling2008-09-181-4/+5
| | | | | | | | the "erase". Thanks to Ji Young Park for the patch! llvm-svn: 56316
* Try to place hoisted instructions befoe icmp instruction.Devang Patel2008-09-181-2/+23
| | | | llvm-svn: 56315
* Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.Evan Cheng2008-09-181-8/+6
| | | | llvm-svn: 56314
* Simplify this code. The FastISel class has its own TD member.Dan Gohman2008-09-181-4/+3
| | | | llvm-svn: 56311
* Don't consider instructions with implicit physical registerDan Gohman2008-09-181-1/+2
| | | | | | defs to be necessarily live. llvm-svn: 56310
* Add a new "fast" scheduler. This is currently basically just aDan Gohman2008-09-181-0/+654
| | | | | | | | | | | | | | | | copy of the BURRList scheduler, but with several parts ripped out, such as backtracking, online topological sort maintenance (needed by backtracking), the priority queue, and Sethi-Ullman number computation and maintenance (needed by the priority queue). As a result of all this, it generates somewhat lower quality code, but that's its tradeoff for running about 30% faster than list-burr in -fast mode in many cases. This is somewhat experimental. Moving forward, major pieces of this can be refactored with pieces in common with ScheduleDAGRRList.cpp. llvm-svn: 56307
* Preliminary support for systems which require changing JIT memory regions ↵Evan Cheng2008-09-185-1/+49
| | | | | | privilege from read / write to read / executable. llvm-svn: 56303
* Duh. Default to ARMCC::AL (always).Evan Cheng2008-09-181-23/+63
| | | | llvm-svn: 56301
* Clean up.Evan Cheng2008-09-181-4/+8
| | | | llvm-svn: 56300
* Cosmetic.Evan Cheng2008-09-181-3/+5
| | | | llvm-svn: 56299
* FastISel: For calls, prefer using the callee's address as a constantDan Gohman2008-09-171-10/+13
| | | | | | | | | | | | over having it in a register. And wait until after checking type legality before requesting that the callee address be placed in a register. Also, fix support for calls with void return type. This speeds up fast-isel isel time by about 15% and reduces instruction counts by about 3% overall on certain testcases. It also changes many indirect calls to direct calls. llvm-svn: 56292
* Add a bit to mark operands of asm's that conflictDale Johannesen2008-09-177-26/+140
| | | | | | | | | with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. llvm-svn: 56290
* Unallocatable registers do not have live intervals.Evan Cheng2008-09-171-1/+3
| | | | llvm-svn: 56287
* Do not hoist instruction above branch condition. The instruction may use ↵Devang Patel2008-09-171-9/+2
| | | | | | branch condition. llvm-svn: 56286
* Do not ignore iv uses outside the loop.Devang Patel2008-09-171-1/+21
| | | | | | This one slipped through cracks very well. llvm-svn: 56284
* Don't worry about clobbering physical register defs that aren't used.Dan Gohman2008-09-171-0/+2
| | | | llvm-svn: 56281
* Fix addrmode1 instruction encodings; fix bx_ret encoding.Evan Cheng2008-09-173-37/+49
| | | | llvm-svn: 56277
* Specify instruction encoding using range list to avoid endianess issues.Evan Cheng2008-09-171-25/+26
| | | | llvm-svn: 56276
* Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and drawDan Gohman2008-09-171-56/+48
| | | | | | | up some new ascii art to illustrate what it does. This change currently has no effect on generated code. llvm-svn: 56270
* Add a new MachineInstr-level DCE pass. It is very simple, and is intended toDan Gohman2008-09-171-0/+99
| | | | | | be used with fast-isel. llvm-svn: 56268
* Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"Bill Wendling2008-09-172-7/+50
| | | | | | function with appropriate parameters. This allows us to support blocks on PPC. llvm-svn: 56267
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