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* Factor PrologEpilogInserter around spilling, frame finalization, and scavengingDerek Schuff2016-05-174-88/+143
| | | | | | | | | | | | | | | PrologEpilogInserter has these 3 phases, which are related, but not all of them are needed by all targets. This patch reorganizes PEI's varous functions around those phases for more clear separation. It also introduces a new TargetMachine hook, usesPhysRegsForPEI, which is true for non-virtual targets. When it is true, all the phases operate as before, and PEI requires the AllVRegsAllocated property on MachineFunctions. Otherwise, CSR spilling and scavenging are skipped and only prolog/epilog insertion/frame finalization is done. Differential Revision: http://reviews.llvm.org/D18366 llvm-svn: 269750
* [WebAssembly] Improve the precision of memory and side effect dependence ↵Dan Gohman2016-05-171-23/+192
| | | | | | | | | | tracking. MachineInstr::isSafeToMove is more conservative than is needed here; use a more explicit check, and incorporate knowledge of some WebAssembly-specific opcodes. llvm-svn: 269736
* Debug Info: Don't emit a DW_AT_data_member_location for DWARF bitfields.Adrian Prantl2016-05-171-3/+3
| | | | | | | | | The DWARF spec states that a member entry may have either a DW_AT_data_member_location or a DW_AT_data_bit_offset, but not both. This fixes a bug found in PR 27758. llvm-svn: 269731
* try to avoid unused variable warning in release build; NFCISanjay Patel2016-05-171-1/+2
| | | | llvm-svn: 269729
* [InstCombine] check vector elements before trying to transform LE/GE vector ↵Sanjay Patel2016-05-171-78/+42
| | | | | | | | | | | | | | | | | icmp (PR27756) Fix a bug introduced with rL269426 : [InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT (PR26701, PR26819) We were assuming that a ConstantDataVector / ConstantVector / ConstantAggregateZero operand of an ICMP was composed of ConstantInt elements, but it might have ConstantExpr or UndefValue elements. Handle those appropriately. Also, refactor this function to join the scalar and vector paths and eliminate the switches. Differential Revision: http://reviews.llvm.org/D20289 llvm-svn: 269728
* Remove .hot and .unlikely prefixes from function section names.Easwaran Raman2016-05-161-16/+2
| | | | | | This code currently relies on static methods in ProfileSummary to determine whether a function is hot or unlikley. I am refactoring the ProfileSummary code and these methods will be removed. As discussed offline, the right way to re-introduce this is to add a pass to annotate functions with unlikely/hot hints and use the hints to determine the prefix here. llvm-svn: 269726
* AMDGPU/R600: Use correct number of vector elements when lowering private loadsJan Vesely2016-05-161-5/+3
| | | | | | | | | | Reviewer: tstellardAMD, arsenm Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: http://reviews.llvm.org/D20032 llvm-svn: 269725
* Avoid temporary vector for sorting in BitcodeWriterMehdi Amini2016-05-161-13/+10
| | | | | | | As suggested by Duncan, fixup for r269634 and r269635 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269715
* Debug info: Don't emit a DW_AT_byte_size when emitting a DWARF4 bit field.Adrian Prantl2016-05-161-1/+2
| | | | | | | | | | The DWARF spec clearly states that a bit field member should have either a DW_AT_byte_size or a DW_AT_bit_size, but not both. Also the DW_AT_byte_size is redundant with the size of the type of the member. This fixes a bug found in PR 27758. llvm-svn: 269714
* AMDGPU: Fix promote alloca pass creating huge arraysMatt Arsenault2016-05-163-20/+154
| | | | | | | | | | | | | | | This was assuming it could use all memory before, which is a bad decision because it restricts occupancy. By default, only try to use enough space that could reduce occupancy to 7, an arbitrarily chosen limit. Based on the exist LDS usage, try to round up to the limit in the current tier instead of further hurting occupancy. This isn't ideal, because it doesn't accurately know how much space is going to be used for alignment padding. llvm-svn: 269708
* Fail early on unknown appending linkage variables.Rafael Espindola2016-05-161-6/+3
| | | | | | | | | | | | | In practice only a few well known appending linkage variables work. Currently if codegen sees an unknown appending linkage variable it will just print it as a regular global. That is wrong as the symbol in the produced object file has different semantics as the one provided by the appending linkage. This just errors early instead of producing a broken .o. llvm-svn: 269706
* Revert "Retry^2 "[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC""Vedant Kumar2016-05-167-351/+325
| | | | | | | | This reverts commit r269694. MSVC says: error C2086: 'char llvm::ProfErrorInfoBase<enum llvm::instrprof_error>::ID' : redefinition llvm-svn: 269700
* SelectionDAG: Select min/max when both are usedMatt Arsenault2016-05-161-1/+9
| | | | | | | | | | | Allow two users of the condition if the other user is also a min/max select. i.e. %c = icmp slt i32 %x, %y %min = select i1 %c, i32 %x, i32 %y %max = select i1 %c, i32 %y, i32 %x llvm-svn: 269699
* [AArch64] Fix bug in large stack spill slot handling (PR27717)Geoff Berry2016-05-161-1/+3
| | | | | | | | | | | | | | | | | Summary: Fix bug in MachO path where a frame index offset would not be reserved for handling large frames when an extra non-used callee-save register was saved. In the case where the extra register is reserved or not a GPR (e.g. %FP in the MachO case), this would lead to the register scavenger later failing when called from PrologEpilogInserter. Reviewers: t.p.northover Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D20185 llvm-svn: 269697
* Retry^2 "[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC"Vedant Kumar2016-05-167-325/+351
| | | | | | | | | | | | | | | Transition InstrProf and Coverage over to the stricter Error/Expected interface. Changes since the initial commit: - Address undefined-var-template warning. - Fix error message printing in llvm-profdata. - Check errors in loadTestingFormat() + annotateAllFunctions(). - Defer error handling in InstrProfIterator to InstrProfReader. Differential Revision: http://reviews.llvm.org/D19901 llvm-svn: 269694
* [SystemZ] Support LRVH and STRVH opcodesBryan Chan2016-05-164-5/+114
| | | | | | | | | | | | Summary: On Linux, /usr/include/bits/byteswap-16.h defines __byteswap_16(x) as an inlined LRVH (Load Reversed Half-word) instruction. The SystemZ back-end did not support this opcode and the inlined assembly would cause a fatal error. Reviewers: bryanpkc, uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18732 llvm-svn: 269688
* Remove extra whitespace. NFC.Chad Rosier2016-05-161-1/+1
| | | | llvm-svn: 269685
* ThinLTO: sort inputs and schedule by decreasing sizeMehdi Amini2016-05-161-4/+18
| | | | | | | | | | | This is a compile time optimization: keeping a large file to process at the end hurts parallelism. The heurisitic used right now is the input buffer size, however we may want to consider the number of functions to import or the different number of files to load for importing as well. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269684
* [WebAssembly] Mark COPY_LOCAL and TEE_LOCAL instructions has having no side ↵Dan Gohman2016-05-161-0/+2
| | | | | | effects. llvm-svn: 269683
* ThinLTO caching: reload cached file with mmap and drop heap-allocated memory ↵Mehdi Amini2016-05-161-5/+14
| | | | | | | | | | | | buffer This is reducing pressure on the OS memory system, and is NFC when not using a cache. I measure a 10x memory consumption reduction when linking opt with full debug info. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269682
* [WebAssembly] Use eqz to negate a branch conditions.Dan Gohman2016-05-161-8/+2
| | | | llvm-svn: 269681
* [BasicAA] Update comments based on feedback from hfinkel. NFCI.Geoff Berry2016-05-161-1/+4
| | | | | | | Original change Hal's comments were based on: http://reviews.llvm.org/D19730 llvm-svn: 269678
* [WebAssembly] Add a few optimization ideas to README.txt.Dan Gohman2016-05-161-0/+15
| | | | llvm-svn: 269677
* [X86] Remove transformVSELECTtoBlendVECTOR_SHUFFLEMichael Kuperstein2016-05-161-110/+0
| | | | | | | | | | | | | | | The new X86 shuffle lowering can do just fine without transforming vselects into vector_shuffles. It looks like the only thing this code does right now is cause trouble - in particular, it can lead to combine/legalization infinite loops. Note that it's not completely NFC, since some of the shuffle masks get inverted, which may cause slight differences further down the line. We may want to find a way to invert those masks, but that's orthogonal to this commit. This fixes the hang in PR27689. llvm-svn: 269676
* [Hexagon] Make getCallerSavedRegs specific to a register classKrzysztof Parzyszek2016-05-163-33/+61
| | | | llvm-svn: 269674
* [LAA] Rename forwarding conflict detection option (NFC)Matthew Simpson2016-05-161-6/+6
| | | | | | | This patch renames the option enabling the store-to-load forwarding conflict detection optimization. This change was requested in the review of D20241. llvm-svn: 269668
* [LAA] Comment couldPreventStoreLoadForward. NFCAdam Nemet2016-05-161-2/+8
| | | | | | | Also s/Cycles/Iters/ in NumCyclesForStoreLoadThroughMemory to make it clear that this is not about clock cycles but loop cycles/iterations. llvm-svn: 269667
* [LAA] clang-format the function couldPreventStoreLoadForward. NFCAdam Nemet2016-05-161-9/+9
| | | | llvm-svn: 269666
* [Hexagon] Simplify HexagonInstrInfo::isPredicableKrzysztof Parzyszek2016-05-161-84/+5
| | | | | | | Remove all the checks for constant extenders from isPredicable. The users of it should be the ones checking cost/profitability. llvm-svn: 269664
* [PM] Port indirect call promotion pass to new pass managerXinliang David Li2016-05-162-0/+10
| | | | llvm-svn: 269660
* [LV] Ensure safe VF for loops with interleaved accessesMatthew Simpson2016-05-161-1/+23
| | | | | | | | | | | | | The selection of the vectorization factor currently doesn't consider interleaved accesses. The vectorization factor is based on the maximum safe dependence distance computed by LAA. However, for loops with interleaved groups, we should instead base the vectorization factor on the maximum safe dependence distance divided by the maximum interleave factor of all the interleaved groups. Interleaved accesses not in a group will be scalarized. Differential Revision: http://reviews.llvm.org/D20241 llvm-svn: 269659
* [llc] New diagnostic handlerRenato Golin2016-05-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | Without a diagnostic handler installed, llc's behaviour is to exit on the first error that it encounters. This is very different from the behaviour of clang and other front ends, which try to gather as many errors as possible before exiting. This commit adds a diagnostic handler to llc, allowing it to find and report more than one error. The old behaviour is preserved under a flag (-exit-on-error). Some of the tests fail with the new diagnostic handler, so they have to use the new flag in order to run under the previous behaviour. Some of these are known bugs, others need further investigation. Ideally, we should fix the tests and remove the flag at some point in the future. Reapplied after fixing the LLDB build that was broken due to the new DiagnosticSeverity in LLVMContext.h, and fixed an UB in the new change. Patch by Diana Picus. llvm-svn: 269655
* [LAA] Add option to disable conflict detection (NFC)Matthew Simpson2016-05-161-2/+9
| | | | llvm-svn: 269654
* Use proper capitalization and punctuation per coding standards. NFC.Chad Rosier2016-05-161-1/+1
| | | | llvm-svn: 269652
* Fixed unused variable warningSimon Pilgrim2016-05-161-1/+0
| | | | llvm-svn: 269650
* [X86][SSSE3] Lower vector CTLZ with PSHUFB lookupsSimon Pilgrim2016-05-161-5/+119
| | | | | | | | | | This patch uses PSHUFB to lower vector CTLZ and avoid (slower) scalarizations. The leading zero count of each 4-bit nibble of the vector is determined by using a PSHUFB lookup. Pairs of results are then repeatedly combined up to the original element width. Differential Revision: http://reviews.llvm.org/D20016 llvm-svn: 269646
* [Sparc][LEON] Add LEON-specific CASA instruction.Chris Dewhurst2016-05-167-22/+69
| | | | | | Differental Revision: http://reviews.llvm.org/D20098 llvm-svn: 269644
* Appease msc18 to move PassBuilder::crossRegisterProxies() in front of ↵NAKAMURA Takumi2016-05-161-14/+14
| | | | | | | | PassBuilder::parseModulePassPipeline(). I don't know why it crashed cl.exe but it works. llvm-svn: 269643
* [mips][ias] Fix R_MICROMIPS_GOT16 evaluation and eliminate symbol for ↵Daniel Sanders2016-05-162-7/+4
| | | | | | | | | | | | | | | | | | | R_MICROMIPS_(GOT|HI|LO)16 Summary: The failure r269410 worked around turned out to be caused by an incorrect evaluation of R_MICROMIPS_GOT16 which then caused the GOT entries to be incorrect. This patch fixes the evaluation and reverts r269410. Reviewers: sdardis, vkalintiris, rafael Subscribers: rafael, dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D20242 llvm-svn: 269641
* [mips][ias] EF_MIPS_MICROMIPS should iff microMIPS code was emitted.Daniel Sanders2016-05-163-5/+17
| | | | | | | | | | | | | | | Summary: This fixes PR27682. Additionally, '.set micromips' by itself is not sufficient to raise the EF_MIPS_MICROMIPS flag. It is also necessary to emit a microMIPS instruction. This has also been fixed. Reviewers: sdardis, vkalintiris, rafael Subscribers: rafael, dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D20214 llvm-svn: 269639
* ThinLTO: fix non-determinism in bitcode writingMehdi Amini2016-05-161-1/+8
| | | | | | | | Calls are initialized from a DenseMap. We can sort them using the value id to recover some determinism during serialization. From: mehdi_amini <mehdi_amini@91177308-0d34-0410-b5e6-96231b3b80d8> llvm-svn: 269638
* Revert "ThinLTO: fix non-determinism in bitcode writing"Mehdi Amini2016-05-161-7/+1
| | | | | | | This reverts commit r269634, bots are broken. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269637
* [mips] Addition of a third operand to the instructions [d]div, [d]divuZoran Jovanovic2016-05-162-20/+36
| | | | | | | | | Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
* ThinLTO: fix another non-determinism in bitcode writingMehdi Amini2016-05-161-2/+9
| | | | | | | | GlobalVars Refs are initialized from a DenseSet. We can sort them using the value id to recover some determinism during serialization. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269635
* ThinLTO: fix non-determinism in bitcode writingMehdi Amini2016-05-161-1/+7
| | | | | | | | Calls are initialized from a DenseMap. We can sort them using the value id to recover some determinism during serialization. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269634
* ThinLTO: fix non-determinism in bitcode writingMehdi Amini2016-05-161-1/+7
| | | | | | | | Refs are initialized from a DenseSet. We can sort them using the value id to recover some determinism during serialization. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269629
* [PM] RewriterStatepointForGC: add missing dependency.Davide Italiano2016-05-161-0/+1
| | | | llvm-svn: 269624
* [X86][SSE] Simplify zero'th index extract element matchingSimon Pilgrim2016-05-151-2/+3
| | | | llvm-svn: 269615
* [X86][SSE] Removed duplicate variables. NFCI.Simon Pilgrim2016-05-151-18/+10
| | | | | | Removed duplicate getOperand / getSimpleValueType calls. llvm-svn: 269614
* Move helper classes into anonymous namespaces. NFC.Benjamin Kramer2016-05-156-2/+10
| | | | llvm-svn: 269591
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