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* propagate IR-level fast-math-flags to DAG nodes, disabled by defaultSanjay Patel2015-06-164-51/+63
| | | | | | | | | | | | | | | | | | | | | | | This is an updated version of the patch that was checked in at: http://reviews.llvm.org/rL237046 but subsequently reverted because it exposed a bug in the DAG Combiner: http://reviews.llvm.org/D9893 This time, there's an enablement flag ("EnableFMFInDAG") around the code in SelectionDAGBuilder where we copy the set of FP optimization flags from IR instructions to DAG nodes. So, in theory, there should be no functional change from this patch as-is, but it will allow testing with the added functionality to proceed via "-enable-fmf-dag" passed to llc. This patch adds the minimum plumbing necessary to use IR-level fast-math-flags (FMF) in the backend without actually using them for anything yet. This is a follow-on to: http://reviews.llvm.org/rL235997 Differential Revision: http://reviews.llvm.org/D10403 llvm-svn: 239828
* Properly handle the mftb instruction.Kit Barton2015-06-165-36/+58
| | | | | | | | | | | | | | | | | | | | The mftb instruction was incorrectly marked as deprecated in the PPC Backend. Instead, it should not be treated as deprecated, but rather be implemented using the mfspr instruction. A similar patch was put into GCC last year. Details can be found at: https://sourceware.org/ml/binutils/2014-11/msg00383.html. This change will replace instances of the mftb instruction with the mfspr instruction for all CPUs except 601 and pwr3. This will also be the default behaviour. Additional details can be found in: https://llvm.org/bugs/show_bug.cgi?id=23680 Phabricator review: http://reviews.llvm.org/D10419 llvm-svn: 239827
* [Hexagon] Alphabetical ordering of functions, NFC.Colin LeMahieu2015-06-161-5/+5
| | | | llvm-svn: 239826
* Revert "Revert "Fix merges of non-zero vector stores""Matt Arsenault2015-06-161-6/+20
| | | | | | | | Reapply r239539. Don't assume the collected number of stores is the same vector size. Just take the first N stores to fill the vector. llvm-svn: 239825
* Clean up redundant copies of Triple objects. NFCDaniel Sanders2015-06-1629-58/+54
| | | | | | | | | | | | | | Summary: Reviewers: rengolin Reviewed By: rengolin Subscribers: llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10382 llvm-svn: 239823
* [InstSimplify] Allow folding of fdiv X, X with just NaNs ignoredBenjamin Kramer2015-06-161-3/+3
| | | | | | | | Any combination of +-inf/+-inf is NaN so it's already ignored with nnan and we can skip checking for ninf. Also rephrase logic in comments a bit. llvm-svn: 239821
* [mips][ias] Expand on r238751 to cover as many relocs as possible.Daniel Sanders2015-06-161-22/+36
| | | | | | | | | | | | | | | | | | | | | | | Summary: Relocs that can be converted from absolute to PC-relative now do so if IsPCRel is true. Relocs that require PC-relative now call llvm_unreachable() if IsPCRel is false and similarly those that require absolute assert that IsPCRel is false. Note that while it looks like some relocs (e.g. R_MIPS_26) can be converted into the MIPS32r6/MIPS64r6 relocs (R_MIPS_PC*_S2), it isn't actually valid to do so. Placeholders have been left in the testcase for unsupported relocs and relocs that cannot be generated at the moment. Reviewers: vkalintiris Reviewed By: vkalintiris Subscribers: llvm-commits, rafael Differential Revision: http://reviews.llvm.org/D10184 llvm-svn: 239817
* Replace string GNU Triples with llvm::Triple in ↵Daniel Sanders2015-06-166-26/+27
| | | | | | | | | | | | | | | | | | TargetMachine::getTargetTriple(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rengolin Reviewed By: rengolin Subscribers: llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10381 llvm-svn: 239815
* Silence an MSVC warning about not all control paths returning a value; NFC.Aaron Ballman2015-06-161-0/+1
| | | | llvm-svn: 239814
* Recommit r239721: Replace string GNU Triples with llvm::Triple in ↵Daniel Sanders2015-06-163-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | InitMCObjectFileInfo. NFC. Summary: This affects other tools so the previous C++ API has been retained as a deprecated function for the moment. Clang has been updated with a trivial patch (not covered by the pre-commit review) to avoid breaking -Werror builds. Other in-tree tools will be fixed with similar patches. This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. The first time this was committed it accidentally fixed an inconsistency in triples in llvm-mc and this caused a failure. This inconsistency was fixed in r239808. Reviewers: rengolin Reviewed By: rengolin Subscribers: llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10366 llvm-svn: 239812
* [mips] [IAS] Refactor symbol-address loading code into a helper function. NFC.Toma Tabacu2015-06-161-17/+23
| | | | | | | | | | | | Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9523 llvm-svn: 239811
* [MachineSink] Address post-commit review commentsArnaud A. de Grandmaison2015-06-161-21/+28
| | | | | | | The successors cache is now a local variable, making it more visible that it is only valid for the MBB being processed. llvm-svn: 239807
* [AVX512] add integer min/max intrinsics support.Asaf Badouh2015-06-162-24/+48
| | | | | | | review: http://reviews.llvm.org/D10439 llvm-svn: 239806
* X86: optimized i64 vector multiply with constantElena Demikhovsky2015-06-161-5/+11
| | | | | | | | | When we multiply two 64-bit vectors, we extract lower and upper part and use the PMULUDQ instruction. When one of the operands is a constant, the upper part may be zero, we know this at compile time. Example: %a = mul <4 x i64> %b, <4 x i64> < i64 5, i64 5, i64 5, i64 5>. I'm checking the value of the upper part and prevent redundant "multiply", "shift" and "add" operations. llvm-svn: 239802
* Revert 239795Philip Reames2015-06-161-18/+0
| | | | | | I forgot to update some clang test cases. I'll fix and resubmit tomorrow. llvm-svn: 239800
* [AArch64] Generalize extract-high DUP extension to MOVI/MVNI.Ahmed Bougacha2015-06-161-15/+24
| | | | | | | | | | | | | | | | | | These are really immediate DUPs, and suffer from the same problem with long instructions with a high/2 variant (e.g. smull). By extending a MOVI (or DUP, before this patch), we can avoid an ext on the other operand of the long instruction, e.g. turning: ext.16b v0, v0, v0, #8 movi.4h v1, #0x53 smull.4s v0, v0, v1 into: movi.8h v1, #0x53 smull2.4s v0, v0, v1 While there, add a now-necessary combine to fold (VT NVCAST (VT x)). llvm-svn: 239799
* Move logic from JumpThreading into LazyValue info to simplify caller. Philip Reames2015-06-162-53/+51
| | | | | | | | This change is hopefully NFC. The only tricky part is that I changed the context instruction being used to the branch rather than the comparison. I believe both to be correct, but the branch is strictly more powerful. With the moved code, using the branch instruction is required for the basic block comparison test to return the same result. The previous code was able to directly access both the branch and the comparison where the revised code is not. Differential Revision: http://reviews.llvm.org/D9652 llvm-svn: 239797
* modules: Add explicit dependency on intrinsics_genDuncan P. N. Exon Smith2015-06-1611-0/+33
| | | | | | | | | `LLVM_ENABLE_MODULES` builds sometimes fail because `Intrinsics.td` needs to regenerate `Instrinsics.h` before anyone can include anything from the LLVM_IR module. Represent the dependency explicitly to prevent that. llvm-svn: 239796
* [InstCombine] Propagate non-null facts to call parametersPhilip Reames2015-06-161-0/+18
| | | | | | | | If a parameter to a function is known non-null, use the existing parameter attributes to record that fact at the call site. This has no optimization benefit by itself - that I know of - but is an enabling change for http://reviews.llvm.org/D9129. Differential Revision: http://reviews.llvm.org/D9132 llvm-svn: 239795
* MIR Serialization: Print and parse simple machine function attributes.Alex Lorenz2015-06-162-0/+8
| | | | | | | | | | | This commit serializes the simple, scalar attributes from the 'MachineFunction' class. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10449 llvm-svn: 239790
* MIR Serialization: move the MIR printer out of the MIR printing pass.Alex Lorenz2015-06-154-41/+110
| | | | | | | | | This commit decouples the MIR printer and the MIR printing pass so that it will be possible to move the MIR printer into a separate machine IR library later on. Reviewers: Duncan P. N. Exon Smith llvm-svn: 239788
* [X86] Try to shorten dwarf CFI emissionReid Kleckner2015-06-151-28/+23
| | | | llvm-svn: 239786
* Debug Info IR: Switch DIObjCProperty to use DITypeRef.Adrian Prantl2015-06-153-3/+4
| | | | | | | | This is a prerequisite for turning on ODR type uniquing for ObjC++. rdar://problem/21377883 llvm-svn: 239780
* MIR Serialization: Create dummy functions when the MIR file doesn't have ↵Alex Lorenz2015-06-151-3/+24
| | | | | | | | | | | | | | | LLVM IR. This commit creates a dummy LLVM IR function with one basic block and an unreachable instruction for each parsed machine function when the MIR file doesn't have LLVM IR. This change is required as the machine function analysis pass creates machine functions only for the functions that are defined in the current LLVM module. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10135 llvm-svn: 239778
* MIR Serialization: Report an error when machine functions have the same name.Alex Lorenz2015-06-151-0/+3
| | | | | | | | | | | | This commit reports an error when the MIR parser encounters a machine function with the name that is the same as the name of a different machine function. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10130 llvm-svn: 239774
* [Hexagon] PC-relative offsets are relative to packet start rather than the ↵Colin LeMahieu2015-06-151-3/+38
| | | | | | offset of the relocation. Set relocation addend and check it's correct in the ELF. llvm-svn: 239769
* Protection against stack-based memory corruption errors using SafeStackPeter Collingbourne2015-06-1514-3/+638
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the safe stack instrumentation pass to LLVM, which separates the program stack into a safe stack, which stores return addresses, register spills, and local variables that are statically verified to be accessed in a safe way, and the unsafe stack, which stores everything else. Such separation makes it much harder for an attacker to corrupt objects on the safe stack, including function pointers stored in spilled registers and return addresses. You can find more information about the safe stack, as well as other parts of or control-flow hijack protection technique in our OSDI paper on code-pointer integrity (http://dslab.epfl.ch/pubs/cpi.pdf) and our project website (http://levee.epfl.ch). The overhead of our implementation of the safe stack is very close to zero (0.01% on the Phoronix benchmarks). This is lower than the overhead of stack cookies, which are supported by LLVM and are commonly used today, yet the security guarantees of the safe stack are strictly stronger than stack cookies. In some cases, the safe stack improves performance due to better cache locality. Our current implementation of the safe stack is stable and robust, we used it to recompile multiple projects on Linux including Chromium, and we also recompiled the entire FreeBSD user-space system and more than 100 packages. We ran unit tests on the FreeBSD system and many of the packages and observed no errors caused by the safe stack. The safe stack is also fully binary compatible with non-instrumented code and can be applied to parts of a program selectively. This patch is our implementation of the safe stack on top of LLVM. The patches make the following changes: - Add the safestack function attribute, similar to the ssp, sspstrong and sspreq attributes. - Add the SafeStack instrumentation pass that applies the safe stack to all functions that have the safestack attribute. This pass moves all unsafe local variables to the unsafe stack with a separate stack pointer, whereas all safe variables remain on the regular stack that is managed by LLVM as usual. - Invoke the pass as the last stage before code generation (at the same time the existing cookie-based stack protector pass is invoked). - Add unit tests for the safe stack. Original patch by Volodymyr Kuznetsov and others at the Dependable Systems Lab at EPFL; updates and upstreaming by myself. Differential Revision: http://reviews.llvm.org/D6094 llvm-svn: 239761
* Don't indent inside a namespace. NFC.Rafael Espindola2015-06-151-21/+19
| | | | llvm-svn: 239760
* Replace @ with the more common \. NFC.Rafael Espindola2015-06-151-6/+6
| | | | llvm-svn: 239759
* Don't repeat names in comments and start functions with a lower case letter.Rafael Espindola2015-06-151-537/+527
| | | | llvm-svn: 239756
* MIR Serialization: Connect the machine function analysis pass to the MIR parser.Alex Lorenz2015-06-1510-75/+161
| | | | | | | | | | | | | | | | | | | | | This commit connects the machine function analysis pass (which creates machine functions) to the MIR parser, which will initialize the machine functions with the state from the MIR file and reconstruct the machine IR. This commit introduces a new interface called 'MachineFunctionInitializer', which can be used to provide custom initialization for the machine functions. This commit also introduces a new diagnostic class called 'DiagnosticInfoMIRParser' which is used for MIR parsing errors. This commit modifies the default diagnostic handling in LLVMContext - now the the diagnostics are printed directly into llvm::errs() so that the MIR parsing errors can be printed with colours. Reviewers: Justin Bogner Differential Revision: http://reviews.llvm.org/D9928 llvm-svn: 239753
* Remove duplicate conditional in if-stmt.Eric Christopher2015-06-151-2/+1
| | | | | | Fixes PR23839. llvm-svn: 239751
* Cleanup the constructor of BitcodeReader. NFC.Rafael Espindola2015-06-151-30/+28
| | | | | | | | | Use the same argument names as the members. Use default member initializes. Extracted from a patch by Karl Schimpf. llvm-svn: 239749
* Unbreak the build from r239740.Sanjoy Das2015-06-151-4/+4
| | | | | | Do not re-use an enum name as a field name. Some bots don't like this. llvm-svn: 239746
* [Hexagon] Moving pass declarations out of header and in to implementation ↵Colin LeMahieu2015-06-1513-52/+53
| | | | | | files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it. llvm-svn: 239744
* [CodeGen] Add a pass to fold null checks into nearby memory operations.Sanjoy Das2015-06-154-0/+270
| | | | | | | | | | | | | | | | | | | | | Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
* [TargetInstrInfo] Add new hook: AnalyzeBranchPredicate.Sanjoy Das2015-06-152-5/+95
| | | | | | | | | | | | | | | | | | | Summary: NFC: no one uses AnalyzeBranchPredicate yet. Add TargetInstrInfo::AnalyzeBranchPredicate and implement for x86. A later change adding support for page-fault based implicit null checks depends on this. Reviewers: reames, ab, atrick Reviewed By: atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10200 llvm-svn: 239742
* [TargetInstrInfo] Rename getLdStBaseRegImmOfs and implement for x86.Sanjoy Das2015-06-158-24/+58
| | | | | | | | | | | | | | | | | | | | | | | Summary: TargetInstrInfo::getLdStBaseRegImmOfs to TargetInstrInfo::getMemOpBaseRegImmOfs and implement for x86. The implementation only handles a few easy cases now and will be made more sophisticated in the future. This is NFCI: the only user of `getLdStBaseRegImmOfs` (now `getmemOpBaseRegImmOfs`) is `LoadClusterMotion` and `LoadClusterMotion` is disabled for x86. Reviewers: reames, ab, MatzeB, atrick Reviewed By: MatzeB, atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10199 llvm-svn: 239741
* [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.Sanjoy Das2015-06-156-2/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This instruction encodes a loading operation that may fault, and a label to branch to if the load page-faults. The locations of potentially faulting loads and their "handler" destinations are recorded in a FaultMap section, meant to be consumed by LLVM's clients. Nothing generates FAULTING_LOAD_OP instructions yet, but they will be used in a future change. The documentation (FaultMaps.rst) needs improvement and I will update this diff with a more expanded version shortly. Depends on D10196 Reviewers: rnk, reames, AndyAyers, ab, atrick, pgavlin Reviewed By: atrick, pgavlin Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10197 llvm-svn: 239740
* [NFC] Extract X86MCInstLower::LowerMachineOperand.Sanjoy Das2015-06-151-38/+37
| | | | | | | | | | | | | | Summary: Refactoring-only change that will be used later. Reviewers: reames, atrick Reviewed By: atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10196 llvm-svn: 239739
* De-duplicate common expression, NFC.Yaron Keren2015-06-151-3/+3
| | | | llvm-svn: 239736
* Rangify several for loops, NFC.Yaron Keren2015-06-151-17/+15
| | | | llvm-svn: 239733
* On behalf of Alexandros Lamprineas:Evgeny Astigeevich2015-06-151-0/+6
| | | | | | | | | | | | | | | | LLVM targeting aarch64 doesn't correctly produce aligned accesses for non-aligned data at -O0/fast-isel (-mno-unaligned-access). The root cause seems to be in fast-isel not producing unaligned access correctly for -mno-unaligned-access. The patch just aborts fast-isel for loads and stores when -mno-unaligned-access is present. The regression test is updated to check this new test case (-mno-unaligned-access together with fast-isel). Differential Revision: http://reviews.llvm.org/D10360 llvm-svn: 239732
* Revert r239721 - Replace string GNU Triples with llvm::Triple in ↵Daniel Sanders2015-06-153-17/+10
| | | | | | | | InitMCObjectFileInfo. NFC. It appears to cause sparc-little-endian.s to assert on Windows and Darwin. llvm-svn: 239724
* Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC.Daniel Sanders2015-06-153-10/+17
| | | | | | | | | | | | | | | | | | | | | Summary: This affects other tools so the previous C++ API has been retained as a deprecated function for the moment. Clang has been updated with a trivial patch (not covered by the pre-commit review) to avoid breaking -Werror builds. Other in-tree tools will be fixed with similar trivial patches. This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rengolin Reviewed By: rengolin Subscribers: llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10366 llvm-svn: 239721
* [MachineSink] Improve runtime performance. NFC.Arnaud A. de Grandmaison2015-06-151-35/+59
| | | | | | | | | | | | This patch fixes a compilation time issue, when MachineSink faces PHIs with a huge number of operands. This can happen for example in goto table based interpreters, where some basic blocks can have several of those PHIs, each one with several hundreds operands. MachineSink was spending a significant time re-building and re-sorting the list of successors of the current MachineBasicBlock. The computing and sorting of the current MachineBasicBlock successors is now cached. llvm-svn: 239720
* [ValueTracking] do not overwrite analysis results already computedJingyue Wu2015-06-151-146/+160
| | | | | | | | | | | | | | | | | | Summary: ValueTracking used to overwrite the analysis results computed from assumes and dominating conditions. This patch fixes this issue. Test Plan: test/Analysis/ValueTracking/assume.ll Reviewers: hfinkel, majnemer Reviewed By: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10283 llvm-svn: 239718
* [AArch64] Delete two empty files, which should be removed by r239713.Hao Liu2015-06-151-0/+0
| | | | llvm-svn: 239715
* [AArch64] Revert r239711 again. We need to discuss how to share code between ↵Hao Liu2015-06-156-419/+0
| | | | | | AArch64 and ARM backend. llvm-svn: 239713
* [AArch64] Match interleaved memory accesses into ldN/stN instructions.Hao Liu2015-06-156-0/+419
| | | | | | | Re-commit after adding "-aarch64-neon-syntax=generic" to fix the failure on OS X. This patch was firstly committed in r239514, then reverted in r239544 because of a syntax incompatible failure on OS X. llvm-svn: 239711
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