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* Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td andAkira Hatanaka2012-09-156-146/+52
| | | | | | | | | | use load/store fragments defined in TargetSelectionDAG.td in place of them. Unaligned loads/stores are either expanded or lowered to target-specific nodes, so instruction selection should see only aligned load/store nodes. No changes in functionality. llvm-svn: 163960
* Handled unaligned load/stores properly in Mips16 Akira Hatanaka2012-09-151-2/+7
| | | | | | Patch by Reed Kotler. llvm-svn: 163956
* PGO: preserve branch-weight metadata when simplifying two branches with a commonManman Ren2012-09-151-111/+42
| | | | | | | | | | | | | | | | destination. Updated previous implementation to fix a case not covered: // PBI: br i1 %x, TrueDest, BB // BI: br i1 %y, TrueDest, FalseDest The other case was handled correctly. // PBI: br i1 %x, BB, FalseDest // BI: br i1 %y, TrueDest, FalseDest Also tried to use 64-bit arithmetic instead of APInt with scale to simplify the computation. Let me know if you have other opinions about this. llvm-svn: 163954
* Remove comment.Bill Wendling2012-09-141-1/+1
| | | | llvm-svn: 163945
* PGO: preserve branch-weight metadata when simplifying a switch with a singleManman Ren2012-09-142-2/+33
| | | | | | case to a conditional branch and when removing dead cases. llvm-svn: 163942
* Stylistic and 80-col fixesEvan Cheng2012-09-142-8/+4
| | | | llvm-svn: 163940
* TargetSchedModel interface. To be implemented...Andrew Trick2012-09-143-0/+39
| | | | llvm-svn: 163934
* Define MC data tables for the new scheduling machine model.Andrew Trick2012-09-141-5/+5
| | | | llvm-svn: 163933
* Review feedback from Duncan Sands. Alphabetize includes and simplifyAlex Rosenberg2012-09-141-3/+3
| | | | | | lit config. llvm-svn: 163928
* Try to fix the bots by detecting inconsistant branch-weight metadata.Manman Ren2012-09-141-4/+10
| | | | llvm-svn: 163926
* Implement getNumLDMAddresses and expose through ARMBaseInstrInfo.Andrew Trick2012-09-142-0/+34
| | | | llvm-svn: 163922
* Cortex-A9 instruction-level scheduling machine model.Andrew Trick2012-09-141-3/+594
| | | | | | | | | | | | | | | | | | | | This models the A9 processor at the level of instruction operands, as opposed to the itinerary, which models each operation at the level of pipeline stages. The two primary motivations are: 1) Allow MachineScheduler to model A9 as an out-of-order processor. It can now distinguish between hazards that force interlocking vs. buffered resources. 2) Reduce long-term maintenance by allowing the itinerary and target hooks to eventually be removed. Note that almost all of the complexity in the new model exists to model instruction variants, which the itinerary cannot handle. Instead the scheduler previously relied on processor-specific target hooks which are incomplete and buggy. llvm-svn: 163921
* PGO: preserve branch-weight metadata when merging two switches whereManman Ren2012-09-141-5/+12
| | | | | | | the default target of the first switch is not the basic block the second switch is in (PredDefault != BB). llvm-svn: 163916
* misched: add a hook for custom DAG postprocessing.Andrew Trick2012-09-141-0/+9
| | | | llvm-svn: 163915
* DAG post-process for Hexagon MI schedulerSergei Larin2012-09-142-0/+34
| | | | | | | | This patch introduces a possibility for Hexagon MI scheduler to perform some target specific post- processing on the scheduling DAG prior to scheduling. llvm-svn: 163903
* Fix Doxygen issues:Dmitri Gribenko2012-09-1411-33/+33
| | | | | | | | | | * wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param instead of \arg to document parameters in order to be consistent with the rest of the codebase. llvm-svn: 163902
* SROA: Silence unused variable warnings in Release builds.Benjamin Kramer2012-09-141-1/+8
| | | | | | The NDEBUG hack is ugly, but I see no better solution. llvm-svn: 163900
* Remove redundant private field.Benjamin Kramer2012-09-142-3/+2
| | | | | | clang warned about this being unused in Release builds. llvm-svn: 163899
* Rework the computation of a sub-structure natural type. There wereChandler Carruth2012-09-141-10/+20
| | | | | | | | | | | | | pointless checks in here, bad asserts, and just confusing code. I've also added a bit more to the comment to clarify what this function is really trying to do as it was not obvious to Duncan when studying it. Thanks to Duncan for helping me dig through the issue. No real functionality changed here in practical cases, and certainly no test case. This is just cleanup spotted by inspection. llvm-svn: 163897
* Rely on the recursive check for pointer types rather than adding anChandler Carruth2012-09-141-3/+0
| | | | | | | explicit check before recursing. A simplification requested by Duncan during review. llvm-svn: 163896
* Be a bit more aggressive in bailing out of this routine. Spotted byChandler Carruth2012-09-141-1/+1
| | | | | | | inspection by Duncan during review. My suspicion is that we would still have returned 0 anyways in this case, but doing it sooner is better. llvm-svn: 163895
* Add some comments clarifying that the GEP analysis for vector GEPs isChandler Carruth2012-09-141-1/+4
| | | | | | | | deeply suspicious and likely to go away eventually. Also fix a bogus comment about one of the checks in the vector GEP analysis. Based on review from Duncan. llvm-svn: 163894
* Move an instance variable to a local variable based on review by Duncan.Chandler Carruth2012-09-141-9/+16
| | | | | | | | Originally I had anticipated needing to thread this through more bits of the SROA pass itself, but that ended up not happening. In the end, this is a much simpler way to manange the variable. llvm-svn: 163893
* Add a comment about debug intrinsics that I *really* don't want toChandler Carruth2012-09-141-0/+2
| | | | | | forget from Duncan's review as a FIXME. llvm-svn: 163892
* Add two asserts that Duncan thought would help ensure things don't rotChandler Carruth2012-09-141-0/+2
| | | | | | unexpectedly in the future. More fixes from his code review. llvm-svn: 163891
* Actually keep the flag default-off for now. =/ That's what I get forChandler Carruth2012-09-141-1/+1
| | | | | | being busy testing this... llvm-svn: 163890
* Remove some dead, commented out code Duncan spotted in review.Chandler Carruth2012-09-141-4/+0
| | | | llvm-svn: 163889
* Wrap the dumping and printing routines in NDEBUG and LLVM_ENABLE_DUMP macros.Chandler Carruth2012-09-141-0/+6
| | | | llvm-svn: 163888
* Lots of comment fixes and cleanups from Duncan's review.Chandler Carruth2012-09-141-10/+12
| | | | llvm-svn: 163887
* SROA.cpp: Unbreak gcc, sorry!NAKAMURA Takumi2012-09-141-2/+2
| | | | llvm-svn: 163886
* SROA.cpp: Appease msvc. LLVM_ATTRIBUTE(s) should come front of "const".NAKAMURA Takumi2012-09-141-2/+2
| | | | llvm-svn: 163885
* Speculative change to try to fix older GCC versions that can't handleChandler Carruth2012-09-141-2/+2
| | | | | | the injected class name of a dependent base class here. llvm-svn: 163884
* Introduce a new SROA implementation.Chandler Carruth2012-09-144-2/+2642
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is essentially a ground up re-think of the SROA pass in LLVM. It was initially inspired by a few problems with the existing pass: - It is subject to the bane of my existence in optimizations: arbitrary thresholds. - It is overly conservative about which constructs can be split and promoted. - The vector value replacement aspect is separated from the splitting logic, missing many opportunities where splitting and vector value formation can work together. - The splitting is entirely based around the underlying type of the alloca, despite this type often having little to do with the reality of how that memory is used. This is especially prevelant with unions and base classes where we tail-pack derived members. - When splitting fails (often due to the thresholds), the vector value replacement (again because it is separate) can kick in for preposterous cases where we simply should have split the value. This results in forming i1024 and i2048 integer "bit vectors" that tremendously slow down subsequnet IR optimizations (due to large APInts) and impede the backend's lowering. The new design takes an approach that fundamentally is not susceptible to many of these problems. It is the result of a discusison between myself and Duncan Sands over IRC about how to premptively avoid these types of problems and how to do SROA in a more principled way. Since then, it has evolved and grown, but this remains an important aspect: it fixes real world problems with the SROA process today. First, the transform of SROA actually has little to do with replacement. It has more to do with splitting. The goal is to take an aggregate alloca and form a composition of scalar allocas which can replace it and will be most suitable to the eventual replacement by scalar SSA values. The actual replacement is performed by mem2reg (and in the future SSAUpdater). The splitting is divided into four phases. The first phase is an analysis of the uses of the alloca. This phase recursively walks uses, building up a dense datastructure representing the ranges of the alloca's memory actually used and checking for uses which inhibit any aspects of the transform such as the escape of a pointer. Once we have a mapping of the ranges of the alloca used by individual operations, we compute a partitioning of the used ranges. Some uses are inherently splittable (such as memcpy and memset), while scalar uses are not splittable. The goal is to build a partitioning that has the minimum number of splits while placing each unsplittable use in its own partition. Overlapping unsplittable uses belong to the same partition. This is the target split of the aggregate alloca, and it maximizes the number of scalar accesses which become accesses to their own alloca and candidates for promotion. Third, we re-walk the uses of the alloca and assign each specific memory access to all the partitions touched so that we have dense use-lists for each partition. Finally, we build a new, smaller alloca for each partition and rewrite each use of that partition to use the new alloca. During this phase the pass will also work very hard to transform uses of an alloca into a form suitable for promotion, including forming vector operations, speculating loads throguh PHI nodes and selects, etc. After splitting is complete, each newly refined alloca that is a candidate for promotion to a scalar SSA value is run through mem2reg. There are lots of reasonably detailed comments in the source code about the design and algorithms, and I'm going to be trying to improve them in subsequent commits to ensure this is well documented, as the new pass is in many ways more complex than the old one. Some of this is still a WIP, but the current state is reasonbly stable. It has passed bootstrap, the nightly test suite, and Duncan has run it successfully through the ACATS and DragonEgg test suites. That said, it remains behind a default-off flag until the last few pieces are in place, and full testing can be done. Specific areas I'm looking at next: - Improved comments and some code cleanup from reviews. - SSAUpdater and enabling this pass inside the CGSCC pass manager. - Some datastructure tuning and compile-time measurements. - More aggressive FCA splitting and vector formation. Many thanks to Duncan Sands for the thorough final review, as well as Benjamin Kramer for lots of review during the process of writing this pass, and Daniel Berlin for reviewing the data structures and algorithms and general theory of the pass. Also, several other people on IRC, over lunch tables, etc for lots of feedback and advice. llvm-svn: 163883
* Remove silly dead store. Patch by Ettl Martin.Duncan Sands2012-09-141-2/+1
| | | | llvm-svn: 163882
* mips16 fixes.Akira Hatanaka2012-09-142-2/+16
| | | | | | | | | 1. Add MoveR3216 2. Correct spelling for Move32R16 Patch by Reed Kotler. llvm-svn: 163869
* Fix both the test for zero and what we do if we have a zero forEric Christopher2012-09-131-1/+4
| | | | | | | | umulo legalization. Fixes PR13839 llvm-svn: 163856
* Reformat, remove a couple unused variables and move some variablesEric Christopher2012-09-131-8/+8
| | | | | | closer to where they're needed. llvm-svn: 163855
* Assembler: Darwin variables defined via .set are no-dead-strip.Jim Grosbach2012-09-132-4/+9
| | | | | | | | For gas compatibility. rdar://12219394 llvm-svn: 163854
* MachO: Correctly mark symbol-difference variables as N_ABS.Jim Grosbach2012-09-131-5/+30
| | | | | | | | | | | .set a, b - c + CONSTANT d = b - c + CONSTANT Both 'a' and 'd' should be marked as absolute symbols (N_ABS). rdar://12219394 llvm-svn: 163853
* Handle the new !tbaa.struct metadata tags when converting a memcpy into scalarDan Gohman2012-09-131-0/+17
| | | | | | loads and stores. llvm-svn: 163844
* Better const handling for RuntimeDyld and MCJIT.Jim Grosbach2012-09-133-4/+5
| | | | | | mapSectionAddress() wasn't consistent. llvm-svn: 163843
* Fix commentMichael Liao2012-09-131-1/+1
| | | | llvm-svn: 163835
* Add wider vector/integer support for PR12312Michael Liao2012-09-132-100/+103
| | | | | | | | - Enhance the fix to PR12312 to support wider integer, such as 256-bit integer. If more than 1 fully evaluated vectors are found, POR them first followed by the final PTEST. llvm-svn: 163832
* Enhance type legalization on bitcast from vector to integerMichael Liao2012-09-131-5/+34
| | | | | | | | - Find a legal vector type before casting and extracting element from it. - As the new vector type may have more than 2 elements, build the final hi/lo pair by BFS pairing them from bottom to top. llvm-svn: 163830
* Fix the TCRETURNmi64 bug differently.Jakob Stoklund Olesen2012-09-131-2/+21
| | | | | | | | | | Add a PatFrag to match X86tcret using 6 fixed registers or less. This avoids folding loads into TCRETURNmi64 using 7 or more volatile registers. <rdar://problem/12282281> llvm-svn: 163819
* Extract code for reducing a type to a single value type into a helper function.Dan Gohman2012-09-131-15/+21
| | | | llvm-svn: 163817
* Define an official slot for the new !tbaa.struct metadata tag.Dan Gohman2012-09-131-0/+5
| | | | llvm-svn: 163815
* mips16: When copying operands in a conditional branch instruction, allow forAkira Hatanaka2012-09-131-3/+9
| | | | | | | | immediate operands to be copied. Patch by Reed Kotler. llvm-svn: 163811
* Revert r163761 "Don't fold indexed loads into TCRETURNmi64."Jakob Stoklund Olesen2012-09-133-39/+1
| | | | | | The patch caused "Wrong topological sorting" assertions. llvm-svn: 163810
* MemCpyOpt: When forming a memset from stores also take GEP constexprs into ↵Benjamin Kramer2012-09-131-3/+3
| | | | | | | | account. This is common when storing to global variables. llvm-svn: 163809
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