| Commit message (Collapse) | Author | Age | Files | Lines |
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Rename the routines to reflect the reality that they are more related to call
frame information than to Win64 EH. Although EH is implemented in an intertwined
manner by augmenting with an exception handler and an associated parameter, the
majority of these routines emit information required to unwind the frames. This
also helps identify that these routines are generic for most windows platforms
(they apply equally to nearly all architectures except x86) although the
encoding of the information is architecture dependent.
Unwinding data is emitted via EmitWinCFI* and exception handling information via
EmitWinEH*.
llvm-svn: 211994
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simplify some code.
llvm-svn: 211993
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llvm-svn: 211986
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RuntimeDyld now uses MCInst::dump_pretty() which introduces a dependency on
'MC'.
llvm-svn: 211978
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No functionality change, just correcting the assertion message.
llvm-svn: 211977
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lowering for v16i8.
ASan and some bots caught this bug with existing test cases. Fixing it
even fixed a miscompile with one of the test cases. I'm still a bit
suspicious of this test case as I've not taken a proper amount of time
to think about it, but the fix here is strict goodness.
llvm-svn: 211976
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These show up really frequently, not the least with actual splats. =] We
lowered these quite badly before. The new code path tries to widen i8
shuffles to i16 shuffles in a splat-like way. There are still some
inefficiencies in our i16 splat logic though, so we aren't really done
here.
Also, for certain patterns (bit of a gather-and-splat) we still
generate pretty silly code, and I've left a fixme for addressing it.
However, I'm not actually worried about this code pattern as much. The
old shuffle lowering generates a 29 instruction monstrosity for it that
should execute much more slowly.
llvm-svn: 211974
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Some users' C++11 standard libraries don't support std::to_string yet.
llvm-svn: 211961
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llvm-svn: 211960
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Hopefully this will unbreak the windows bots.
llvm-svn: 211958
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This patch adds a "-verify" mode to the llvm-rtdyld utility. In verify mode,
llvm-rtdyld will test supplied expressions against the linked program images
that it creates in memory. This scheme can be used to verify the correctness
of the relocation logic applied by RuntimeDyld.
The expressions to test will be read out of files passed via the -check option
(there may be more than one of these). Expressions to check are extracted from
lines of the form:
# rtdyld-check: <expression>
This system is designed to fit the llvm-lit regression test workflow. It is
format and target agnostic, and supports verification of images linked for
remote targets. The expression language is defined in
llvm/include/llvm/RuntimeDyldChecker.h . Examples can be found in
test/ExecutionEngine/RuntimeDyld.
llvm-svn: 211956
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lowering.
For maximum irony, I had already discovered this bug, diagnosed it, and
left FIXMEs about it in the test cases. =[ I just failed to go back over
those until after i had reduced a bootstrap miscompile down to a single
TU, stared at the assembly for an hour, and figured out the bug. Again.
Oh well.
llvm-svn: 211955
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own. Thanks Hal!
llvm-svn: 211952
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llvm-svn: 211949
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Also clean up some of the logic in NVVMReflect.cpp while we're messing around in there.
llvm-svn: 211948
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ones representable as MVTs
llvm-svn: 211947
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llvm-svn: 211946
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llvm-svn: 211945
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llvm-svn: 211944
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that does not support initialization
llvm-svn: 211943
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llvm-svn: 211942
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common linkage
llvm-svn: 211941
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be emitted
llvm-svn: 211940
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The address space of the pointer must be global (1) for these intrinsics. There must also be alignment metadata attached to the intrinsic calls, e.g.
%val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0
!0 = metadata !{i32 4}
llvm-svn: 211939
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structs and vectors
llvm-svn: 211938
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llvm-svn: 211937
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llvm-svn: 211936
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This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer
llvm-svn: 211935
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llvm-svn: 211934
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llvm-svn: 211933
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llvm-svn: 211932
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llvm-svn: 211931
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llvm-svn: 211930
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Default PTX version is set to PTX 3.2
llvm-svn: 211929
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llvm-svn: 211928
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NVPTX is a bit special in the optimizations it requires, so this gives
us better control over the backend optimization pipeline.
llvm-svn: 211927
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llvm-svn: 211926
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structures and vectors
llvm-svn: 211925
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llvm-svn: 211923
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a bootstrap.
I managed to mis-remember how PACKUS worked on x86, and was using undef
for the high bytes instead of zero. The fix is fairly obvious.
llvm-svn: 211922
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This new IR facility allows us to represent the object-file semantic of
a COMDAT group.
COMDATs allow us to tie together sections and make the inclusion of one
dependent on another. This is required to implement features like MS
ABI VFTables and optimizing away certain kinds of initialization in C++.
This functionality is only representable in COFF and ELF, Mach-O has no
similar mechanism.
Differential Revision: http://reviews.llvm.org/D4178
llvm-svn: 211920
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where there is no timeout. In the case where there is a timeout though, the
code is still wrong since it doesn't check that the alarm really went off.
Without this patch, I cannot debug a program that forks itself using
sys::ExecuteAndWait with lldb.
llvm-svn: 211918
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llvm-svn: 211917
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COFF sections in MC were represented by a tuple of section-name and
COMDAT-name. This is not sufficient to represent a .text section
associated with another .text section; we need a way to distinguish
between the key section and the one marked associative.
llvm-svn: 211913
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llvm-svn: 211911
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llvm-svn: 211906
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llvm-svn: 211902
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I'll fix the problems in libclang and other projects in ways that don't
require <mutex> until we sort out the cygwin situation.
llvm-svn: 211900
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I've run into a bug where current LLVM at -O0 (with fast-isel)
generated invalid code like:
ld 0, 20936(1) # 8-byte Folded Reload
stw 12, 10348(0)
stw 12, 10344(0)
The underlying vreg had been introduced as base register by the
Local Stack Slot Allocation pass. That register was constrained
to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match
the ADDI instruction used to set it, but it was *not* constrained
to G8RC_NOX0 to fit the *use* of the register in an address.
That should have happened in PPCRegisterInfo::resolveFrameIndex.
This patch adds an appropriate constrainRegClass call.
Reviewed by Hal Finkel.
llvm-svn: 211897
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llvm-svn: 211894
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