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* [fuzzer] Add a gtest-style testKostya Serebryany2015-01-306-24/+101
| | | | | | | | | | | | | | | | Summary: Add one gtest-style test. Test Plan: run on bot Reviewers: samsonov Reviewed By: samsonov Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7287 llvm-svn: 227639
* Reuse a bunch of cached subtargets and remove getSubtarget callsEric Christopher2015-01-3022-167/+139
| | | | | | without a Function argument. llvm-svn: 227638
* Add ARM test for r227489, but XFAIL because this is actually more work than ↵David Blaikie2015-01-301-7/+7
| | | | | | | | | | | | | | it appeared to be. Also revert r227489 since it didn't actually fix the thing I thought I was fixing (since the test case was targeting the wrong architecture initially). The change might be correct & demonstrated by other test cases, but it's not a priority for me to find those test cases right now. Filed PR22417 for the failure. llvm-svn: 227632
* NFC. Making printOptionValues an API on the parser class.Chris Bieneman2015-01-301-3/+7
| | | | llvm-svn: 227626
* Fix memory leak in WinEHPrepare introduced in r227405.Alexey Samsonov2015-01-301-1/+3
| | | | | | This leak was detected by ASan bootstrap of LLVM. llvm-svn: 227625
* Remove unused function.Eric Christopher2015-01-301-4/+0
| | | | llvm-svn: 227624
* Remove extraneous forward declaration.Eric Christopher2015-01-301-1/+0
| | | | llvm-svn: 227623
* Use the cached subtargets and remove calls to getSubtarget/getSubtargetImplEric Christopher2015-01-309-174/+154
| | | | | | without a Function argument. llvm-svn: 227622
* [Hexagon] Adding vector shift instructions and tests.Colin LeMahieu2015-01-304-2/+107
| | | | llvm-svn: 227619
* R600/SI: Handle SI_SPILL_V96_RESTORE in SIRegisterInfo::eliminateFrameIndex()Tom Stellard2015-01-301-0/+1
| | | | | | This fixes a crash in Unigine Heaven. llvm-svn: 227618
* Silence "not all paths return a value" warning in MSVCReid Kleckner2015-01-301-0/+1
| | | | llvm-svn: 227614
* [Hexagon] Adding vector predicate instructions.Colin LeMahieu2015-01-302-0/+65
| | | | llvm-svn: 227613
* [Hexagon] Adding vector permutation instructions and tests.Colin LeMahieu2015-01-302-0/+85
| | | | llvm-svn: 227612
* Win64: Put a REX_W prefix on all TAILJMP* instructionsReid Kleckner2015-01-306-15/+43
| | | | | | | | | | | | | MSDN's x64 software conventions page says that this is one of the fixed list of legal epilogues: https://msdn.microsoft.com/en-us/library/tawsa7cb.aspx Presumably this is how the unwinder distinguishes epilogue jumps from in-function control flow. Also normalize the way we place "## TAILCALL" comments on such jumps. llvm-svn: 227611
* [Hexagon] Adding vector multiplies. Cleaning up tests.Colin LeMahieu2015-01-303-20/+208
| | | | llvm-svn: 227609
* [Hexagon] Adding XTYPE/COMPLEX instructions and cleaning up tests.Colin LeMahieu2015-01-304-0/+297
| | | | llvm-svn: 227607
* [AArch64] Make AArch64A57FPLoadBalancing output stable.Chad Rosier2015-01-301-2/+9
| | | | | | | | | | | | | Add tie breaker to colorChainSet() sort so that processing order doesn't depend on std::set order, which depends on pointer order, which is unstable from run to run. No test case as this is nearly impossible to reproduce. Phabricator Review: http://reviews.llvm.org/D7265 Patch by Geoff Berry <gberry@codeaurora.org>! llvm-svn: 227606
* Remove a redundant dyn_cast.Adrian Prantl2015-01-301-3/+2
| | | | llvm-svn: 227605
* Inliner: Use replaceDbgDeclareForAlloca() instead of splicing theAdrian Prantl2015-01-303-18/+20
| | | | | | | instruction and generalize it to optionally dereference the variable. Follow-up to r227544. llvm-svn: 227604
* ARM: further correct .fpu directive handlingSaleem Abdulrasool2015-01-301-7/+9
| | | | | | | | | | If the original FPU specification involved a restricted VFP unit (d16), ensure that we reset the functionality when we encounter a new FPU type. In particular, if the user specified vfpv3-d16, but switched to a VFPv3 (which has 32 double precision registers), we would fail to reset the D16 feature, and treat it as being equivalent to vfpv3-d16. llvm-svn: 227603
* Revert "Revert "Matching ARM change for r227481: DebugInfo: Teach Fast ISel ↵Renato Golin2015-01-301-7/+7
| | | | | | | | to respect the debug location of comparisons in jumps."" This reverts commit r227600, since that reverted the wrong comit. Sorry. llvm-svn: 227601
* Revert "Matching ARM change for r227481: DebugInfo: Teach Fast ISel to ↵Renato Golin2015-01-301-7/+7
| | | | | | | | respect the debug location of comparisons in jumps." This reverts commit r227488 as it was failing ARM bots. llvm-svn: 227600
* [Hexagon] Adding XTYPE/ALU vector instructions. Organizing test files.Colin LeMahieu2015-01-303-8/+213
| | | | llvm-svn: 227598
* ARM: improve caret diagnostics for invalid FPU nameSaleem Abdulrasool2015-01-301-1/+2
| | | | | | | In the case of an invalid FPU name, place the caret at the name rather than FPU directive. llvm-svn: 227595
* Check bit widths before trying to get a type.Filipe Cabecinhas2015-01-301-2/+7
| | | | | | | | | Added a test case for it. Also added run lines for the test case in r227566. Bugs found with afl-fuzz llvm-svn: 227589
* [Hexagon] Adding a number of vector load variants and organizing tests.Colin LeMahieu2015-01-302-16/+92
| | | | llvm-svn: 227588
* Move DebugInfo to DebugInfo/DWARF.Zachary Turner2015-01-3029-61/+102
| | | | | | | | | | | | | In preparation for adding PDB support to LLVM, this moves the DWARF parsing code to its own subdirectory under DebugInfo, and renames LLVMDebugInfo to LLVMDebugInfoDWARF. This is purely a mechanical / build system change. Differential Revision: http://reviews.llvm.org/D7269 Reviewed by: Eric Christopher llvm-svn: 227586
* ARM: correct handling of .fpu directiveSaleem Abdulrasool2015-01-301-23/+35
| | | | | | | | | | | | | The FPU directive permits the user to switch the target FPU, enabling instructions that would be otherwise unavailable. However, when configuring the new subtarget features, we would not enable the implied functions for newer FPUs. This would result in invalid rejection of valid input. Ensure that we inherit the implied FPU functionality when enabling newer versions of the FPU. Fortunately, these are mostly hierarchical, unlike the CPUs. Addresses PR22395. llvm-svn: 227584
* tidy up; NFCSanjay Patel2015-01-301-6/+5
| | | | llvm-svn: 227582
* [PM] Sink the population of the pass manager with target-specificChandler Carruth2015-01-302-8/+5
| | | | | | | | | | | | analyses back into the LTO code generator. The pass manager builder (and the transforms library in general) shouldn't be referencing the target machine at all. This makes the LTO population work like the others -- the data layout and target transform info need to be pre-populated. llvm-svn: 227576
* Fix a warning introduced by r227557 due to a default label in a fullyChandler Carruth2015-01-301-1/+0
| | | | | | covering switch. llvm-svn: 227575
* [Cygming] Seek also chkstk_ms, or JIT fails with DLL builds. It is fixup for ↵NAKAMURA Takumi2015-01-301-0/+6
| | | | | | r227519. llvm-svn: 227574
* [mips] Manually replace JAL pseudo-instructions with their JALR equivalent, ↵Toma Tabacu2015-01-302-2/+55
| | | | | | | | | | | | | | | | | | | | | | | | | instead of using InstAlias. Summary: This is needed by the .cprestore assembler directive. This directive needs to be able to insert an LW instruction after every JALR replacement of a JAL pseudo-instruction (and never after a JALR which has NOT been a result of a pseudo-instruction replacement). The problem with using InstAlias for these is that after it replaces the pseudo-instruction, we can't find out if the resulting JALR instruction was generated by an InstAlias or not, so we don't know whether or not to insert our LW instruction. By replacing it manually, we know when the pseudo-instruction replacement happens and we can insert the LW instruction correctly. Reviewers: dsanders Reviewed By: dsanders Subscribers: emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D5601 llvm-svn: 227568
* [bitcode reader] Fix an assert on invalid type tablesFilipe Cabecinhas2015-01-301-1/+3
| | | | | | Bug found with afl-fuzz llvm-svn: 227566
* [LoopVectorize] Induction variables: support arbitrary constant step.Hao Liu2015-01-301-133/+129
| | | | | | | | | | Previously, only -1 and +1 step values are supported for induction variables. This patch extends LV to support arbitrary constant steps. Initial patch by Alexey Volkov. Some bug fixes are added in the following version. Differential Revision: http://reviews.llvm.org/D6051 and http://reviews.llvm.org/D7193 llvm-svn: 227557
* [AArch64]Fix PR21675, a bug about lowering llvm.ctpop.i32. We should noot ↵Hao Liu2015-01-301-10/+4
| | | | | | | | use "DAG.getUNDEF(MVT::v8i8)" to get all zero vector. Patch by Wei-cheng Wang. llvm-svn: 227550
* Use the cached subtarget in PPCFrameLowering.Eric Christopher2015-01-301-13/+12
| | | | llvm-svn: 227548
* Migrate some of PPC away from the use of bare getSubtarget/getSubtargetImpl.Eric Christopher2015-01-302-10/+10
| | | | llvm-svn: 227547
* Migrage PPCRegisterInfo to use the cached subtarget.Eric Christopher2015-01-301-29/+22
| | | | llvm-svn: 227546
* Fix PR22386. The inliner moves static allocas to the entry basic blockAdrian Prantl2015-01-301-0/+8
| | | | | | so we need to move the dbg.declare intrinsics that describe them, too. llvm-svn: 227544
* Migrate a bare getSubtarget call to query the MachineFunctionEric Christopher2015-01-301-3/+3
| | | | | | for the target dependent one. llvm-svn: 227542
* Migrate NVPTXISelLowering to take the subtarget that it's dependentEric Christopher2015-01-303-18/+19
| | | | | | upon as an argument and store/use that in the entire function. llvm-svn: 227541
* Remove unused argument.Eric Christopher2015-01-301-6/+5
| | | | llvm-svn: 227539
* Migrate NVPTXISelDAGToDAG's getSubtarget to a runOnMachineFunctionEric Christopher2015-01-303-52/+56
| | | | | | version. Update NVPTXInstrInfo accordingly. llvm-svn: 227538
* Remove calls to bare getSubtarget and clean up the functionsEric Christopher2015-01-302-11/+9
| | | | | | accordingly. llvm-svn: 227535
* [LTO] Scan all per-function subtargets when collecting runtime library names.Akira Hatanaka2015-01-301-12/+22
| | | | | | | | | | | | accumulateAndSortLibcalls in LTOCodeGenerator.cpp collects names of runtime library functions which are used to identify user-defined functions that should be protected. Previously, this function would only scan the TargetLowering object belonging to the "main" subtarget for the library function names. This commit changes it to scan all per-function subtargets. Differential Revision: http://reviews.llvm.org/D7275 llvm-svn: 227533
* Remove a few getSubtarget calls in AArch64 pass manager initialization.Eric Christopher2015-01-301-2/+2
| | | | llvm-svn: 227531
* Clean up some uses of getSubtarget in AArch64.Eric Christopher2015-01-306-23/+12
| | | | llvm-svn: 227530
* This only needs TargetInstrInfo, not the specialized one.Eric Christopher2015-01-301-3/+3
| | | | llvm-svn: 227529
* iOS doesn't have crt_externs.h available, so we fall back to the posix method.Chris Bieneman2015-01-301-2/+5
| | | | llvm-svn: 227521
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