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* Add support for @GOTPTOFF in i386 mode.Nick Lewycky2011-06-041-0/+3
| | | | llvm-svn: 132643
* If the block that we're threading through is jumped to by an indirect branch,Bill Wendling2011-06-041-1/+3
| | | | | | | | | | | | then we don't want to set the destination in the indirect branch to the destination. This is because the indirect branch needs its destinations to have had their block addresses taken. This isn't so of the new critical edge that's split during this process. If it turns out that the destination block has only one predecessor, and that being a BB with an indirect branch, then it won't be marked as 'used' and may be removed. PR10072 llvm-svn: 132638
* Reapply r131781, now that the GVN bug with partially-aliasing loadsDan Gohman2011-06-041-1/+11
| | | | | | is disabled. llvm-svn: 132632
* Disable the main feature of 130180, the elimination of loads that areDan Gohman2011-06-041-0/+6
| | | | | | | | | | redundant with partially-aliasing loads. When computing what portion of a clobbering load value is needed, it doesn't consider phi-translation which may have occurred between the clobbing load and the redundant load. llvm-svn: 132631
* Revert r131781 again. Apparently there is more going on here.Dan Gohman2011-06-041-11/+1
| | | | llvm-svn: 132625
* Fold assert-only-used variable into the assert.Nick Lewycky2011-06-041-2/+1
| | | | llvm-svn: 132620
* Missing include of climits in the new BranchProbability pass.Andrew Trick2011-06-041-0/+1
| | | | llvm-svn: 132616
* New BranchProbabilityInfo analysis. Patch by Jakub Staszak!Andrew Trick2011-06-043-0/+350
| | | | | | | | | | | BranchProbabilityInfo provides an interface for IR passes to query the likelihood that control follows a CFG edge. This patch provides an initial implementation of static branch predication that will populate BranchProbabilityInfo for branches with no external profile information using very simple heuristics. It currently isn't hooked up to any external profile data, so static prediction does all the work. llvm-svn: 132613
* Reapply r131781 (revert r131809), now that some BasicAA shortcomingsDan Gohman2011-06-041-1/+11
| | | | | | it exposed are fixed. llvm-svn: 132611
* Fix BasicAA's recursion detection so that it doesn't pessimizeDan Gohman2011-06-041-37/+27
| | | | | | | | | queries in the case of a DAG, where a query reaches a node visited earlier, but it's not on a cycle. This avoids MayAlias results in cases where BasicAA is expected to return MustAlias or PartialAlias in order to protect TBAA. llvm-svn: 132609
* Reapply 132424 with fixes. This fixes PR10068.Stuart Hastings2011-06-035-6/+128
| | | | | | rdar://problem/5993888 llvm-svn: 132606
* Blackfin always uses a reserved call frame.Jakob Stoklund Olesen2011-06-033-2/+7
| | | | | | | Materializing the stack pointer update before a call requires a scratch register that may not be available. llvm-svn: 132601
* Another possible bug. Stopgap until we can autogenerate tables andEric Christopher2011-06-031-6/+3
| | | | | | | | constraint lengths. Part of rdar://9037836 and rdar://9119939 llvm-svn: 132598
* Fix an off by one error.Eric Christopher2011-06-031-2/+1
| | | | | | Part of rdar://9037836 and rdar://9119939 llvm-svn: 132590
* Switch AllocationOrder to using RegisterClassInfo instead of a BitVectorJakob Stoklund Olesen2011-06-035-22/+18
| | | | | | | | | of reserved registers. Use RegisterClassInfo in RABasic as well. This slightly changes som allocation orders because RegisterClassInfo puts CSR aliases last. llvm-svn: 132581
* Preserve the original ordering when a CSR has multiple aliases.Jakob Stoklund Olesen2011-06-031-2/+14
| | | | | | | | Previously, these aliases would be ordered alphabetically. (BH, BL) Print out the computed allocation orders. llvm-svn: 132580
* When merging MustAlias and PartialAlias, chose PartialAlias insteadDan Gohman2011-06-031-10/+21
| | | | | | of conservatively choosing MayAlias. llvm-svn: 132579
* Use IRBuilder, preserve line numbers.Devang Patel2011-06-031-4/+6
| | | | llvm-svn: 132578
* Make the Uv constraint a memory operand. This doesn't solve theEric Christopher2011-06-031-0/+3
| | | | | | | | addressing mode problem mentioned in r132559. Backend part of rdar://9037836 and part of rdar://9119939 llvm-svn: 132561
* Add a TODO about memory operands.Eric Christopher2011-06-031-1/+5
| | | | llvm-svn: 132559
* Test commit.Hans Wennborg2011-06-031-2/+2
| | | | llvm-svn: 132558
* A typedef's context is not the same as type's context. It is the context of ↵Devang Patel2011-06-031-2/+2
| | | | | | typedef decl itself. Use extra parameter to communicate this to DIBuilder. llvm-svn: 132556
* Revert name change from r132533. Lower case naming was intended per style ↵Chad Rosier2011-06-033-7/+7
| | | | | | guidelines. llvm-svn: 132555
* Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant.Roman Divacky2011-06-034-6/+12
| | | | | | | | | | | | | - Check for MTCTR8 in addition to MTCTR when looking up a hazard. - When lowering an indirect call use CTR8 when targeting 64bit. - Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND. The last change fixes PR8487. With those changes, we are able to compile a running "ls" and "sh" on FreeBSD/PowerPC64. llvm-svn: 132552
* singed int causes signed extension, which contradicts the intention to pick upZhongxing Xu2011-06-031-1/+1
| | | | | | integers with high 32 bits being zero. llvm-svn: 132538
* Bail on unswitching a switch statement for a case with a critical edge. We nameNick Lewycky2011-06-031-1/+5
| | | | | | | which edge to split by pred/succ pair, which means that we can end up splitting the wrong edge (by case value) in the switch statement entirely. Fixes PR10031! llvm-svn: 132535
* Whitespace and other cleanup. Functionallity unchanged.Chad Rosier2011-06-034-15/+10
| | | | llvm-svn: 132533
* Add ARM fast-isel support for materializing the address of a global in cases ↵Eli Friedman2011-06-031-3/+17
| | | | | | | | where the global uses an indirect symbol. rdar://9431157 llvm-svn: 132522
* Basic PassManager diagnostics.Andrew Trick2011-06-031-1/+11
| | | | | | | | Added asserts whenever attempting to use a potentially uninitialized pass. This helps people trying to develop a new pass and people trying to understand the bug reports filed by the former people. llvm-svn: 132520
* whitespaceAndrew Trick2011-06-031-3/+3
| | | | llvm-svn: 132519
* Avoid calling TRI->getAllocatableSet in RAFast.Jakob Stoklund Olesen2011-06-022-9/+23
| | | | | | | | | | | | | | When compiling a program with lots of small functions like 483.xalancbmk, this makes RAFast 11% faster. Add some comments to clarify the difference between unallocatable and reserved registers. It's quite subtle. The fast register allocator depends on EFLAGS' not being allocatable on x86. That way it can completely avoid tracking liveness, and it won't mind when there are multiple uses of a single def. llvm-svn: 132514
* Have LowerOperandForConstraint handle multiple character constraints.Eric Christopher2011-06-0210-16/+34
| | | | | | Part of rdar://9119939 llvm-svn: 132510
* Flag unallocatable register classes instead of giving them emptyJakob Stoklund Olesen2011-06-023-39/+8
| | | | | | allocation orders. llvm-svn: 132509
* Make it possible to have unallocatable register classes.Jakob Stoklund Olesen2011-06-022-1/+4
| | | | | | | | | | | | | | | Some register classes are only used for instruction operand constraints. They should never be used for virtual registers. Previously, those register classes were given an empty allocation order, but now you can say 'let isAllocatable=0' in the register class definition. TableGen calculates if a register is part of any allocatable register class, and makes that information available in TargetRegisterDesc::inAllocatableClass. The goal here is to eliminate use cases for overriding allocation_order_* methods. llvm-svn: 132508
* Preserve line number information while converting Invoke into a Call.Devang Patel2011-06-021-0/+1
| | | | llvm-svn: 132505
* Just use a SmallVector.Jakob Stoklund Olesen2011-06-022-2/+3
| | | | | | | | | I was confused whether new uint8_t[] would zero-initialize the returned array, and it seems that so is gcc-4.0. This should fix the test failures on darwin 9. llvm-svn: 132500
* Remove dead code.Devang Patel2011-06-021-8/+3
| | | | llvm-svn: 132488
* Update DBG_VALUEs while breaking anti dependencies.Devang Patel2011-06-028-29/+42
| | | | llvm-svn: 132487
* Fix encoding for VEXTdf.Tanya Lattner2011-06-021-2/+3
| | | | llvm-svn: 132486
* PR10067: Add missing safety check to call return transformation in ↵Eli Friedman2011-06-021-4/+21
| | | | | | MemCpyOpt::processStore. If something accesses the dest of the "copy" between the call and the copy, the performCallSlotOptzn transformation is not valid. llvm-svn: 132485
* During post RA scheduling, do not try to chase reg defs. to preserve ↵Devang Patel2011-06-022-39/+32
| | | | | | | | DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def. Instead, use simpler approach and let DBG_VALUE follow its predecessor instruction. After live debug value analysis pass, all DBG_VALUE instruction are placed at the right place. Thanks Jakob for the hint! llvm-svn: 132483
* Revert 132424 to fix PR10068.Rafael Espindola2011-06-026-127/+10
| | | | llvm-svn: 132479
* Add a new parse hint for multi-letter constraints in inline asm.Eric Christopher2011-06-021-0/+9
| | | | | | | | Testcase will come when we use it. Part of rdar://9119939 llvm-svn: 132476
* Use RegisterClassInfo::getOrder in RAFast.Jakob Stoklund Olesen2011-06-021-10/+7
| | | | | | | This saves two virtual function calls and an Allocatable BitVector test, making RAFast run 2% faster. llvm-svn: 132471
* .cfi directive register parsing flexibility.Jim Grosbach2011-06-021-1/+1
| | | | | | | | | | Parsing a register name/number for .cfi directives can't assume that a register name starts with a '%' token. Be more flexible and check for a register number instead. Still unlikely to be perfect, but it allows us to parse both plain identifiers as register names and integers as register numbers, which is what we're wanting to support at this point. llvm-svn: 132466
* Omit unnecessary stack copy when x87 input is a load.Stuart Hastings2011-06-021-6/+17
| | | | | | rdar://problem/6373334 llvm-svn: 132458
* Start with a zeroed CSRNum map.Benjamin Kramer2011-06-021-1/+1
| | | | | | Found by valgrind. llvm-svn: 132457
* Initialize members to fix problem found by valgrind.Jakob Stoklund Olesen2011-06-021-2/+3
| | | | llvm-svn: 132456
* Use TRI::has{Sub,Super}ClassEq() where possible.Jakob Stoklund Olesen2011-06-027-10/+8
| | | | | | No functional change. llvm-svn: 132455
* Don't hardcode the %reg format in the streamer.Rafael Espindola2011-06-0210-20/+24
| | | | llvm-svn: 132451
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