| Commit message (Collapse) | Author | Age | Files | Lines |
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wasn't doing the right thing.
llvm-svn: 80958
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llvm-svn: 80956
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for the complicated case where one register is tied to multiple destinations.
This avoids the extra scan of instruction operands that was introduced by
my recent change. I also pulled some code out into a separate
TryInstructionTransform method, added more comments, and renamed some
variables.
Besides all those changes, this takes care of a FIXME in the code regarding
an assumption about there being a single tied use of a register when
converting to a 3-address form. I'm not aware of cases where that assumption
is violated, but the code now only attempts to transform an instruction,
either by commuting its operands or by converting to a 3-address form,
for the simple case where there is a single pair of tied operands.
llvm-svn: 80945
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llvm-svn: 80942
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llvm-svn: 80941
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swapping the operands if necessary.
llvm-svn: 80940
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- when transforming a vector shift of a non-immediate scalar shift amount, zero
extend the i32 shift amount to i64 since the vector shift reads 64 bits
- when transforming i16 vectors to use a vector shift, zero extend i16 shift amount
- improve the code quality in some cases when transforming vectors to use a vector shift
llvm-svn: 80935
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disabling the use of 16-bit operations on x86. This doesn't yet work for
inline asms with 16-bit constraints, vectors with 16-bit elements,
trampoline code, and perhaps other obscurities, but it's enough to try
some experiments.
llvm-svn: 80930
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from MCAsmLexer.h in preparation of supporting other targets. Changed the
X86AsmParser code to reflect this by removing AsmLexer::LexPercent and looking
for AsmToken::Percent when parsing in places that used AsmToken::Register.
Then changed X86ATTAsmParser::ParseRegister to parse out registers as an
AsmToken::Percent followed by an AsmToken::Identifier.
llvm-svn: 80929
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llvm-svn: 80928
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that these passes are properly preserved.
Fix several transformation passes that claimed to preserve LoopSimplify
form but weren't.
llvm-svn: 80926
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LoopSimplify form, which is currently only available on Loops (and
not MachineLoops). Also, move the code out of the header file.
llvm-svn: 80923
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instead of a bool argument, and to do the dominator check itself.
This makes it eaiser to use when DominatorTree information is
available.
llvm-svn: 80920
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llvm-svn: 80919
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llvm-svn: 80918
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llvm-svn: 80917
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memcpy calls.
llvm-svn: 80915
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llvm-svn: 80912
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Removed inverted flag form MaximumSpanningTree, also do not handle so much
information to MaximumSpanningTree.
llvm-svn: 80911
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(See http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090831/086139.html)
llvm-svn: 80909
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llvm-svn: 80907
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with the new asmprinter.
llvm-svn: 80906
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different formatting from the old asmprinter, but it should be
semantically the same. We used to get:
popl %eax
addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$6.$piclabel], %eax
...
Now we get:
popl %eax
.Lpicbaseref6:
addl $(_GLOBAL_OFFSET_TABLE_ + (.Lpicbaseref6 - .Lllvm$6.$piclabel)), %eax
...
llvm-svn: 80905
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non-pic mode. rdar://7187172.
llvm-svn: 80904
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llvm-svn: 80903
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we can diff .s files.
llvm-svn: 80894
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llvm-svn: 80893
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llvm-svn: 80892
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and fix a few things using << on MCSymbols to use ->print(). No
functionality change other than unbreaking my previous patch.
llvm-svn: 80890
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llvm-svn: 80889
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llvm-svn: 80888
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simplifylibcalls optimization is thus valid for C++ but not C.
It's not important enough to worry about for C++ apps, so just
remove it.
rdar://7191924
llvm-svn: 80887
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all global variable operand flag processing stuff is shared between
different operand types.
llvm-svn: 80886
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llvm-svn: 80885
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from operand" logic. GlobalAddress still todo.
llvm-svn: 80884
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bunch more
olden programs working.
llvm-svn: 80881
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whether sse is available. Just use consult subtarget.
No functionality changes.
llvm-svn: 80880
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.align 3, 0x90
instead of,
.align 3, 144
suggested by eric.
llvm-svn: 80875
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llvm-svn: 80874
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avoid reloads by reusing clobbered registers.
This was causing issues in 256.bzip2 when compiled with PIC for
a while (starting at r78217), though the problem has since been masked.
llvm-svn: 80872
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buildbot's stage 2 configure
llvm-svn: 80871
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Use CallbackVH, instead of WeakVH, to hold MDNode elements.
Use FoldingSetNode to unique MDNodes in a context.
Use CallbackVH hooks to update context's MDNodeSet appropriately.
llvm-svn: 80868
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llvm-svn: 80867
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reliable.
llvm-svn: 80863
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this time. I'll back out if needed...
llvm-svn: 80858
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instruction tables to support segmented addressing (and other objects
of obscure type).
Modified the X86 assembly printers to handle these new operand types.
Added JMP and CALL instructions that use segmented addresses.
llvm-svn: 80857
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llvm-svn: 80855
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llvm-svn: 80841
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Use FoldingSetNode to unique MDNodes in a context.
Use CallbackVH hooks to update context's MDNodeSet appropriately.
llvm-svn: 80839
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llvm-svn: 80838
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