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* Simplify code. No functionality change.Benjamin Kramer2012-10-141-5/+3
| | | | llvm-svn: 165904
* Unquadratize SetVector removal loops in DSE.Benjamin Kramer2012-10-141-27/+36
| | | | | | | | | Erasing from the beginning or middle of the vector is expensive, remove_if can do it in linear time even though it's a bit ugly without lambdas. No functionality change. llvm-svn: 165903
* Remove dead methods.Bill Wendling2012-10-141-8/+0
| | | | llvm-svn: 165902
* Remove operator cast method in favor of querying with the correct method.Bill Wendling2012-10-145-22/+39
| | | | llvm-svn: 165899
* Fix use after free when deleting attributes in a chained folding set.Benjamin Kramer2012-10-141-3/+5
| | | | | | Can't follow the intrusive linked list when the element is gone. llvm-svn: 165898
* Don't use the new syntax just yet.Bill Wendling2012-10-141-2/+2
| | | | llvm-svn: 165897
* Remove the bitwise AND operators from the Attributes class. Replace it with ↵Bill Wendling2012-10-144-14/+9
| | | | | | the equivalent from the builder class. llvm-svn: 165896
* Remove the bitwise assignment OR operator from the Attributes class. Replace ↵Bill Wendling2012-10-147-24/+35
| | | | | | it with the equivalent from the builder class. llvm-svn: 165895
* Remove the bitwise OR operator from the Attributes class. Replace it with ↵Bill Wendling2012-10-141-7/+9
| | | | | | the equivalent from the builder class. llvm-svn: 165894
* Remove the bitwise XOR operator from the Attributes class. Replace it with ↵Bill Wendling2012-10-143-7/+6
| | | | | | the equivalent from the builder class. llvm-svn: 165893
* Remove the bitwise NOT operator from the Attributes class. Replace it with ↵Bill Wendling2012-10-146-19/+26
| | | | | | the equivalent from the builder class. llvm-svn: 165892
* Decode the LLVM attributes from bitcode using the attributes builder.Bill Wendling2012-10-141-0/+5
| | | | llvm-svn: 165891
* Use builder to create alignment attributes. Remove dead function.Bill Wendling2012-10-142-9/+12
| | | | llvm-svn: 165890
* Don't pass in an Attributes object to something that expects an integral value.Bill Wendling2012-10-141-3/+1
| | | | llvm-svn: 165887
* Remove unused private field.Benjamin Kramer2012-10-131-1/+0
| | | | llvm-svn: 165881
* X86: Disable long nops for all cpus prior to pentiumpro/i686.Benjamin Kramer2012-10-131-1/+3
| | | | llvm-svn: 165878
* Drop <def,dead> flags when merging into an unused lane.Jakob Stoklund Olesen2012-10-131-4/+9
| | | | | | | | | | | | The new coalescer can merge a dead def into an unused lane of an otherwise live vector register. Clear the <dead> flag when that happens since the flag refers to the full virtual register which is still live after the partial dead def. This fixes PR14079. llvm-svn: 165877
* instcombine: Migrate strchr and strrchr optimizationsMeador Inge2012-10-132-91/+86
| | | | | | | This patch migrates the strchr and strrchr optimizations from the simplify-libcalls pass into the instcombine library call simplifier. llvm-svn: 165875
* instcombine: Migrate strcat and strncat optimizationsMeador Inge2012-10-132-101/+107
| | | | | | | This patch migrates the strcat and strncat optimizations from the simplify-libcalls pass into the instcombine library call simplifier. llvm-svn: 165874
* Implement new LibCallSimplifier classMeador Inge2012-10-135-36/+299
| | | | | | | | | | | | | | | | This patch implements the new LibCallSimplifier class as outlined in [1]. In addition to providing the new base library simplification infrastructure, all the fortified library call simplifications were moved over to the new infrastructure. The rest of the library simplification optimizations will be moved over with follow up patches. NOTE: The original fortified library call simplifier located in the SimplifyFortifiedLibCalls class was not removed because it is still used by CodeGenPrepare. This class will eventually go away too. [1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-August/052283.html llvm-svn: 165873
* Allow for loops in LiveIntervals::pruneValue().Jakob Stoklund Olesen2012-10-131-29/+32
| | | | | | | | | | | | | | It is possible that the live range of the value being pruned loops back into the kill MBB where the search started. When that happens, make sure that the beginning of KillMBB is also pruned. Instead of starting a DFS at KillMBB and skipping the root of the search, start a DFS at each KillMBB successor, and allow the search to loop back to KillMBB. This fixes PR14078. llvm-svn: 165872
* X86: Fix accidentally swapped operands.Benjamin Kramer2012-10-131-1/+1
| | | | llvm-svn: 165871
* Teach SROA to cope with wrapper aggregates. These show up a lot in ABIChandler Carruth2012-10-131-3/+33
| | | | | | | | | | | | | | | | | | | | | | | type coercion code, especially when targetting ARM. Things like [1 x i32] instead of i32 are very common there. The goal of this logic is to ensure that when we are picking an alloca type, we look through such wrapper aggregates and across any zero-length aggregate elements to find the simplest type possible to form a type partition. This logic should (generally speaking) rarely fire. It only ends up kicking in when an alloca is accessed using two different types (for instance, i32 and float), and the underlying alloca type has wrapper aggregates around it. I noticed a significant amount of this occurring looking at stepanov_abstraction generated code for arm, and suspect it happens elsewhere as well. Note that this doesn't yet address truly heinous IR productions such as PR14059 is concerning. Those result in mismatched *sizes* of types in addition to mismatched access and alloca types. llvm-svn: 165870
* Speculatively harden the conversion logic. I have no idea if this willChandler Carruth2012-10-131-0/+11
| | | | | | | | | help the dragonegg builders, and no test case at this point, but this was one dimly plausible case I spotted by inspection. Hopefully will get a testcase from those bots soon-ish, and will tidy this up with proper testing. llvm-svn: 165869
* X86: Promote i8 cmov when both operands are coming from truncates of the ↵Benjamin Kramer2012-10-131-0/+15
| | | | | | | | | | | | | | same width. X86 doesn't have i8 cmovs so isel would emit a branch. Emitting branches at this level is often not a good idea because it's too late for many optimizations to kick in. This solution doesn't add any extensions (truncs are free) and tries to avoid introducing partial register stalls by filtering direct copyfromregs. I'm seeing a ~10% speedup on reading a random .png file with libpng15 via graphicsmagick on x86_64/westmere, but YMMV depending on the microarchitecture. llvm-svn: 165868
* Silence a warning in -assert builds.Chandler Carruth2012-10-131-0/+1
| | | | llvm-svn: 165867
* Clean up how we rewrite loads and stores to the whole alloca. When theseChandler Carruth2012-10-131-5/+49
| | | | | | | | | | | | are single value types, the load and store should be directly based upon the alloca and then bitcasting can fix the type as needed afterward. This might in theory improve some of the IR coming out of SROA, but I don't expect big changes yet and don't have any test cases on hand. This is really just a cleanup/refactoring patch. The next patch will cause this code path to be hit a lot more, actually get SROA to promote more allocas and include several more test cases. llvm-svn: 165864
* [ms-inline asm] Remove the MatchInstruction() function. Previously, this wasChad Rosier2012-10-135-46/+45
| | | | | | | | | | | the interface between the front-end and the MC layer when parsing inline assembly. Unfortunately, this is too deep into the parsing stack. Specifically, we're unable to handle target-independent assembly (i.e., assembly directives, labels, etc.). Note the MatchAndEmitInstruction() isn't the correct abstraction either. I'll be exposing target-independent hooks shortly, so this is really just a cleanup. llvm-svn: 165858
* Check section type rather than assuming it's code when emitting sections ↵Andrew Kaylor2012-10-121-1/+7
| | | | | | while processing relocations. llvm-svn: 165854
* ARM: tail-call inside a function where part of a byval argument is on caller'sManman Ren2012-10-121-0/+8
| | | | | | | | | | | | | | | | | | | | | local frame causes problem. For example: void f(StructToPass s) { g(&s, sizeof(s)); } will cause problem with tail-call since part of s is passed via registers and saved in f's local frame. When g tries to access s, part of s may be corrupted since f's local frame is popped out before the tail-call. The current fix is to disable tail-call if getVarArgsRegSaveSize is not 0 for the caller. This is a conservative approach, if we can prove the address of s or part of s is not taken and passed to g, it should be okay to perform tail-call. rdar://12442472 llvm-svn: 165853
* [ms-inline asm] Capitalize per coding standard.Chad Rosier2012-10-121-19/+19
| | | | llvm-svn: 165847
* ARM: Mark VSELECT as 'expand'.Jim Grosbach2012-10-121-0/+1
| | | | | | | | | | | | | The backend already pattern matches to form VBSL when it can. We may want to teach it to use the vbsl intrinsics at some point to prevent machine licm from mucking with this, but using the Expand is completely correct. http://llvm.org/bugs/show_bug.cgi?id=13831 http://llvm.org/bugs/show_bug.cgi?id=13961 Patch by Peter Couperus <peter.couperus@st.com>. llvm-svn: 165845
* [ms-inline asm] Use the new API introduced in r165830 in lieu of theChad Rosier2012-10-124-37/+18
| | | | | | MapAndConstraints vector. Also remove the unused Kind argument. llvm-svn: 165833
* Use a transposed algorithm for handleMove().Jakob Stoklund Olesen2012-10-121-427/+213
| | | | | | | | | | | | | Completely update one interval at a time instead of collecting live range fragments to be updated. This avoids building data structures, except for a single SmallPtrSet of updated intervals. Also share code between handleMove() and handleMoveIntoBundle(). Add support for moving dead defs across other live values in the interval. The MI scheduler can do that. llvm-svn: 165824
* Fix coalescing with IMPLICIT_DEF values.Jakob Stoklund Olesen2012-10-121-21/+54
| | | | | | | | | | | | | | | | PHIElimination inserts IMPLICIT_DEF instructions to guarantee that all PHI predecessors have a live-out value. These IMPLICIT_DEF values are not considered to be real interference when coalescing virtual registers: %vreg1 = IMPLICIT_DEF %vreg2 = MOV32r0 When joining %vreg1 and %vreg2, the IMPLICIT_DEF instruction and its value number should simply be erased since the %vreg2 value number now provides a live-out value for the PHI predecesor block. llvm-svn: 165813
* Fix big-endian codegen bug in DAGTypeLegalizer::ExpandRes_BITCASTUlrich Weigand2012-10-121-0/+4
| | | | | | | | | | | | | | | | | | | | | | On PowerPC, a bitcast of <16 x i8> to i128 may run through a code path in ExpandRes_BITCAST that attempts to do an intermediate bitcast to a <4 x i32> vector, and then construct the Hi and Lo parts of the resulting i128 by pairing up two of those i32 vector elements each. The code already recognizes that on a big-endian system, the first two vector elements form the Hi part, and the final two vector elements form the Lo part (vice-versa from the little-endian situation). However, we also need to take endianness into account when forming each of those separate pairs: on a big-endian system, vector element 0 is the *high* part of the pair making up the Hi part of the result, and vector element 1 is the low part of the pair. The code currently always uses vector element 0 as the low part and vector element 1 as the high part, as is appropriate for little-endian platforms only. This patch fixes this by swapping the vector elements as they are paired up as appropriate. llvm-svn: 165802
* Add powerpc-ibm-aix to Triple. Patch by Kai.Duncan Sands2012-10-121-0/+4
| | | | llvm-svn: 165792
* Indenting.Eric Christopher2012-10-121-11/+11
| | | | llvm-svn: 165785
* fix warningSebastian Pop2012-10-121-6/+6
| | | | | | | | | | | DependenceAnalysis.cpp:1164:32: warning: implicit truncation from 'int' to bitfield changes value from -5 to 3 [-Wconstant-conversion] Result.DV[Level].Direction &= ~Dependence::DVEntry::GT; ^ ~~~~~~~~~~~~~~~~~~~~~~~~ Patch from Preston Briggs <preston.briggs@gmail.com>. llvm-svn: 165784
* Div, Rem int/unsigned int Reed Kotler2012-10-122-8/+56
| | | | llvm-svn: 165783
* Legalizer optimize a pair of div / mod to a call to divrem libcall if they areEvan Cheng2012-10-121-0/+2
| | | | | | | | | | not legal. However, it should use a div instruction + mul + sub if divide is legal. The rem legalization code was missing a check and incorrectly uses a divrem libcall even when div is legal. rdar://12481395 llvm-svn: 165778
* Remove unnecessary classof()'sSean Silva2012-10-115-20/+0
| | | | | | | isa<> et al. automatically infer when the cast is an upcast (including a self-cast), so these are no longer necessary. llvm-svn: 165767
* Remove buggy classof().Sean Silva2012-10-111-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This classof() is effectively saying that a MachineCodeEmitter "is-a" JITEmitter, but JITEmitter is in fact a descendant of MachineCodeEmitter, so this is not semantically correct. Consequently, none of the assertions that rely on these classof() actualy check anything. Remove the RTTI (which didn't actually check anything) and use static_cast<> instead. Post-Mortem Bug Analysis ======================== Cause of the bug ---------------- r55022 appears to be the source of the classof() and assertions removed by this commit. It aimed at removing some dynamic_cast<> that were solely in the assertions. A typical diff hunk from that commit looked like: - assert(dynamic_cast<JITEmitter*>(MCE) && "Unexpected MCE?"); - JITEmitter *JE = static_cast<JITEmitter*>(getCodeEmitter()); + assert(isa<JITEmitter>(MCE) && "Unexpected MCE?"); + JITEmitter *JE = cast<JITEmitter>(getCodeEmitter()); Hence, the source of the bug then seems to be an attempt to replace dynamic_cast<> with LLVM-style RTTI without properly setting up the class hierarchy for LLVM-style RTTI. The bug therefore appears to be simply a "thinko". What initially indicated the presence of the bug ------------------------------------------------ After implementing automatic upcasting for isa<>, classof() functions of the form static bool classof(const Foo *) { return true; } were removed, since they only serve the purpose of optimizing statically-OK upcasts. A subsequent recompilation triggered a build failure on the isa<> tests within the removed asserts, since the automatic upcasting (correctly) failed to substitute this classof(). Key to pinning down the root cause of the bug --------------------------------------------- After being alerted to the presence of the bug, some thought about the semantics which were being asserted by the buggy classof() revealed that it was incorrect. How the bug could have been prevented ------------------------------------- This bug could have been prevented by better documentation for how to set up LLVM-style RTTI. This should be solved by the recently added documentation HowToSetUpLLVMStyleRTTI. However, this bug suggests that the documentation should clearly explain the contract that classof() must fulfill. The HowToSetUpLLVMStyleRTTI already explains this contract, but it is a little tucked away. A future patch will expand that explanation and make it more prominent. There does not appear to be a simple way to have the compiler prevent this bug, since fundamentally it boiled down to a spurious classof() where the programmer made an erroneous statement about the conversion. This suggests that perhaps the interface to LLVM-style RTTI of classof() is not the best. There is already some evidence for this, since in a number of places Clang has classof() forward to classofKind(Kind K) which evaluates the cast in terms of just the Kind. This could probably be generalized to simply a `static const Kind MyKind;` field in leaf classes and `static const Kind firstMyKind, lastMyKind;` for non-leaf classes, and have the rest of the work be done inside Casting.h, assuming that the Kind enum is laid out in a preorder traversal of the inheritance tree. llvm-svn: 165764
* PGO: create metadata for switch only if it has more than one targets.Manman Ren2012-10-111-1/+1
| | | | | | | When all cases of a switch statement are dead, the weights vector only has one element, and we will get an ssertion failure when calling createBranchWeights. llvm-svn: 165759
* Fix some typos 165739, spotted by Duncan.Jan Wen Voung2012-10-112-2/+2
| | | | llvm-svn: 165753
* Revert 165732 for further review.Micah Villmow2012-10-1135-142/+92
| | | | llvm-svn: 165747
* Change encoding of instruction operands in bitcode binaries to be relativeJan Wen Voung2012-10-113-90/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | to the instruction position. The old encoding would give an absolute ID which counts up within a function, and only resets at the next function. I.e., Instead of having: ... = icmp eq i32 n-1, n-2 br i1 ..., label %bb1, label %bb2 it will now be roughly: ... = icmp eq i32 1, 2 br i1 1, label %bb1, label %bb2 This makes it so that ids remain relatively small and can be encoded in fewer bits. With this encoding, forward reference operands will be given negative-valued IDs. Use signed VBRs for the most common case of forward references, which is phi instructions. To retain backward compatibility we bump the bitcode version from 0 to 1 to distinguish between the different encodings. llvm-svn: 165739
* Add in the first iteration of support for llvm/clang/lldb to allow variable ↵Micah Villmow2012-10-1135-92/+142
| | | | | | per address space pointer sizes to be optimized correctly. llvm-svn: 165726
* Pass an explicit operand number to addLiveIns.Jakob Stoklund Olesen2012-10-112-8/+8
| | | | | | | | | Not all instructions define a virtual register in their first operand. Specifically, INLINEASM has a different format. <rdar://problem/12472811> llvm-svn: 165721
* This patch addresses PR13947.Bill Schmidt2012-10-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | For function calls on the 64-bit PowerPC SVR4 target, each parameter is mapped to as many doublewords in the parameter save area as necessary to hold the parameter. The first 13 non-varargs floating-point values are passed in registers; any additional floating-point parameters are passed in the parameter save area. A single-precision floating-point parameter (32 bits) must be mapped to the second (rightmost, low-order) word of its assigned doubleword slot. Currently LLVM violates this ABI requirement by mapping such a parameter to the first (leftmost, high-order) word of its assigned doubleword slot. This is internally self-consistent but will not interoperate correctly with libraries compiled with an ABI-compliant compiler. This patch corrects the problem by adjusting the parameter addressing on both sides of the calling convention. llvm-svn: 165714
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