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* [LVI] Fix typo. NFCXin Tong2018-04-241-1/+1
| | | | llvm-svn: 330688
* [NFC] Use forgetTopmostLoop instead of logic duplicationMax Kazantsev2018-04-241-6/+2
| | | | llvm-svn: 330683
* [X86] Add a BSWAP16 instruction using the 32-bit encoding plus a 0x66 prefix.Craig Topper2018-04-241-2/+6
| | | | | | This encoding is recognized by the CPU, but the behavior is undefined. This makes the disassembler handle it correctly so we don't print bswapl with a 16-bit register. llvm-svn: 330682
* [PM/LoopUnswitch] Remove another over-aggressive assert.Chandler Carruth2018-04-241-4/+1
| | | | | | | | | | This code path can very clearly be called in a context where we have baselined all the cloned blocks to a particular loop and are trying to handle nested subloops. There is no harm in this, so just relax the assert. I've added a test case that will make sure we actually exercise this code path. llvm-svn: 330680
* Remove unused function HexagonEarlyIfConversion::replacePhiEdges. NFC.Eric Christopher2018-04-241-15/+0
| | | | llvm-svn: 330678
* [NFC] Add clarification commentMax Kazantsev2018-04-241-2/+4
| | | | llvm-svn: 330677
* Reflow formatting after previous NFC commit.Eric Christopher2018-04-241-6/+6
| | | | llvm-svn: 330676
* Change if-conditionals to else-if as they should all be mutually exclusive.Eric Christopher2018-04-241-3/+3
| | | | | | No functional change intended. llvm-svn: 330675
* InstCombine: Fix layering by not including Scalar.h in InstCombineDavid Blaikie2018-04-243-5/+7
| | | | | | | | (notionally Scalar.h is part of libLLVMScalarOpts, so it shouldn't be included by InstCombine which doesn't/shouldn't need to depend on ScalarOpts) llvm-svn: 330669
* [AggressiveInstCombine] Add aggressive inst combiner to the LLVM C API.Craig Topper2018-04-242-0/+8
| | | | | | I just tried to copy what was done for regular InstCombine. Hopefully I didn't miss anything. llvm-svn: 330668
* Reland r301880(!): "[InstSimplify] Handle selects of GEPs with 0 offset"George Burgess IV2018-04-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was reminded today that this patch got reverted in r301885. I can no longer reproduce the failure that caused the revert locally (...almost one year later), and the patch applied pretty cleanly, so I guess we'll see if the bots still get angry about it. The original breakage was InstSimplify complaining (in "assertion failed" form) about getting passed some crazy IR when running `ninja check-sanitizer`. I'm unable to find traces of what, exactly, said crazy IR was. I suppose we'll find out pretty soon if that's still the case. :) Original commit: Author: gbiv Date: Mon May 1 18:12:08 2017 New Revision: 301880 URL: http://llvm.org/viewvc/llvm-project?rev=301880&view=rev Log: [InstSimplify] Handle selects of GEPs with 0 offset In particular (since it wouldn't fit nicely in the summary): (select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V) Differential Revision: https://reviews.llvm.org/D31435 llvm-svn: 330667
* [HWASan] Use dynamic shadow memory on Android only (LLVM)Alex Shlyapnikov2018-04-241-4/+2
| | | | | | | | There're issues with IFUNC support on other platforms. DIfferential Revision: https://reviews.llvm.org/D45840 llvm-svn: 330665
* [AggressiveInstCombine] Add library initializer routine for ↵Craig Topper2018-04-241-0/+5
| | | | | | | | AggressiveInstCombine library. Use it in bugpoint and llvm-opt-fuzzer to match regular InstCombine. This should make aggressive instcombine usable with these tools. llvm-svn: 330663
* [X86] Remove unnecessary vector memory folded InstRW overrides.Simon Pilgrim2018-04-234-187/+4
| | | | | | We have test coverage for these with resources-sse*/avx* llvm-svn: 330662
* [LLVM-C] DIBuilder Bindings For Variable ExpressionsRobert Widmann2018-04-231-0/+66
| | | | | | | | | | | | | | Summary: Add DIBuilder bindings for (global) variable expressions, variable value expressions, and debug value intrinsic insertion. Reviewers: harlanhaskins, deadalnix, whitequark Reviewed By: whitequark Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45979 llvm-svn: 330661
* [X86] Remove unnecessary BMI2 InstRW overrides.Simon Pilgrim2018-04-233-30/+6
| | | | | | We have test coverage for these with resources-bmi2.s llvm-svn: 330659
* [LoopInterchange] Do not change LI for BBs in child loops.Florian Hahn2018-04-231-0/+3
| | | | | | | | | | | | | | If a loop with child loops becomes our new inner loop after interchanging, we only need to update LoopInfo for the blocks defined in the old outer loop. BBs in child loops will stay there. Reviewers: efriedma, karthikthecool, mcrosier Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D45970 llvm-svn: 330653
* [X86] Remove unnecessary WriteLEA InstRW overrides.Simon Pilgrim2018-04-235-16/+5
| | | | llvm-svn: 330648
* [DAGCombiner] Unfold scalar masked merge if profitableRoman Lebedev2018-04-231-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]]. [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly. Previously, `andl`+`andn`/`andps`+`andnps` / `bic`/`bsl` would be generated. (see `@out`) Now, they would no longer be generated (see `@in`). So we need to make sure that they are still generated. If the mask is constant, we do nothing. InstCombine should have unfolded it. Else, i use `hasAndNot()` TLI hook. For now, only handle scalars. https://rise4fun.com/Alive/bO6 ---- I *really* don't like the code i wrote in `DAGCombiner::unfoldMaskedMerge()`. It is super fragile. Is there something like IR Pattern Matchers for this? Reviewers: spatel, craig.topper, RKSimon, javed.absar Reviewed By: spatel Subscribers: andreadb, courbet, kristof.beyls, javed.absar, rengolin, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D45733 llvm-svn: 330646
* [CallSiteSplit] Make sure we remove nonnull if the parameter turns out to be ↵Xin Tong2018-04-231-1/+5
| | | | | | | | | | | | | | a constant. Summary: We do not need nonull attribute if we know an argument is going to be constant. Reviewers: junbuml, davide, fhahn Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45608 llvm-svn: 330641
* [X86] Revert r330638 - accidental commitGabor Buella2018-04-237-62/+2
| | | | llvm-svn: 330640
* [X86] movdiri and movdir64b instructionsGabor Buella2018-04-237-2/+62
| | | | | Reviewers: craig.topper llvm-svn: 330638
* [MemCpyOpt] Skip optimizing basic blocks not reachable from entryBjorn Pettersson2018-04-231-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Skip basic blocks not reachable from the entry node in MemCpyOptPass::iterateOnFunction. Code that is unreachable may have properties that do not exist for reachable code (an instruction in a basic block can for example be dominated by a later instruction in the same basic block, for example if there is a single block loop). MemCpyOptPass::processStore is only safe to use for reachable basic blocks, since it may iterate past the basic block beginning when used for unreachable blocks. By simply skipping to optimize unreachable basic blocks we can avoid asserts such as "Assertion `!NodePtr->isKnownSentinel()' failed." in MemCpyOptPass::processStore. The problem was detected by fuzz tests. Reviewers: eli.friedman, dneilson, efriedma Reviewed By: efriedma Subscribers: efriedma, llvm-commits Differential Revision: https://reviews.llvm.org/D45889 llvm-svn: 330635
* [WebAssembly] MC: Refactor section creation codeSam Clegg2018-04-231-17/+14
| | | | | | | | | Remove the use of default argument in favor of a separate startCustomSection method. Differential Revision: https://reviews.llvm.org/D45794 llvm-svn: 330632
* Reland r329956, "AArch64: Introduce a DAG combine for folding offsets into ↵Peter Collingbourne2018-04-232-15/+74
| | | | | | | | | | | | | | | | | | | | addresses.", with a fix for the bot failure. This reland includes a check to prevent the DAG combiner from folding an offset that is smaller than the existing one. This can cause oscillations between two possible DAGs, which was the cause of the hang and later assertion failure observed on the lnt-ctmark-aarch64-O3-flto bot. http://green.lab.llvm.org/green/job/lnt-ctmark-aarch64-O3-flto/2024/ Original commit message: > This is a code size win in code that takes offseted addresses > frequently, such as C++ constructors that typically need to compute > an offseted address of a vtable. This reduces the size of Chromium > for Android's .text section by 108KB. Differential Revision: https://reviews.llvm.org/D45199 llvm-svn: 330630
* [DSE] Teach the pass that atomic memory intrinsics are stores.Daniel Neilson2018-04-232-9/+32
| | | | | | | | | | | | | | | | | | | Summary: This change teaches DSE that the atomic memory intrinsics are stores that can be eliminated, and can allow other stores to be eliminated. This change specifically does not teach DSE that these intrinsics can be partially eliminated (i.e. length reduced, and dest/src changed); that will be handled in another change. Reviewers: mkazantsev, skatkov, apilipenko, efriedma, rsmith Reviewed By: efriedma Subscribers: dmgreen, llvm-commits Differential Revision: https://reviews.llvm.org/D45535 llvm-svn: 330629
* [HWASan] Switch back to fixed shadow mapping for x86-64Alex Shlyapnikov2018-04-231-1/+1
| | | | | | | | | | For now switch back to fixed shadow mapping for x86-64 due to the issues with IFUNC linking on older binutils. More details will be added to https://bugs.chromium.org/p/chromium/issues/detail?id=835864 Differential Revision: https://reviews.llvm.org/D45840 llvm-svn: 330623
* [SelectionDAG] Dump debug locs in SDNodesVedant Kumar2018-04-231-0/+4
| | | | | | | | | This helps debug issues where selection-dag assigns the wrong location to an instruction. Differential Revision: https://reviews.llvm.org/D45913 llvm-svn: 330618
* Fix -Wtautological-compare warning with npos on WindowsReid Kleckner2018-04-231-2/+1
| | | | llvm-svn: 330614
* AMDGPU: Move a flawed assert when spilling SGPRsMatt Arsenault2018-04-232-4/+4
| | | | | | | | It's possible to validly spill the frame offset register in a call sequence to a VGPR. There are definitely issues with SGPR spilling to memory, so move the assert later. llvm-svn: 330612
* [X86] Replace x87 instregex with instrs if they only match one instructionSimon Pilgrim2018-04-236-43/+37
| | | | llvm-svn: 330611
* Fix computeSymbolSizes SEGFAULT on invalid fileAdrian Prantl2018-04-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | We use llvm-symbolizer in some production systems, and we run it against all possibly related files, including some that are not ELF. We noticed that for some of those invalid files, llvm-symbolizer would crash with SEGFAULT. Here is an example of such a file. It is due to that in computeSymbolSizes, a loop uses condition for (unsigned I = 0, N = Addresses.size() - 1; I < N; ++I) { where if Addresses.size() is 0, N would overflow and causing the loop to access invalid memory. Instead of patching the loop conditions, the commit makes so that the function returns early if Addresses is empty. Validated by checking that llvm-symbolizer no longer crashes. Patch by Teng Qin! Differential Revision: https://reviews.llvm.org/D44285 llvm-svn: 330610
* AMDGPU: Assign enum name to stack IDMatt Arsenault2018-04-233-2/+10
| | | | | | | | | Also assert that it is correct for SGPRs. There is currently a bug where stack slot coloring replaces SGPR spill FIs with one with the default ID, which results in a more confusing assert later about a dead object. llvm-svn: 330607
* StackSlotColoring: Fix missing skipFunction checkMatt Arsenault2018-04-231-0/+3
| | | | llvm-svn: 330606
* [SelectionDAG] Refactor lowering of atomic memory intrinsics.Daniel Neilson2018-04-232-91/+150
| | | | | | | | | | | Summary: This just refactors the lowering of the atomic memory intrinsics to more closely match the code patterns used in the lowering of the non-atomic memory intrinsics. Specifically, we encapsulate the lowering in SelectionDAG::getAtomicMem*() functions rather than embedding the code directly in the SelectionDAGBuilder code. llvm-svn: 330603
* [LLVM-C] DIBuilderBindings for Subrange and ArraysRobert Widmann2018-04-231-0/+19
| | | | | | | | | | | | | | Summary: Move Go bindings for subranges and DINode arrays. Reviewers: harlanhaskins, whitequark, deadalnix Reviewed By: whitequark Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45933 llvm-svn: 330594
* [LLVM-C] Finish Up Scope BindingsRobert Widmann2018-04-231-0/+33
| | | | | | | | | | | | | | Summary: Adds bindings for Module and NameSpace scopes and LLVMDIBuilderCreateForwardDecl, a counterpart to LLVMDIBuilderCreateReplaceableCompositeType. Reviewers: harlanhaskins, whitequark, deadalnix Reviewed By: whitequark Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45934 llvm-svn: 330591
* [X86] Remove instregex matching from CLAC/STAC.Simon Pilgrim2018-04-232-8/+4
| | | | | | Note - noticed this as the STAC case as it was unintentionally matching against *STACK* pseudo instructions. llvm-svn: 330588
* List cpp file only once (was added in 147117 and 147117 as build fix each).Nico Weber2018-04-231-1/+0
| | | | llvm-svn: 330587
* AMDGPU: Fix SDWA peephole for V_AND_B32Nicolai Haehnle2018-04-231-1/+1
| | | | | | | | | | | | | | | | | | | Summary: Found by inspection. We care about the operand that *doesn't* contain the immediate. I believe this is currently not hit because we fold 0xff / 0xffff immediates only later. Change-Id: Ic3cf8538bc7da5eff3200d96eccf9d339e6345a7 Reviewers: arsenm, rampitec Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D45886 llvm-svn: 330586
* AMDGPU: Fix a corner case crash in SIOptimizeExecMaskingNicolai Haehnle2018-04-231-1/+1
| | | | | | | | | | | | | | | | Summary: See the new test case; this is really unlikely to happen with real code, but I ran into this while attempting to bugpoint-reduce a different issue. Change-Id: I9ade1dc1aa8fd9c4d9fc83661d7b80e310b5c4a6 Reviewers: arsenm, rampitec Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D45885 llvm-svn: 330585
* Consistently sort add_subdirectory calls in lib/Target/*/CMakeLists.txtNico Weber2018-04-2314-24/+23
| | | | llvm-svn: 330584
* [AArch64][SVE] Asm: Support for contiguous, non-faulting LDNF1 (scalar+imm) ↵Sander de Smalen2018-04-232-0/+22
| | | | | | | | | | | | | | load instructions Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro Reviewed By: rengolin Subscribers: tschuett, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45684 llvm-svn: 330583
* [LoopRotate] Fix incorrect SCEV invalidation in loop rotationMax Kazantsev2018-04-231-2/+9
| | | | | | | | | | | LoopRotate only invalidates innermost loops while the changes that it makes may also affert any of this parents. With patch rL329047, SCEV becomes much smarter about calculation of exit counts for outer loops, so we cannot assume that they are not affected. Differential Revision: https://reviews.llvm.org/D45945 llvm-svn: 330582
* [X86] Remove unnecessary MMX reg-mem InstRW scheduler overrides.Simon Pilgrim2018-04-236-122/+9
| | | | llvm-svn: 330581
* [LoopUnroll] Fix potentially incorrect SCEV invalidation in UnrollRuntimeMax Kazantsev2018-04-231-4/+3
| | | | | | | | | | | | | | | | | Current runtime unrolling invalidates parent loop saying that it might have changed after the inner loop has changed, but it doesn't bother to do the same to its parents. With patch rL329047, SCEV becomes much smarter about calculation of exit counts for outer loops. We might need to invalidate not only the immediate parent, but also any of its parents as well. There is no clear evidence that there is some miscompile happening because of this (at least I don't have such test), but the common sense says that the current code is wrong. Differential Revision: https://reviews.llvm.org/D45940 Reviewed By: chandlerc llvm-svn: 330577
* [LoopSimplify] Fix incorrect SCEV invalidationMax Kazantsev2018-04-232-11/+18
| | | | | | | | | | | | | | | | | | | | | | | | | In the function `simplifyOneLoop` we optimistically assume that changes in the inner loop only affect this very loop and have no impact on its parents. In fact, after rL329047 has been merged, we can now calculate exit counts for outer loops which may depend on inner loops. Thus, we need to invalidate all parents when we do something to a loop. There is an evidence of incorrect behavior of `simplifyOneLoop`: when we insert `SE->verify()` check in the end of this funciton, it fails on a bunch of existing test, in particular: LLVM :: Transforms/LoopUnroll/peel-loop-not-forced.ll LLVM :: Transforms/LoopUnroll/peel-loop-pgo.ll LLVM :: Transforms/LoopUnroll/peel-loop.ll LLVM :: Transforms/LoopUnroll/peel-loop2.ll Note that previously we have fixed issues of this variety, see rL328483. This patch makes this function invalidate the outermost loop properly. Differential Revision: https://reviews.llvm.org/D45937 Reviewed By: chandlerc llvm-svn: 330576
* [AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+imm) ↵Sander de Smalen2018-04-232-0/+45
| | | | | | | | | | | | | | store instructions. Reviewers: fhahn, rengolin, javed.absar, SjoerdMeijer, t.p.northover, echristo, evandro, huntergr Reviewed By: rengolin Subscribers: tschuett, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45681 llvm-svn: 330565
* [PM/LoopUnswitch] Remove a buggy assert in the new loop unswitch.Chandler Carruth2018-04-231-6/+5
| | | | | | | | The condition this was asserting doesn't actually hold. I've added comments to explain why, removed the assert, and added a fun test case reduced out of 403.gcc. llvm-svn: 330564
* [X86] Add VEX_WIG to VEX encoded version of VCMPPSY/VCMPPDY.Craig Topper2018-04-231-2/+2
| | | | llvm-svn: 330563
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