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* [InstCombine] add xor+not foldsSanjay Patel2018-09-061-0/+16
| | | | | | | | | | This fold is needed to avoid a regression when we try to recommit rL300977. We can't see the most basic win currently because demanded bits changes the patterns: https://rise4fun.com/Alive/plpp llvm-svn: 341559
* ARM64: improve non-zero memset isel by ~2xJF Bastien2018-09-061-17/+20
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: I added a few ARM64 memset codegen tests in r341406 and r341493, and annotated where the generated code was bad. This patch fixes the majority of the issues by requesting that a 2xi64 vector be used for memset of 32 bytes and above. The patch leaves the former request for f128 unchanged, despite f128 materialization being suboptimal: doing otherwise runs into other asserts in isel and makes this patch too broad. This patch hides the issue that was present in bzero_40_stack and bzero_72_stack because the code now generates in a better order which doesn't have the store offset issue. I'm not aware of that issue appearing elsewhere at the moment. <rdar://problem/44157755> Reviewers: t.p.northover, MatzeB, javed.absar Subscribers: eraman, kristof.beyls, chrib, dexonsmith, llvm-commits Differential Revision: https://reviews.llvm.org/D51706 llvm-svn: 341558
* Remove unnecessary semicolon to silence -Wpedantic warning. NFCI.Simon Pilgrim2018-09-061-1/+1
| | | | llvm-svn: 341555
* [MSan] store origins for variadic function parameters in ↵Alexander Potapenko2018-09-061-4/+61
| | | | | | | | | | | | | | | | | __msan_va_arg_origin_tls Add the __msan_va_arg_origin_tls TLS array to keep the origins for variadic function parameters. Change the instrumentation pass to store parameter origins in this array. This is a reland of r341528. test/msan/vararg.cc doesn't work on Mips, PPC and AArch64 (because this patch doesn't touch them), XFAIL these arches. Also turned out Clang crashed on i80 vararg arguments because of incorrect origin type returned by getOriginPtrForVAArgument() - fixed it and added a test. llvm-svn: 341554
* [InstCombine] fix formatting in SimplifyDemandedVectorElts->Select; NFCISanjay Patel2018-09-061-12/+16
| | | | | | | | I'm preparing to add the same functionality both here and to the DAG version of this code in D51696 / D51433, so try to make those cases as similar as possible to avoid bugs. llvm-svn: 341545
* [MSan] revert r341528 to unbreak the botsAlexander Potapenko2018-09-061-61/+4
| | | | llvm-svn: 341541
* [LoopInterchange] Cleanup unused variables.Florian Hahn2018-09-061-8/+2
| | | | llvm-svn: 341537
* Fix argument type in MachineInstr::hasPropertyInBundleSven van Haastregt2018-09-061-1/+1
| | | | | | | | | | | | | The MCID::Flag enumeration now has more than 32 items, this means that the hasPropertyBundle argument 'Mask' can overflow. This patch changes the argument to be 64 bits instead. Patch by Mikael Nilsson. Differential Revision: https://reviews.llvm.org/D51596 llvm-svn: 341536
* [LoopInterchange] Move preheader creation to transform stage and simplify.Florian Hahn2018-09-061-25/+18
| | | | | | | | | | | | | | | | | | | There is no need to create preheaders in the analysis stage, we only need them when adjusting the branches. Also, the only cases we need to create our own preheaders is when they have more than 1 predecessors or PHI nodes (even with only 1 predecessor, we could have an LCSSA phi node). I have simplified the conditions and added some assertions to be sure. Because we know the inner and outer loop need to be tightly nested, it is sufficient to check if the inner loop preheader is the outer loop header to check if we need to create a new preheader. Reviewers: efriedma, mcrosier, karthikthecool Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D51703 llvm-svn: 341533
* [NFC] Simplify inner structure of InstructionPrecedenceTrackingMax Kazantsev2018-09-061-32/+17
| | | | | | | | | | | | | | Currently it has a set KnownBlocks that marks blocks as having cached answers and a map FirstSpecialInsts that maps these blocks to first special instructions in them. The value in the map is always non-null, and for blocks that are known to have no special instructions the map does not have an instance. This patch removes KnownBlocks as obsolete. Instead, for blocks that are known to have no special instructions, we just put a nullptr value. This makes the code much easier to read. llvm-svn: 341531
* [MSan] store origins for variadic function parameters in ↵Alexander Potapenko2018-09-061-4/+61
| | | | | | | | | | __msan_va_arg_origin_tls Add the __msan_va_arg_origin_tls TLS array to keep the origins for variadic function parameters. Change the instrumentation pass to store parameter origins in this array. llvm-svn: 341528
* [SLC] Add an alignment to CreateGlobalStringDavid Green2018-09-061-0/+1
| | | | | | | | | | | | | | | | Previously the alignment on the newly created global strings was not set, meaning that DataLayout::getPreferredAlignment was free to overalign it to 16 bytes. This caused unnecessary code bloat with the padding between variables. The main example of this happening was the printf->puts optimisation in SimplifyLibCalls, but as the change here is made in IRBuilderBase::CreateGlobalString, other globals using this will now be aligned too. Differential Revision: https://reviews.llvm.org/D51410 llvm-svn: 341527
* Return "[NFC] Add severe validation of InstructionPrecedenceTracking"Max Kazantsev2018-09-061-0/+60
| | | | | | | | | | This validation patch has been reverted as rL341147 because of conserns raised by @reames. This revision returns it as is to raise a discussion and address the concerns. Differential Revision: https://reviews.llvm.org/D51523 Reviewed By: reames llvm-svn: 341526
* [MSan] Make sure variadic function arguments do not overflow __msan_va_arg_tlsAlexander Potapenko2018-09-061-23/+50
| | | | | | | | | | | | Turns out that calling a variadic function with too many (e.g. >100 i64's) arguments overflows __msan_va_arg_tls, which leads to smashing other TLS data with function argument shadow values. getShadow() already checks for kParamTLSSize and returns clean shadow if the argument does not fit, so just skip storing argument shadow for such arguments. llvm-svn: 341525
* [XRay] Add a BlockIndexer visitor for FDR Records.Dean Michael Berris2018-09-062-0/+98
| | | | | | | | | | | | | | | | | | | | | | | Summary: This change adds a `BlockIndexer` type which maintains pointers to records that belong to the same process+thread pairs. The indexing happens with order of appearance of records as they are visited. This version of the indexer currently only supports FDR version 3 logs, which contain `BufferExtent` records. We will add support for v2 and v1 logs in follow-up patches. This is another part of D50441. Reviewers: eizan, kpw, mboerger Reviewed By: mboerger Subscribers: mboerger, mgorny, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D51673 llvm-svn: 341518
* Revert "[IndVars] Turn isValidRewrite into an assertion" because it seems wrongMax Kazantsev2018-09-061-8/+9
| | | | llvm-svn: 341517
* [IndVars] Turn isValidRewrite into an assertionMax Kazantsev2018-09-061-9/+8
| | | | | | | | | | | | | | | Function rewriteLoopExitValues contains a check on isValidRewrite which is needed to make sure that SCEV does not convert the pattern `gep Base, (&p[n] - &p[0])` into `gep &p[n], Base - &p[0]`. This problem has been fixed in SCEV long ago, so this check is just obsolete. This patch converts it into an assertion to make sure that the SCEV will not mess up this case in the future. Differential Revision: https://reviews.llvm.org/D51582 Reviewed By: atrick llvm-svn: 341516
* [DebugInfo] Do not generate label debug info if it has been processed.Hsiangkai Wang2018-09-067-63/+69
| | | | | | | | In DwarfDebug::collectEntityInfo(), if the label entity is processed in DbgLabels list, it means the label is not optimized out. There is no need to generate debug info for it with null position. llvm-svn: 341513
* [X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.Craig Topper2018-09-061-2/+2
| | | | | | | | | | This basically reverts a change made in r336217, but improves the text of the error message for not allowing IP-relative addressing in 32-bit mode. Fixes PR38826. Patch by Iain Sandoe. llvm-svn: 341512
* Fix some warnings.Zachary Turner2018-09-062-3/+3
| | | | llvm-svn: 341508
* Fix silly error in unittest helper.Zachary Turner2018-09-051-1/+1
| | | | llvm-svn: 341505
* NFC: improve ARM64 isFPImmLegal debug printJF Bastien2018-09-051-19/+8
| | | | | | | Forking this change from D51706. This just made it easier to understand llc output with -debug. llvm-svn: 341504
* [PDB] Refactor the PDB symbol classes to fix a reuse bug.Zachary Turner2018-09-0541-251/+95
| | | | | | | | | | | | | | | | | | | | The way DIA SDK works is that when you request a symbol, it gets assigned an internal identifier that is unique for the life of the session. You can then use this identifier to get back the same symbol, with all of the same internal state that it had before, even if you "destroyed" the original copy of the object you had. This didn't work properly in our native implementation, and if you destroyed an object for a particular symbol, then requested the same symbol again, it would get assigned a new ID and you'd get a fresh copy of the object. In order to fix this some refactoring had to happen to properly reuse cached objects. Some unittests are added to verify that symbol reuse is taking place, making use of the new unittest input feature. llvm-svn: 341503
* Add support for unittest inputs.Zachary Turner2018-09-052-0/+37
| | | | | | | | | | | | | | | | | | | | | Occasionally it is useful to have unittest which take inputs. While we normally try to have this test be more of a lit test we occasionally don't have tools that can exercise the code in the right way to test certain things. LLDB has been using this style of unit test for a while, particularly with regards to how it tests core dump and minidump file parsing. Recently i needed this as well for the case where we want to test that some of the PDB reading code works correctly. It needs to exercise the code in a way that is not covered by any dumper and would be impractical to implement in one of the dumpers, but requires a valid PDB file. Since this is now needed by more than one project, it makes sense to have this be a generally supported thing that unit tests can do, and we just encourage people to use this sparingly. Differential Revision: https://reviews.llvm.org/D51561 llvm-svn: 341502
* Handle zero-length debug directory entries.Nico Weber2018-09-051-4/+6
| | | | | | Part of https://reviews.llvm.org/D51652 (tests will be in the lld repo) llvm-svn: 341485
* [DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x))Sanjay Patel2018-09-051-0/+41
| | | | | | | | | | | | | | | | | | | | | This was proposed as an IR transform in D49306, but it was not clearly justifiable as a canonicalization. Here, we only do the transform when the target tells us that sqrt can be lowered with inline code. This is the basic case. Some potential enhancements are in the TODO comments: 1. Generalize the transform for other exponents (allow more than 2 sqrt calcs if that's really cheaper). 2. If we have less fast-math-flags, generate code to avoid -0.0 and/or INF. 3. Allow the transform when optimizing/minimizing size (might require a target hook to get that right). Note that by default, x86 converts single-precision sqrt calcs into sqrt reciprocal estimate with refinement. That codegen is controlled by CPU attributes and can be manually overridden. We have plenty of test coverage for that already, so I didn't bother to include extra testing for that here. AArch uses its full-precision ops in all cases (not sure if that's the intended behavior or not, but that should also be covered by existing tests). Differential Revision: https://reviews.llvm.org/D51630 llvm-svn: 341481
* [Hexagon] Ignore unnamed globals in HexagonConstExtendersKrzysztof Parzyszek2018-09-051-15/+8
| | | | | | | | | This replaces r337723. The global list in the module can be huge with LTO, plus the module can change between different invocations of the pass, so there is no easy way to deterministically cache the ordering (especially in the presence of multiple threads). llvm-svn: 341478
* [ControlHeightReduction] Remove unused includesBenjamin Kramer2018-09-051-5/+5
| | | | | | Also clang-format them. llvm-svn: 341468
* [Aggressive InstCombine] Move C bindings to their own header file.Benjamin Kramer2018-09-051-1/+1
| | | | llvm-svn: 341461
* [DebugInfo] Normalize common kinds of DWARF sub-expressions.Jonas Devlieghere2018-09-052-8/+21
| | | | | | | | | | | | Normalize common kinds of DWARF sub-expressions to make debug info encoding a bit more compact: DW_OP_constu [X < 32] -> DW_OP_litX DW_OP_constu [all ones] -> DW_OP_lit0, DW_OP_not (64-bit only) Differential revision: https://reviews.llvm.org/D51640 llvm-svn: 341457
* Remove FrameAccess struct from hasLoadFromStackSlotSander de Smalen2018-09-059-50/+58
| | | | | | | | | | | | | | This removes the FrameAccess struct that was added to the interface in D51537, since the PseudoValue from the MachineMemoryOperand can be safely casted to a FixedStackPseudoSourceValue. Reviewers: MatzeB, thegameg, javed.absar Reviewed By: thegameg Differential Revision: https://reviews.llvm.org/D51617 llvm-svn: 341454
* [XRay] Add a RecordPrinter visitor for FDR RecordsDean Michael Berris2018-09-052-0/+90
| | | | | | | | | | | | | | | | | Summary: This change adds a `RecordPrinter` type which does some basic text serialization of the FDR record instances. This is one component of the tool we're building to dump the records from an FDR mode log as-is. This is a small part of D50441. Reviewers: eizan, kpw Subscribers: mgorny, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D51672 llvm-svn: 341447
* [DebugInfo] Fix bug in LiveDebugVariables.Hsiangkai Wang2018-09-051-5/+10
| | | | | | | | | | | | | | | In lib/CodeGen/LiveDebugVariables.cpp, it uses std::prev(MBBI) to get DebugValue's SlotIndex. However, the previous instruction may be also a debug instruction. It could not use a debug instruction to query SlotIndex in mi2iMap. Scan all debug instructions and use the first debug instruction to query SlotIndex for following debug instructions. Only handle DBG_VALUE in handleDebugValue(). Differential Revision: https://reviews.llvm.org/D50621 llvm-svn: 341446
* Prevent unsigned overflow.Richard Trieu2018-09-051-7/+9
| | | | | | | | | | The sum of the weights is caculated in an APInt, which has a width smaller than 64. In certain cases, the sum of the widths would overflow when calculations are done inside an APInt, but would not if done with uint64_t. Since the values will be passed as uint64_t in the function call anyways, do all the math in 64 bits. Also added an assert in case the probabilities overflow 64 bits. llvm-svn: 341444
* Fix -Wunused-function in release build after rL341386Fangrui Song2018-09-051-7/+10
| | | | llvm-svn: 341443
* [WebAssembly] clang-format (NFC)Heejin Ahn2018-09-0542-632/+734
| | | | | | | | | | | | Summary: This patch runs clang-format on all wasm-only files. Reviewers: aardappel, dschuff, sunfish, tlively Subscribers: MatzeB, sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D51447 llvm-svn: 341439
* [Windows] Convert from UTF-8 to UTF-16 when writing to a Windows consoleReid Kleckner2018-09-053-25/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Calling WriteConsoleW is the most reliable way to print Unicode characters to a Windows console. If binary data gets printed to the console, attempting to re-encode it shouldn't be a problem, since garbage in can produce garbage out. This breaks printing strings in the local codepage, which WriteConsoleA knows how to handle. For example, this can happen when user source code is encoded with the local codepage, and an LLVM tool quotes it while emitting a caret diagnostic. This is unfortunate, but well-behaved tools should validate that their input is UTF-8 and escape non-UTF-8 characters before sending them to raw_fd_ostream. Clang already does this, but not all LLVM tools do this. One drawback to the current implementation is printing a string a byte at a time doesn't work. Consider this LLVM code: for (char C : MyStr) outs() << C; Because outs() is now unbuffered, we wil try to convert each byte to UTF-16, which will fail. However, this already didn't work, so I think we may as well update callers that do that as we find them to print complete portions of strings. You can see a real example of this in my patch to SourceMgr.cpp Fixes PR38669 and PR36267. Reviewers: zturner, efriedma Subscribers: llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D51558 llvm-svn: 341433
* [InstCombine] fix xor-or-xor fold to check uses and handle commutesSanjay Patel2018-09-041-32/+21
| | | | | | | | | | | | I'm probably missing some way to use m_Deferred to remove the code duplication, but that can be a follow-up. The improvement in demand_shrink_nsw.ll is an example of missing the fold because the pattern matching was deficient. I didn't try to follow the bits in that test, but Alive says it's correct: https://rise4fun.com/Alive/ugc llvm-svn: 341426
* [WebAssembly] Fixed stale assert message in WebAssemblyMCInstLowerWouter van Oortmerssen2018-09-041-1/+1
| | | | llvm-svn: 341423
* [ThinLTO] Fix memory corruption in ThinLTOCodeGenerator when CodeGenOnly was ↵Steven Wu2018-09-041-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specified Summary: Issue occurs when doing ThinLTO with CodeGenOnly flag. TMBuilder.TheTriple is assigned to by multiple threads in an unsafe way resulting in double-free of std::string memory. Pseudocode: if (CodeGenOnly) { // Perform only parallel codegen and return. ThreadPool Pool; int count = 0; for (auto &ModuleBuffer : Modules) { Pool.async([&](int count) { ... /// Now call OutputBuffer = codegen(*TheModule); /// Which turns into initTMBuilder(moduleTMBuilder, Triple(TheModule.getTargetTriple())); /// Which turns into TMBuilder.TheTriple = std::move(TheTriple); // std::string = "....." /// So, basically std::string assignment to same string on multiple threads = memory corruption } return; } Patch by Alex Borcan Reviewers: llvm-commits, steven_wu Reviewed By: steven_wu Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits Differential Revision: https://reviews.llvm.org/D51651 llvm-svn: 341422
* Revert "Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions"Zhaoshi Zheng2018-09-041-37/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reland r341269. Use std::stable_sort when sorting constant condidates. Reverting commit, r341365: Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions One of the tests is failing 50% of the time when expensive checks are enabled. Not sure how deep the problem is so just reverting while the author can investigate so that the bots stop repeatedly failing and blaming things incorrectly. Will respond with details on the original commit. Original commit, r341269: [Constant Hoisting] Hoisting Constant GEP Expressions Leverage existing logic in constant hoisting pass to transform constant GEP expressions sharing the same base global variable. Multi-dimensional GEPs are rewritten into single-dimensional GEPs. https://reviews.llvm.org/D51396 Differential Revision: https://reviews.llvm.org/D51654 llvm-svn: 341417
* [LV] First order recurrence phis should not be treated as uniformAnna Thomas2018-09-041-0/+5
| | | | | | | | | | | | | | This is fix for PR38786. First order recurrence phis were incorrectly treated as uniform, which caused them to be vectorized as uniform instructions. Patch by Ayal Zaks and Orivej Desh! Reviewed by: Anna Differential Revision: https://reviews.llvm.org/D51639 llvm-svn: 341416
* [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructionsScott Linder2018-09-043-67/+232
| | | | | | | | | Emit a waterfall loop in the general case for a potentially-divergent Rsrc operand. When practical, avoid this by using Addr64 instructions. Differential Revision: https://reviews.llvm.org/D50982 llvm-svn: 341413
* Fix a memory leak after rL341386.Hiroshi Yamauchi2018-09-041-1/+1
| | | | | | | | | | | | Reviewers: davidxl Reviewed By: davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D51658 llvm-svn: 341412
* [WebAssembly][NFC] Fix formatting and testsThomas Lively2018-09-041-1/+1
| | | | | | | | | | | | Summary: Small fixes Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51656 llvm-svn: 341411
* [InstCombine] make ((X & C) ^ C) form consistent for vectorsSanjay Patel2018-09-041-4/+2
| | | | | | It would be better to create a 'not' here, but that's not possible yet. llvm-svn: 341410
* [Hexagon] Don't packetize new-value stores with any other storesKrzysztof Parzyszek2018-09-041-0/+7
| | | | llvm-svn: 341409
* [NFC] Improve clarity in emitInstrCountChangedRemarkJessica Paquette2018-09-041-1/+4
| | | | | | | | | Add a "CouldOnlyImpactOneFunction" bool that's true when we pass in a function. Just cleaning up a little bit, since I'm going to add in the per-function remarks soon from D51467. llvm-svn: 341407
* [InstCombine] simplify code for xor folds; NFCISanjay Patel2018-09-041-40/+23
| | | | | | | | | This is just a cleanup step. The TODO comments show what is wrong with the 'and' version of the fold. Fixing this should be part of recommitting: rL300977 llvm-svn: 341405
* [MinGW] Move code for indicating "potentially not DSO local" into ↵Martin Storsjo2018-09-044-25/+25
| | | | | | | | | | | | | | | shouldAssumeDSOLocal. NFC. On Windows, if shouldAssumeDSOLocal returns false, it's either a dllimport reference, or a reference that we should treat as non-local and create a stub for. Clean up AArch64Subtarget::ClassifyGlobalReference a little while touching the flag handling relating to dllimport. Differential Revision: https://reviews.llvm.org/D51590 llvm-svn: 341402
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