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* Whitespace cleanups.Dan Gohman2009-12-181-12/+12
| | | | llvm-svn: 91651
* Handle ARM inline asm "w" constraints with 64-bit ("d") registers.Bob Wilson2009-12-182-3/+3
| | | | | | | | The change in SelectionDAGBuilder is needed to allow using bitcasts to convert between f64 (the default type for ARM "d" registers) and 64-bit Neon vector types. Radar 7457110. llvm-svn: 91649
* Don't pass const pointers by reference.Dan Gohman2009-12-181-13/+13
| | | | llvm-svn: 91647
* Update a comment.Dan Gohman2009-12-181-1/+1
| | | | llvm-svn: 91645
* Pass the error string directly to llvm_unreachable instead of the residualJohn McCall2009-12-181-1/+1
| | | | | | | | | (0 && "error"). Rough consensus seems to be that g++ *should* be diagnosing this because the pointer makes it not an ICE in c++03. Everyone agrees that the current standard is silly and null-pointer-ness should not be based on ICE-ness. Excellent fight scene in Act II, denouement weak, two stars. llvm-svn: 91644
* Reapply LoopStrengthReduce and IVUsers cleanups, excluding the partDan Gohman2009-12-182-71/+32
| | | | | | | | of 91296 that caused trouble -- the Processed list needs to be preserved for the livetime of the pass, as AddUsersIfInteresting is called from other passes. llvm-svn: 91641
* Instruction fixes, added instructions, and AsmString changes in theSean Callanan2009-12-189-423/+1236
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | X86 instruction tables. Also (while I was at it) cleaned up the X86 tables, removing tabs and 80-line violations. This patch was reviewed by Chris Lattner, but please let me know if there are any problems. * X86*.td Removed tabs and fixed 80-line violations * X86Instr64bit.td (IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW) Added (CALL, CMOV) Added qualifiers (JMP) Added PC-relative jump instruction (POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate that it is 64-bit only (ambiguous since it has no REX prefix) (MOV) Added rr form going the other way, which is encoded differently (MOV) Changed immediates to offsets, which is more correct; also fixed MOV64o64a to have to a 64-bit offset (MOV) Fixed qualifiers (MOV) Added debug-register and condition-register moves (MOVZX) Added more forms (ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which (as with MOV) are encoded differently (ROL) Made REX.W required (BT) Uncommented mr form for disassembly only (CVT__2__) Added several missing non-intrinsic forms (LXADD, XCHG) Reordered operands to make more sense for MRMSrcMem (XCHG) Added register-to-register forms (XADD, CMPXCHG, XCHG) Added non-locked forms * X86InstrSSE.td (CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ) Added * X86InstrFPStack.td (COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP, FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X, FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM, FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE, FXRSTOR) Added (FCOM, FCOMP) Added qualifiers (FSTENV, FSAVE, FSTSW) Fixed opcode names (FNSTSW) Added implicit register operand * X86InstrInfo.td (opaque512mem) Added for FXSAVE/FXRSTOR (offset8, offset16, offset32, offset64) Added for MOV (NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR, LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS, LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT, LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC, CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC, SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL, VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD, VMWRITE, VMXOFF, VMXON) Added (NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier (JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL, JGE, JLE, JG, JCXZ) Added 32-bit forms (MOV) Changed some immediate forms to offset forms (MOV) Added reversed reg-reg forms, which are encoded differently (MOV) Added debug-register and condition-register moves (CMOV) Added qualifiers (AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV (BT) Uncommented memory-register forms for disassembler (MOVSX, MOVZX) Added forms (XCHG, LXADD) Made operand order make sense for MRMSrcMem (XCHG) Added register-register forms (XADD, CMPXCHG) Added unlocked forms * X86InstrMMX.td (MMX_MOVD, MMV_MOVQ) Added forms * X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table change * X86RegisterInfo.td: Added debug and condition register sets * x86-64-pic-3.ll: Fixed testcase to reflect call qualifier * peep-test-3.ll: Fixed testcase to reflect test qualifier * cmov.ll: Fixed testcase to reflect cmov qualifier * loop-blocks.ll: Fixed testcase to reflect call qualifier * x86-64-pic-11.ll: Fixed testcase to reflect call qualifier * 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call qualifier * x86-64-pic-2.ll: Fixed testcase to reflect call qualifier * live-out-reg-info.ll: Fixed testcase to reflect test qualifier * tail-opts.ll: Fixed testcase to reflect call qualifiers * x86-64-pic-10.ll: Fixed testcase to reflect call qualifier * bss-pagealigned.ll: Fixed testcase to reflect call qualifier * x86-64-pic-1.ll: Fixed testcase to reflect call qualifier * widen_load-1.ll: Fixed testcase to reflect call qualifier llvm-svn: 91638
* Sundry dependent-name fixes flagged by clang++.John McCall2009-12-171-4/+4
| | | | llvm-svn: 91636
* Revert accidental commit.Bill Wendling2009-12-171-1/+1
| | | | llvm-svn: 91635
* Turn off critical edge splitting for landing pads. The introduction of aBill Wendling2009-12-172-4/+5
| | | | | | | | | | non-landing pad basic block as the successor to a block that ends in an unconditional jump will cause block folding to remove the added block as a successor. Thus eventually removing it AND the landing pad entirely. Critical edge splitting is an optimization, so we can safely turn it off when dealing with landing pads. llvm-svn: 91634
* Revert r91623 to unbreak the buildbots.Jeffrey Yasskin2009-12-171-1/+4
| | | | llvm-svn: 91632
* Allow instcombine to combine "sext(a) >u const" to "a >u trunc(const)".Eli Friedman2009-12-171-12/+10
| | | | llvm-svn: 91631
* Don't codegen available_externally functions. Fixes http://llvm.org/PR5735.Jeffrey Yasskin2009-12-173-30/+62
| | | | llvm-svn: 91626
* Make the ptrtoint comparison simplification work if one side is a global.Eli Friedman2009-12-171-1/+1
| | | | llvm-svn: 91624
* Remove an unused option.Evan Cheng2009-12-171-4/+1
| | | | llvm-svn: 91623
* Slightly generalize transformation of memmove(a,a,n) so that it also appliesEli Friedman2009-12-171-1/+3
| | | | | | | to memcpy. (Such a memcpy is technically illegal, but in practice is safe and is generated by struct self-assignment in C code.) llvm-svn: 91621
* Make Path use StringRef instead of std::string where possible.Jeffrey Yasskin2009-12-174-44/+45
| | | | llvm-svn: 91620
* Temporarily revert 91337. It's causing testcase failures.Bill Wendling2009-12-171-6/+7
| | | | | | | | $ svn merge -c -91337 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91337 into '.': U lib/CodeGen/AsmPrinter/DwarfException.cpp llvm-svn: 91618
* Introduce EVT::getHalfSizedIntegerVT() for use in ExpandUnalignedStore() inKen Dyck2009-12-171-6/+3
| | | | | | | | | | | | | | LegalizeDAG.cpp. Unlike the code it replaces, which simply decrements the simple type by one, getHalfSizedIntegerVT() searches for the smallest simple integer type that is at least half the size of the type it is called on. This approach has the advantage that it will continue working if a new value type (such as i24) is added to MVT. Also, in preparation for new value types, remove the assertions that non-power-of-2 8-bit-mutiple types are Extended when legalizing extload and truncstore operations. llvm-svn: 91614
* finish cleaning up StructLayoutMap.Chris Lattner2009-12-171-21/+17
| | | | llvm-svn: 91612
* This fixes a memory leak in OpaqueType found by Google's internal heapchecker.Jeffrey Yasskin2009-12-172-0/+28
| | | | llvm-svn: 91611
* Re-revert 91459. It's breaking the x86_64 darwin bootstrap.Bob Wilson2009-12-171-424/+404
| | | | llvm-svn: 91607
* Remove debugging code.Evan Cheng2009-12-171-24/+0
| | | | llvm-svn: 91604
* In LowerEXTRACT_VECTOR_ELT, force an i32 value type for PEXTWR instead ofKen Dyck2009-12-171-1/+1
| | | | | | | incrementing the simple value type of the 16-bit type, which would give the wrong type if an intemediate MVT (such as i24) were introduced. llvm-svn: 91602
* Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently ↵Evan Cheng2009-12-174-41/+104
| | | | | | introduced a non-deterministic behavior in the optimizer somewhere. llvm-svn: 91598
* Aggressively flip compare constant expressions where appropriate; constantEli Friedman2009-12-171-3/+5
| | | | | | folding in particular expects null to be on the RHS. llvm-svn: 91587
* Fix a comment grammaro.Bob Wilson2009-12-171-2/+2
| | | | llvm-svn: 91584
* Revert this dag combine change:Evan Cheng2009-12-171-13/+0
| | | | | | | | Fold (zext (and x, cst)) -> (and (zext x), cst) DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping. llvm-svn: 91574
* Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings.Johnny Chen2009-12-161-1/+1
| | | | llvm-svn: 91571
* Silence a clang warning about the deprecated (but perfectly reasonable inJohn McCall2009-12-161-2/+2
| | | | | | context) increment-of-bool idiom. llvm-svn: 91564
* Reapply r91392, it was only unmasking the bug, and since TOT is still broken ↵Daniel Dunbar2009-12-163-29/+155
| | | | | | having it reverted does no good. llvm-svn: 91560
* Reapply r91459, it was only unmasking the bug, and since TOT is still broken ↵Daniel Dunbar2009-12-161-404/+424
| | | | | | having it reverted does no good. llvm-svn: 91559
* Mark STREX* as earlyclobber for the success result register.Jim Grosbach2009-12-162-2/+2
| | | | llvm-svn: 91555
* Add @earlyclobber TableGen constraintJim Grosbach2009-12-161-3/+21
| | | | llvm-svn: 91554
* Reuse lowered phi nodes.Jakob Stoklund Olesen2009-12-163-43/+124
| | | | | | | | | | | | | | Tail duplication produces lots of identical phi nodes in different basic blocks. Teach PHIElimination to reuse the join registers when lowering a phi node that is identical to an already lowered node. This saves virtual registers, and more importantly it avoids creating copies the the coalescer doesn't know how to eliminate. Teach LiveIntervalAnalysis about the phi joins with multiple uses. This patch significantly reduces code size produced by -pre-regalloc-taildup. llvm-svn: 91549
* Revert "Reapply 91184 with fixes and an addition to the testcase to cover theDaniel Dunbar2009-12-161-424/+404
| | | | | | | | | problem", this broke llvm-gcc bootstrap for release builds on x86_64-apple-darwin10. This reverts commit db22309800b224a9f5f51baf76071d7a93ce59c9. llvm-svn: 91534
* Revert "Initial work on disabling the scheduler. This is a work in progress, andDaniel Dunbar2009-12-163-155/+29
| | | | | | | this", this broke llvm-gcc bootstrap for release builds on x86_64-apple-darwin10. llvm-svn: 91533
* reapply my strstr optimization. I have reproduced the x86-64 bootstrapChris Lattner2009-12-161-9/+75
| | | | | | | miscompile (i386.o miscompares) but it happens both with and without this patch. llvm-svn: 91532
* now that libsystem no longer uses SmallVector, we can move Chris Lattner2009-12-162-0/+38
| | | | | | SmallVectorBase::grow_pod out of line, finally satisfying PR3758. llvm-svn: 91529
* remove use of SmallVector from Path::makeUnique. Path::makeUniqueChris Lattner2009-12-161-14/+10
| | | | | | is not used by anything performance sensitive, so just use std::string. llvm-svn: 91528
* eliminate an extraneous use of SmallVector in a case whereChris Lattner2009-12-161-6/+4
| | | | | | a fixed size buffer is perfectly fine. llvm-svn: 91527
* Use different name for argument and fieldVictor Hernandez2009-12-161-2/+2
| | | | llvm-svn: 91524
* MDNodes that refer to an instruction are local to a function; in that case, ↵Victor Hernandez2009-12-161-3/+8
| | | | | | explicitly keep track of the function they are local to llvm-svn: 91497
* Add encoding bits for some Thumb instructions. Plus explicitly set the top twoJohnny Chen2009-12-163-10/+18
| | | | | | bytes of Inst to 0x0000 for the benefit of the Thumb decoder. llvm-svn: 91496
* Re-enable 91381 with fixes.Evan Cheng2009-12-163-12/+40
| | | | llvm-svn: 91489
* revert my strstr optimization, I'm told it breaks x86-64 bootstrap.Chris Lattner2009-12-161-75/+9
| | | | | | Will reapply with a fix when I get a chance. llvm-svn: 91486
* Do better with physical reg operands (typically, from inline asm)Dale Johannesen2009-12-161-16/+41
| | | | | | | | | | | | | | | | | | in local register allocator. If a reg-reg copy has a phys reg input and a virt reg output, and this is the last use of the phys reg, assign the phys reg to the virt reg. If a reg-reg copy has a phys reg output and we need to reload its spilled input, reload it directly into the phys reg than passing it through another reg. Following 76208, there is sometimes no dependency between the def of a phys reg and its use; this creates a window where that phys reg can be used for spilling (this is true in linear scan also). This is bad and needs to be fixed a better way, although 76208 works too well in practice to be reverted. However, there should normally be no spilling within inline asm blocks. The patch here goes a long way towards making this actually be true. llvm-svn: 91485
* Every anonymous namespace is different. Caught by clang++.John McCall2009-12-161-4/+0
| | | | llvm-svn: 91481
* Explicit template instantiations must happen in the template's immediatelyJohn McCall2009-12-162-0/+4
| | | | | | enclosing namespace. Caught by clang++. llvm-svn: 91480
* Helpful comment added. Some code cleanup. No functional change.Bill Wendling2009-12-161-11/+27
| | | | llvm-svn: 91479
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