| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 183836
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llvm-svn: 183835
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I've been comparing the object file output of LLVM's integrated
assembler against the external assembler on PowerPC, and one
area where differences still remain are in DWARF sections.
In particular, the GNU assembler generates .debug_frame and
.debug_line sections using a code alignment factor of 4, since
all PowerPC instructions have size 4 and must be aligned to a
multiple of 4. However, current MC code hard-codes a code
alignment factor of 1.
This patch changes this by adding a "minimum instruction alignment"
data element to MCAsmInfo and using this as code alignment factor.
This requires passing a MCContext into MCDwarfLineAddr::Encode
and MCDwarfLineAddr::EncodeAdvanceLoc. Note that one caller,
MCDwarfLineAddr::Write, didn't actually have that information
available. However, it turns out that this routine is in fact
never used in the whole code base, so the patch simply removes
it. If it turns out to be needed again at a later time, it
could be re-added with an updated interface.
llvm-svn: 183834
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llvm-svn: 183833
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llvm-svn: 183831
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`typeinfo for llvm::cl::GenericOptionValue').
Remove an "anchor" method for an abstract class. (This does not
increase the number of vtables.)
llvm-svn: 183830
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llvm-svn: 183828
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llvm-svn: 183827
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llvm-svn: 183826
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LLVMX86CompilationCallback2, called from inline asm.
llvm-svn: 183824
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This slipped in during a hasty renaming.
llvm-svn: 183810
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match the comments and what the instruction actually does. Noticed
on inspection.
llvm-svn: 183809
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llvm-svn: 183808
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llvm-svn: 183807
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llvm-svn: 183804
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The pass emits a call to sqrt that has attribute "read-none". This call will be
converted to an ISD::FSQRT node during DAG construction, which will turn into
a mips native sqrt instruction.
llvm-svn: 183802
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Most clients have already been moved from Path V1 to V2. The ones using V1
now include PathV1.h explicitly.
llvm-svn: 183801
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Sign- and zero-extension folding was slightly incorrect because it wasn't checking that the shift on extensions was zero. Further, I recently added AND rd, rn, #255 as a form of 8-bit zero extension, and failed to add the folding code for it.
This patch fixes both issues.
This patch fixes both, and the test should remain the same:
test/CodeGen/ARM/fast-isel-fold.ll
llvm-svn: 183794
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For ARM on linux we use /proc/cpuinfo to detect the host CPU's features.
Linux derives these values without ever looking at the vendor of the
specific CPU implementation. Hence, it adds little value, if we parse
the output of /proc/cpuinfo only for certain vendors.
This patch enables us to derive the correct feature flags e.g. for Qualcomm
CPUs.
llvm-svn: 183790
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This is preparation for replacing Path.h with PathV2.h.
llvm-svn: 183782
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llvm-svn: 183780
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llvm-svn: 183779
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llvm-svn: 183778
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llvm-svn: 183777
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llvm-svn: 183775
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llvm-svn: 183773
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llvm-svn: 183770
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No functionality changes.
llvm-svn: 183767
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llvm-svn: 183765
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llvm-svn: 183764
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llvm-svn: 183763
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No functionality change.
llvm-svn: 183758
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Instead of a custom implementation of replaceAllUsesWith, we just call
replaceAllUsesWith and recreate llvm.used and llvm.compiler-used.
This change is particularity interesting because it makes llvm see
through what clang is doing with static used functions in extern "C"
contexts. With this change, running clang -O2 in
extern "C" {
__attribute__((used)) static void foo() {}
}
produces
@llvm.used = appending global [1 x i8*] [i8* bitcast (void ()* @foo to
i8*)], section "llvm.metadata"
define internal void @foo() #0 {
entry:
ret void
}
llvm-svn: 183756
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No functionality change.
llvm-svn: 183754
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It will be tested in the next commit which moves another user to identify_magic.
Original message:
Fix an out of bounds array access.
We were looking at Magic[5] without checking Length. Since this path would not
return unless Length >= 18 anyway, just move the >= 18 check up.
llvm-svn: 183753
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llvm-svn: 183752
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This enables the compiler to see the enum and produce warnings about a switch
not being fully covered. Fix one of these warnings.
llvm-svn: 183749
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No functionality change.
llvm-svn: 183747
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No functionality change.
llvm-svn: 183746
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No functionality change.
llvm-svn: 183745
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llvm-svn: 183744
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The effect of llvm.used is to introduce an invisible reference, so this seems
a reasonable restriction. It will be used to provide an easy ordering of
the entries in llvm.used.
llvm-svn: 183743
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assertions on win32 hosts.
FIXME: Introduce yet another checker but assert(0).
llvm-svn: 183736
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Negative zero is returned by the primary expression parser as INT32_MIN, so all that the method needs to do is to accept this value.
Behavior already present for Thumb2.
llvm-svn: 183734
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are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.
llvm-svn: 183733
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llvm-svn: 183731
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The decoded MCInst wasn't reencoded as the same instruction
llvm-svn: 183729
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- Don't use assert(0), or tests may pass or fail according to assertions.
- For now, The tests are marked as XFAIL for win32 hosts.
FIXME: Could we avoid XFAIL to specify triple in the RUN lines?
llvm-svn: 183728
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FYI, isOSBinFormatCOFF() is as same as isOSWindows(), on trunk.
llvm-svn: 183727
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llvm-svn: 183726
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