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* Enable machine cse of instructions which define physical registers.Evan Cheng2010-06-021-4/+1
| | | | llvm-svn: 105308
* Don't try to custom-lower 64-bit add-with-overflow and friends on x86-32; theEli Friedman2010-06-021-5/+7
| | | | | | | | | x86 backend currently doesn't know how to handle them. This doesn't really fix anything because LegalizeTypes doesn't know how to handle them either. We do get a better error message, though. llvm-svn: 105305
* Fix an obvious mistake: don't change the operands until all of them have beenBob Wilson2010-06-021-2/+0
| | | | | | checked and it is safe to proceed with the changes. llvm-svn: 105304
* Remove outdated README entries.Eli Friedman2010-06-021-140/+0
| | | | llvm-svn: 105303
* Update debug information when breaking anti-dependencies. rdar://7759363Jim Grosbach2010-06-012-1/+31
| | | | llvm-svn: 105300
* Properly compose subregister indices when coalescing.Jakob Stoklund Olesen2010-06-012-14/+3
| | | | | | | The comment about ordering of subreg indices is no longer true. This exposed a bug in the new substVirtReg method that is also fixed. llvm-svn: 105294
* Remove unused codeJim Grosbach2010-06-011-64/+0
| | | | llvm-svn: 105293
* Ignore line number of debug value in undefined register.Devang Patel2010-06-011-0/+1
| | | | llvm-svn: 105292
* fix think-oJim Grosbach2010-06-011-6/+2
| | | | llvm-svn: 105291
* Fix the allocation of shadow space for the Win64 calling conventionDan Gohman2010-06-011-0/+6
| | | | | | in X86FastISel. Patch by Jan Sjodin. llvm-svn: 105290
* Simplify things a bit more. Fix prototype to use SmallVectorImpl andJim Grosbach2010-06-011-17/+17
| | | | | | change a few SmallVectors to vanilla C arrays. llvm-svn: 105289
* Fix the noalias checking so that it doesn't worry aboutDan Gohman2010-06-011-12/+12
| | | | | | an argument aliasing itself. Thanks Duncan! llvm-svn: 105288
* Keep track of incoming debug value of unused argument.Devang Patel2010-06-012-1/+21
| | | | | | Radar 7927666. llvm-svn: 105285
* Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.Dan Gohman2010-06-013-3/+29
| | | | llvm-svn: 105283
* Add a FIXMEJim Grosbach2010-06-011-0/+2
| | | | llvm-svn: 105282
* mirror of r105280 changes for LowerInvoke, which uses the same basic logic hereJim Grosbach2010-06-011-10/+27
| | | | llvm-svn: 105281
* When processing function arguments when splitting live ranges across invokes,Jim Grosbach2010-06-011-10/+27
| | | | | | | handle structs passed by value via an extract/insert pair, as a bitcast won't work on a struct. rdar://7742824 llvm-svn: 105280
* Use SmallVector instead of std::vector.Jim Grosbach2010-06-011-12/+13
| | | | llvm-svn: 105279
* Refactor some SSE 2 unpack instructionsBruno Cardoso Lopes2010-06-011-66/+26
| | | | llvm-svn: 105276
* Don't call flush() at a library level which isn't checking for errorsDan Gohman2010-06-012-2/+0
| | | | | | and doesn't know where the output is going. llvm-svn: 105274
* Fix handling of 'load' nodes.Kalle Raiskila2010-06-011-8/+2
| | | | llvm-svn: 105269
* Fix PR7272: when inlining through a callsite with byval arguments,Duncan Sands2010-05-311-0/+4
| | | | | | | the newly created allocas may be used by inlined calls, so these need to have their tail call flags cleared. Fixes PR7272. llvm-svn: 105255
* fix PR6623: when optimizing for size, don't inline memcpy/memsetsChris Lattner2010-05-311-0/+9
| | | | | | | | | that are too large. This causes the freebsd bootloader to be too large apparently. It's unclear if this should be an -Os or -Oz thing. Thoughts welcome. llvm-svn: 105228
* the 'limit' argument to FindOptimalMemOpLowering is unsigned, not uint64_t.Chris Lattner2010-05-311-6/+3
| | | | llvm-svn: 105226
* Avoid swap when a copy suffices.Benjamin Kramer2010-05-311-1/+1
| | | | llvm-svn: 105220
* The memcpy intrinsic only takes i8* for %src and %dst, so cast them to thatNick Lewycky2010-05-311-2/+2
| | | | | | first. Fixes PR7265. llvm-svn: 105206
* Use `llvm::next' instead of `next' to make VC++ 2010 happy.Oscar Fuentes2010-05-302-2/+2
| | | | llvm-svn: 105168
* Some A9 load/store cleanupsAnton Korobeynikov2010-05-291-41/+23
| | | | llvm-svn: 105109
* Some rough approximations for load/stores on A9Anton Korobeynikov2010-05-291-0/+59
| | | | llvm-svn: 105108
* NEON/VFP stuff can be issued only via Pipe1 on A9Anton Korobeynikov2010-05-291-87/+87
| | | | llvm-svn: 105107
* Add some integer instruction itineraries for A9Anton Korobeynikov2010-05-291-0/+55
| | | | llvm-svn: 105106
* Reorder some code in SelectionDAGBuilder.Dan Gohman2010-05-291-313/+311
| | | | llvm-svn: 105105
* SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValueDan Gohman2010-05-295-50/+49
| | | | | | | shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set doesn't needs its EnableFastISel argument. llvm-svn: 105101
* Remove unused function.Benjamin Kramer2010-05-291-69/+0
| | | | llvm-svn: 105100
* Remove schedule-livein-copies. It's not being used.Evan Cheng2010-05-291-30/+12
| | | | llvm-svn: 105095
* Fix PR7193: if sibling call address can take a register, make sure there are ↵Evan Cheng2010-05-291-0/+18
| | | | | | enough registers available by counting inreg arguments. llvm-svn: 105092
* Handle composed subreg indices when processing REQ_SEQUENCE instructions.Jakob Stoklund Olesen2010-05-291-5/+4
| | | | llvm-svn: 105066
* Doh. Machine LICM is re-initializing the CSE map over and over. Patch by ↵Evan Cheng2010-05-291-2/+7
| | | | | | Anna Zaks. rdar://8037934. llvm-svn: 105065
* Merge the SystemZ subreg_even32 SubRegIndex into subreg_32bit. The SubRegIndicesJakob Stoklund Olesen2010-05-284-11/+9
| | | | | | | | | | were overspecified when inheriting sub-subregisters, for instance: R0Q:subreg_even32 = R0Q:subreg_32bit = R0Q:subreg_even:subreg_32bit. This meant that composeSubRegIndices(subreg_even, subreg_32bit) was ambiguous. llvm-svn: 105063
* Fix some latency computation bugs: if the use is not a machine opcode do not ↵Evan Cheng2010-05-282-7/+27
| | | | | | just return zero. llvm-svn: 105061
* Schedule high latency instructions for latency reduction even if they are ↵Evan Cheng2010-05-281-1/+19
| | | | | | not vfp / NEON instructions. llvm-svn: 105060
* Fix comment typos.Dale Johannesen2010-05-281-2/+2
| | | | llvm-svn: 105059
* More SSE 1 & 2 merge, this time with logical instructionsBruno Cardoso Lopes2010-05-281-185/+98
| | | | llvm-svn: 105014
* Fix AliasDebugger to be aware of operand values too.Dan Gohman2010-05-281-2/+10
| | | | llvm-svn: 105012
* Add lint checks for function attributes.Dan Gohman2010-05-281-30/+91
| | | | llvm-svn: 105009
* Split the logic behind CastInst::isNoopCast into a separate static function,Dan Gohman2010-05-281-5/+13
| | | | | | as is done with most other cast opcode predicates. llvm-svn: 105008
* MC/X86: Add alias for movzx.Kevin Enderby2010-05-281-0/+1
| | | | llvm-svn: 105005
* MC/X86: Add alias for fwait.Kevin Enderby2010-05-281-0/+1
| | | | llvm-svn: 105001
* Fix the use of x86 control and debug registers so that the assertion failure inKevin Enderby2010-05-281-0/+28
| | | | | | getX86RegNum() does not happen. Patch by Shantonu Sen! llvm-svn: 104994
* Add a TargetRegisterInfo::composeSubRegIndices hook with a defaultJakob Stoklund Olesen2010-05-281-0/+19
| | | | | | | | | | implementation that is correct for most targets. Tablegen will override where needed. Add MachineOperand::subst{Virt,Phys}Reg methods that correctly handle existing subreg indices when sustituting registers. llvm-svn: 104985
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