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* Macro debug info support in LLVM IRAmjad Aboud2015-12-1011-10/+256
| | | | | | | | Introduced DIMacro and DIMacroFile debug info metadata in the LLVM IR to support macros. Differential Revision: http://reviews.llvm.org/D14687 llvm-svn: 255245
* [LLE] Use the PredicatedScalarEvolution interface to query SCEVs for dependencesSilviu Baranga2015-12-101-16/+15
| | | | | | | | | | | | | | | | | Summary: LAA uses the PredicatedScalarEvolution interface, so it can produce forward/backward dependences having SCEVs that are AddRecExprs only after being transformed by PredicatedScalarEvolution. Use PredicatedScalarEvolution to get the expected expressions. Reviewers: anemet Subscribers: llvm-commits, sanjoy Differential Revision: http://reviews.llvm.org/D15382 llvm-svn: 255241
* [PostRA scheduling] Allow a target to do scheduling when it wants post RA.Jonas Paulsson2015-12-103-5/+22
| | | | | | | | | | | | | | SystemZ needs to do its scheduling after branch relaxation, which can only happen after block placement, and therefore the standard PostRAScheduler point in the pass sequence is too early. TargetMachine::targetSchedulesPostRAScheduling() is a new method that signals on returning true that target will insert the final scheduling pass on its own. Reviewed by Hal Finkel llvm-svn: 255234
* Revert r255137.Akira Hatanaka2015-12-101-39/+0
| | | | | | This commit broke apple's internal bot. llvm-svn: 255227
* Add arg_begin() and arg_end() to CallInst and InvokeInst; NFCISanjoy Das2015-12-104-11/+6
| | | | | | | | | | - This simplifies the CallSite class, arg_begin / arg_end are now simple wrapper getters. - In several places, we were creating CallSite instances solely to call arg_begin and arg_end. With this change, that's no longer required. llvm-svn: 255226
* [X86] Fix a couple cases were bitwise and logical operations were being ↵Craig Topper2015-12-102-2/+2
| | | | | | mixed. NFC llvm-svn: 255224
* [WebAssembly] Implement mixed-type ISD::FCOPYSIGN.Dan Gohman2015-12-102-1/+7
| | | | | | | | ISD::FCOPYSIGN permits its operands to have differing types, and DAGCombiner uses this. Add some def : Pat rules to expand this out into an explicit conversion and a normal copysign operation. llvm-svn: 255220
* [WebAssembly] Implement fma.Dan Gohman2015-12-101-1/+1
| | | | | | It is lowered to a libcall for now, but this is expected to change in the future. llvm-svn: 255219
* AMDGPU/SI: Fix warning introduced by r255204Tom Stellard2015-12-101-2/+1
| | | | llvm-svn: 255205
* AMDGPU/SI: Emit constant arrays in the .text sectionTom Stellard2015-12-1015-90/+88
| | | | | | | | | | | | | | | Summary: This allows us to remove the END_OF_TEXT_LABEL hack we had been using and simplifies the fixups used to compute the address of constant arrays. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15257 llvm-svn: 255204
* AMDGPU/SI: Add support for sgpr and vgpr inline assembly constraintsTom Stellard2015-12-102-6/+48
| | | | | | | | | | | | Summary: The 's' constraint represents sgprs and the 'v' constraint represents vgprs. Reviewers: arsenm, echristo Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15342 llvm-svn: 255203
* [WebAssembly] Fix legalization of f32->f64 EXTLOAD.Dan Gohman2015-12-101-1/+1
| | | | llvm-svn: 255202
* [WebAssembly] Update known test failuresDerek Schuff2015-12-101-10/+1
| | | | | | We can now select sign_extend_inreg llvm-svn: 255197
* RegisterPressure: Factor out liveness dead-def detection logic; NFCIMatthias Braun2015-12-101-40/+43
| | | | | | | | Detecting additional dead-defs without a dead flag that are only visible through liveness information should be part of the register operand collection not intertwined with the register pressure update logic. llvm-svn: 255192
* [WebAssembly] Also legalize sign_extend_inreg of i32->i64.Dan Gohman2015-12-101-1/+1
| | | | llvm-svn: 255191
* [WebAssembly] Update test failure expectationsDerek Schuff2015-12-101-28/+10
| | | | llvm-svn: 255190
* PeepholeOptimizer: Ignore dead implicit defsDan Gohman2015-12-101-0/+6
| | | | | | | | Target-specific instructions may have uninteresting physreg clobbers, for target-specific reasons. The peephole pass doesn't need to concern itself with such defs, as long as they're implicit and marked as dead. llvm-svn: 255182
* [WebAssembly] Fix legalization of shift operators with illegal types.Dan Gohman2015-12-101-1/+7
| | | | llvm-svn: 255181
* [WebAssembly] Fix copy+pastos.Dan Gohman2015-12-101-12/+12
| | | | llvm-svn: 255180
* [WebAssembly] Implement anyext.Dan Gohman2015-12-101-0/+9
| | | | llvm-svn: 255179
* [X86] Enable shrink-wrapping by default, but keep it disabled for stack framesQuentin Colombet2015-12-092-0/+9
| | | | | | | | without a frame pointer when unwind may happen. This is a workaround for a bug in the way we emit the CFI directives for frameless unwind information. See PR25614. llvm-svn: 255175
* use range-based for loops; NFCISanjay Patel2015-12-091-6/+4
| | | | llvm-svn: 255171
* Synchronize the logic for deciding to link a gv.Rafael Espindola2015-12-091-1/+6
| | | | | | | We were deciding to not link an available_externally gv over a declaration, but then copying over the body anyway. llvm-svn: 255169
* IR: Make ConstantDataArray::getFP actually return a ConstantDataArrayJustin Bogner2015-12-091-1/+1
| | | | | | | | | | The ConstantDataArray::getFP(LLVMContext &, ArrayRef<uint16_t>) overload has had a typo in it since it was written, where it will create a Vector instead of an Array. This obviously doesn't work at all, but it turns out that until r254991 there weren't actually any callers of this overload. Fix the typo and add some test coverage. llvm-svn: 255157
* [Float2Int] Don't operate on vector instructionsReid Kleckner2015-12-091-0/+2
| | | | | | | This fixes a crash bug. It's also not clear if we'd want to do this transform for vectors. llvm-svn: 255155
* Don't assign a temporary string to a StringRef.Rafael Espindola2015-12-091-1/+1
| | | | | | Should fix the windows debug and asan bots. llvm-svn: 255149
* Use WeakVH to keep track of calls with operand bundles in CloneCodeInfoSanjoy Das2015-12-091-1/+3
| | | | | | | | `CloneAndPruneIntoFromInst` can DCE instructions after cloning them into the new function, and so an AssertingVH is too strong. This change switches CloneCodeInfo to use a std::vector<WeakVH>. llvm-svn: 255148
* Delete trailing whitespace; NFCSanjoy Das2015-12-091-1/+1
| | | | llvm-svn: 255147
* [ThinLTO] FunctionImport pass can take a const index pointer (NFC)Teresa Johnson2015-12-091-3/+3
| | | | llvm-svn: 255140
* [InstCombine] fold bitcasts around an extractelement (2nd try)Sanjay Patel2015-12-091-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a redo of r255124 (reverted at r255126) with an added check for a scalar destination type and an added test for the failure seen in Clang's test/CodeGen/vector.c. The extra test shows a different missing optimization. Original commit message: Example: bitcast (extractelement (bitcast <2 x float> %X to <2 x i32>), 1) to float ---> extractelement <2 x float> %X, i32 1 This is part of fixing PR25543: https://llvm.org/bugs/show_bug.cgi?id=25543 The next step will be to generalize this fold: trunc ( lshr ( bitcast X) ) -> extractelement (X) Ie, I'm hoping to replace the existing transform of: bitcast ( trunc ( lshr ( bitcast X))) added by: http://reviews.llvm.org/rL112232 with 2 less specific transforms to catch the case in the bug report. Differential Revision: http://reviews.llvm.org/D14879 llvm-svn: 255137
* Revert "Revert r253253 and r253126: "Don't recompute LCSSA after ↵Michael Zolotukhin2015-12-091-2/+12
| | | | | | | | | | | loop-unrolling when possible."" The bug in IndVarSimplify was fixed in r254976, r254977, so I'm reapplying the original patch for avoiding redundant LCSSA recomputation. This reverts commit ffe3b434e505e403146aff00be0c177bb6d13466. llvm-svn: 255133
* [PGO] Resubmit "MST based PGO instrumentation infrastructure" (r254021)Rong Xu2015-12-096-1/+945
| | | | | | | | | | | | | | | This new patch fixes a few bugs that exposed in last submit. It also improves the test cases. --Original Commit Message-- This patch implements a minimum spanning tree (MST) based instrumentation for PGO. The use of MST guarantees minimum number of CFG edges getting instrumented. An addition optimization is to instrument the less executed edges to further reduce the instrumentation overhead. The patch contains both the instrumentation and the use of the profile to set the branch weights. Differential Revision: http://reviews.llvm.org/D12781 llvm-svn: 255132
* Revert "[InstCombine] fold bitcasts around an extractelement"Mehdi Amini2015-12-091-37/+0
| | | | | | | | | This reverts commit r255124. Broke http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/4193/steps/test/logs/stdio From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255126
* [WebAssembly] Reintroduce ARGUMENT moving logicDan Gohman2015-12-094-0/+116
| | | | | | | | | | | | | | | | | | | Reinteroduce the code for moving ARGUMENTS back to the top of the basic block. While the ARGUMENTS physical register prevents sinking and scheduling from moving them, it does not appear to be sufficient to prevent SelectionDAG from moving them down in the initial schedule. This patch introduces a patch that moves them back to the top immediately after SelectionDAG runs. This is still hopefully a temporary solution. http://reviews.llvm.org/D14750 is one alternative, though the review has not been favorable, and proposed alternatives are longer-term and have other downsides. This fixes the main outstanding -verify-machineinstrs failures, so it adds -verify-machineinstrs to several tests. Differential Revision: http://reviews.llvm.org/D15377 llvm-svn: 255125
* [InstCombine] fold bitcasts around an extractelementSanjay Patel2015-12-091-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | Example: bitcast (extractelement (bitcast <2 x float> %X to <2 x i32>), 1) to float ---> extractelement <2 x float> %X, i32 1 This is part of fixing PR25543: https://llvm.org/bugs/show_bug.cgi?id=25543 The next step will be to generalize this fold: trunc ( lshr ( bitcast X) ) -> extractelement (X) Ie, I'm hoping to replace the existing transform of: bitcast ( trunc ( lshr ( bitcast X))) added by: http://reviews.llvm.org/rL112232 with 2 less specific transforms to catch the case in the bug report. Differential Revision: http://reviews.llvm.org/D14879 llvm-svn: 255124
* Re-commit r255115, with the PredicatedScalarEvolution class moved toSilviu Baranga2015-12-096-136/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ScalarEvolution.h, in order to avoid cyclic dependencies between the Transform and Analysis modules: [LV][LAA] Add a layer over SCEV to apply run-time checked knowledge on SCEV expressions Summary: This change creates a layer over ScalarEvolution for LAA and LV, and centralizes the usage of SCEV predicates. The SCEVPredicatedLayer takes the statically deduced knowledge by ScalarEvolution and applies the knowledge from the SCEV predicates. The end goal is that both LAA and LV should use this interface everywhere. This also solves a problem involving the result of SCEV expression rewritting when the predicate changes. Suppose we have the expression (sext {a,+,b}) and two predicates P1: {a,+,b} has nsw P2: b = 1. Applying P1 and then P2 gives us {a,+,1}, while applying P2 and the P1 gives us sext({a,+,1}) (the AddRec expression was changed by P2 so P1 no longer applies). The SCEVPredicatedLayer maintains the order of transformations by feeding back the results of previous transformations into new transformations, and therefore avoiding this issue. The SCEVPredicatedLayer maintains a cache to remember the results of previous SCEV rewritting results. This also has the benefit of reducing the overall number of expression rewrites. Reviewers: mzolotukhin, anemet Subscribers: jmolloy, sanjoy, llvm-commits Differential Revision: http://reviews.llvm.org/D14296 llvm-svn: 255122
* ARM: don't use a deleted node as the BaseReg in complex pattern.Tim Northover2015-12-091-1/+4
| | | | | | | | | | We mutated the DAG, which invalidated the node we were trying to use as a base register. Sometimes we got away with it, but other times the node really did get deleted before it was finished with. Should fix PR25733 llvm-svn: 255120
* WebAssembly: add missing failure to the list.JF Bastien2015-12-091-0/+1
| | | | llvm-svn: 255119
* Revert r255115 until we figure out how to fix the bot failures.Silviu Baranga2015-12-096-175/+135
| | | | llvm-svn: 255117
* [LV][LAA] Add a layer over SCEV to apply run-time checked knowledge on SCEV ↵Silviu Baranga2015-12-096-135/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | expressions Summary: This change creates a layer over ScalarEvolution for LAA and LV, and centralizes the usage of SCEV predicates. The SCEVPredicatedLayer takes the statically deduced knowledge by ScalarEvolution and applies the knowledge from the SCEV predicates. The end goal is that both LAA and LV should use this interface everywhere. This also solves a problem involving the result of SCEV expression rewritting when the predicate changes. Suppose we have the expression (sext {a,+,b}) and two predicates P1: {a,+,b} has nsw P2: b = 1. Applying P1 and then P2 gives us {a,+,1}, while applying P2 and the P1 gives us sext({a,+,1}) (the AddRec expression was changed by P2 so P1 no longer applies). The SCEVPredicatedLayer maintains the order of transformations by feeding back the results of previous transformations into new transformations, and therefore avoiding this issue. The SCEVPredicatedLayer maintains a cache to remember the results of previous SCEV rewritting results. This also has the benefit of reducing the overall number of expression rewrites. Reviewers: mzolotukhin, anemet Subscribers: jmolloy, sanjoy, llvm-commits Differential Revision: http://reviews.llvm.org/D14296 llvm-svn: 255115
* Fix cycle in selection DAG introduced by extractelement legalizationRobert Lougher2015-12-091-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | During selection DAG legalization, extractelement is replaced with a load instruction. To do this, a temporary store to the stack is used unless an existing store is found that can be re-used. If re-using a store, the chain going out of the store must be replaced by the one going out of the new load (this ensures that any stores that must take place after the store happens after the load, else the value might be overwritten before it is loaded). The problem is, if the extractelement index is dependent on the store replacing the chain will introduce a cycle in the selection DAG (the load uses the index, and by replacing the chain we will make the index dependent on the load). To fix this, if the index is dependent on the store, the store is skipped. This is conservative as we may end up creating an unnecessary extra store to the stack. However, the situation is not expected to occur very often. Differential Revision: http://reviews.llvm.org/D15330 llvm-svn: 255114
* [AArch64] Fix FP16 vector instructions that should only accept low registersOliver Stannard2015-12-091-3/+3
| | | | llvm-svn: 255113
* [mips][ias] Range check uimm10 operandsDaniel Sanders2015-12-092-13/+7
| | | | | | | | | | | | Summary: Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15229 llvm-svn: 255112
* WebAssembly: add known failuresJF Bastien2015-12-092-2/+444
| | | | | | The bots are now running the torture tests properly. Bin all failures from the GCC C torture tests so that we can tackle failures and make the tree go red on regressions. llvm-svn: 255111
* [mips] Use multiclass patterns for f32/f64 comparisons and i32 selects.Vasileios Kalintiris2015-12-091-75/+69
| | | | | | | | | | | | | | | Summary: Although the multiclass for i32 selects might seem redundant as it has only one instantiation, we will use it to replace the correspondent patterns in Mips64r6InstrInfo.td in follow-up commits. Reviewers: dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14612 llvm-svn: 255110
* Revert r254897 "[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions"Zlatko Buljan2015-12-092-37/+10
| | | | | | | | | Commited patch was intended to implement LH, LHE, LHU and LHUE instructions. After commit test-suite failed with error message in the form of: fatal error: error in backend: Cannot select: t124: i32,ch = load<LD2[%d](tbaa=<0x94acc48>), sext from i16> t0, t2, undef:i32 For that reason I decided to revert commit r254897 and make new patch which besides implementation and standard regression tests will also have dedicated tests (CodeGen) for the above error. llvm-svn: 255109
* EarlyCSE: fix typo from rL255054.JF Bastien2015-12-091-1/+1
| | | | llvm-svn: 255102
* Revert "Implement a new pass - LiveDebugValues - to compute the set of live ↵Mehdi Amini2015-12-094-405/+0
| | | | | | | | | | | DEBUG_VALUEs at each basic block and insert them. Reviewed and accepted at: http://reviews.llvm.org/D11933" This reverts commit r255096. Break the bots: http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_check/16378/ From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255101
* The current importing scheme is processing one function at a time,Mehdi Amini2015-12-091-54/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | loading the source Module, linking the function in the destination module, and destroying the source Module before repeating with the next function to import (potentially from the same Module). Ideally we would keep the source Module alive and import the next Function needed from this Module. Unfortunately this is not possible because the linker does not leave it in a usable state. However we can do better by first computing the list of all candidates per Module, and only then load the source Module and import all the function we need for it. The trick to process callees is to materialize function in the source module when building the list of function to import, and inspect them in their source module, collecting the list of callees for each callee. When we move the the actual import, we will import from each source module exactly once. Each source module is loaded exactly once. The only drawback it that it requires to have all the lazy-loaded source Module in memory at the same time. Currently this patch already improves considerably the link time, a multithreaded link of llvm-dis on my laptop was: real 1m12.175s user 6m32.430s sys 0m10.529s and is now: real 0m40.697s user 2m10.237s sys 0m4.375s Note: this is the full link time (linker+Import+Optimizer+CodeGen) Differential Revision: http://reviews.llvm.org/D15178 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255100
* Implement a new pass - LiveDebugValues - to compute the set of live ↵Vikram TV2015-12-094-0/+405
| | | | | | DEBUG_VALUEs at each basic block and insert them. Reviewed and accepted at: http://reviews.llvm.org/D11933 llvm-svn: 255096
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