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* Consistently use CGSCCAnalysisManagerSean Silva2016-08-091-2/+2
| | | | | | | | | | | Besides a general consistently benefit, the extra layer of indirection allows the mechanical part of https://reviews.llvm.org/D23256 that requires touching every transformation and analysis to be factored out cleanly. Thanks to David for the suggestion. llvm-svn: 278080
* Consistently use LoopAnalysisManagerSean Silva2016-08-0913-16/+16
| | | | | | | | | | | | | | | | | One exception here is LoopInfo which must forward-declare it (because the typedef is in LoopPassManager.h which depends on LoopInfo). Also, some includes for LoopPassManager.h were needed since that file provides the typedef. Besides a general consistently benefit, the extra layer of indirection allows the mechanical part of https://reviews.llvm.org/D23256 that requires touching every transformation and analysis to be factored out cleanly. Thanks to David for the suggestion. llvm-svn: 278079
* Consistently use ModuleAnalysisManagerSean Silva2016-08-0918-20/+20
| | | | | | | | | | | Besides a general consistently benefit, the extra layer of indirection allows the mechanical part of https://reviews.llvm.org/D23256 that requires touching every transformation and analysis to be factored out cleanly. Thanks to David for the suggestion. llvm-svn: 278078
* Consistently use FunctionAnalysisManagerSean Silva2016-08-0941-49/+49
| | | | | | | | | | | Besides a general consistently benefit, the extra layer of indirection allows the mechanical part of https://reviews.llvm.org/D23256 that requires touching every transformation and analysis to be factored out cleanly. Thanks to David for the suggestion. llvm-svn: 278077
* CodeView: extract the OMF Directory HeaderSaleem Abdulrasool2016-08-092-11/+13
| | | | | | | | | | | | The DebugDirectory contains a pointer to the CodeView info structure which is a derivative of the OMF debug directory. The structure has evolved a bit over time, and PDB 2.0 used a slightly different definition from PDB 7.0. Both of these are specific to CodeView and not COFF. Reflect this by moving the structure definitions into the DebugInfo/CodeView headers. Define a generic DebugInfo union type that can be used to pass around a reference to the DebugInfo irrespective of the versioning. NFC. llvm-svn: 278075
* [x86] split combineVSelectWithAllOnesOrZeros into a helper function; NFCISanjay Patel2016-08-091-47/+61
| | | | llvm-svn: 278074
* [WebAssembly] Fix CFI index to account for padding nullptr functionDerek Schuff2016-08-081-1/+2
| | | | | | | | | | | | | The WebAssembly linker now creates a dummy function at index 0 to prevent miscomparisons with the NULL pointer, see https://github.com/WebAssembly/binaryen/pull/658. Thanks to pcc for pointing out this problem! Patch by Dominic Chen Differential Revision: https://reviews.llvm.org/D23137 llvm-svn: 278073
* Revert "Do not ignore SizeOfOptionalHeader in COFF header even if PE header ↵Rui Ueyama2016-08-081-2/+1
| | | | | | | | is not present." This reverts commit r278066 to unbreak buildbots. llvm-svn: 278070
* Revert r278065 while I investigate some build-bot breakage.Lang Hames2016-08-082-22/+2
| | | | llvm-svn: 278069
* Do not ignore SizeOfOptionalHeader in COFF header even if PE header is not ↵Rui Ueyama2016-08-081-1/+2
| | | | | | | | | | | | | | | | | | | present. Attribute SizeOfOptionalHeader is ignored if no PE header is present in the file. This attribute should be ignored according to standard, however there are uses of this field even though it should not be used. This change does not conform to PE/COFF standard, but there are several COFF files without PE header, where you had to add up SizeOfOptionalHeader in order to get proper section headers. Other tools and their own parsers do take this into account. Patch by Marek Milkovič! https://reviews.llvm.org/D22750 llvm-svn: 278066
* [RuntimeDyld][Orc][MCJIT] Add partial weak-symbol support to RuntimeDyld.Lang Hames2016-08-082-2/+22
| | | | | | | | | | | | | | | This patch causes RuntimeDyld to check for existing definitions when it encounters weak symbols. If a definition already exists then the new weak definition is discarded. All symbol lookups within a "logical dylib" should now agree on the address of any given weak symbol. This allows the JIT to better match the behavior of the static linker for C++ code. This support is only partial, as it does not allow strong definitions that occur after the first weak definition (in JIT symbol lookup order) to override the previous weak definitions. Support for this will be added in a future patch. llvm-svn: 278065
* Revert "[X86] Support the "ms-hotpatch" attribute."Charles Davis2016-08-088-83/+21
| | | | | | | | This reverts commit r278048. Something changed between the last time I built this--it takes awhile on my ridiculously slow and ancient computer--and now that broke this. llvm-svn: 278053
* InstCombine: Remove a redundant #ifdef NDEBUG. NFCJustin Bogner2016-08-081-2/+0
| | | | | | The DEBUG() macro already does this. llvm-svn: 278049
* [X86] Support the "ms-hotpatch" attribute.Charles Davis2016-08-088-21/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Based on two patches by Michael Mueller. This is a target attribute that causes a function marked with it to be emitted as "hotpatchable". This particular mechanism was originally devised by Microsoft for patching their binaries (which they are constantly updating to stay ahead of crackers, script kiddies, and other ne'er-do-wells on the Internet), but is now commonly abused by Windows programs to hook API functions. This mechanism is target-specific. For x86, a two-byte no-op instruction is emitted at the function's entry point; the entry point must be immediately preceded by 64 (32-bit) or 128 (64-bit) bytes of padding. This padding is where the patch code is written. The two byte no-op is then overwritten with a short jump into this code. The no-op is usually a `movl %edi, %edi` instruction; this is used as a magic value indicating that this is a hotpatchable function. Reviewers: majnemer, sanjoy, rnk Subscribers: dberris, llvm-commits Differential Revision: https://reviews.llvm.org/D19908 llvm-svn: 278048
* [Hexagon] Add pattern for 64-bit mulhsKrzysztof Parzyszek2016-08-082-11/+33
| | | | llvm-svn: 278040
* [LoopUnroll] Simplify loops created by unrolling.Michael Zolotukhin2016-08-081-0/+19
| | | | | | | | | | | | | | Summary: Currently loop-unrolling doesn't preserve loop-simplified form. This patch fixes it by resimplifying affected loops. Reviewers: chandlerc, sanjoy, hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23148 llvm-svn: 278038
* RefreshCallGraph does not modify the SCC, adding "const" to make it clear (NFC)Mehdi Amini2016-08-081-3/+3
| | | | llvm-svn: 278037
* [MemorySSA] Fix windows build breakage caused by r278028Geoff Berry2016-08-081-4/+4
| | | | | r278028: [MemorySSA] Ensure address stability of MemorySSA object. llvm-svn: 278035
* [X86] Improve code size on X86 segment movesNirav Dave2016-08-081-0/+24
| | | | | | | | | | | | | | Moves of a value to a segment register from a 16-bit register is equivalent to one from it's corresponding 32-bit register. Match gas's behavior and rewrite instructions to the shorter of equivalent forms. Reviewers: rnk, ab Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23166 llvm-svn: 278031
* [MemorySSA] Ensure address stability of MemorySSA object.Geoff Berry2016-08-081-17/+13
| | | | | | | | | | | | | | | | | Summary: Ensure that the MemorySSA object never changes address when using the new pass manager since the walkers contained by MemorySSA cache pointers to it at construction time. This is achieved by wrapping the MemorySSAAnalysis result in a unique_ptr. Also add some asserts that check for this bug. Reviewers: george.burgess.iv, dberlin Subscribers: mcrosier, hfinkel, chandlerc, silvas, llvm-commits Differential Revision: https://reviews.llvm.org/D23171 llvm-svn: 278028
* [ARM] Add support for embedded position-independent codeOliver Stannard2016-08-0811-20/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for some new relocation models to the ARM backend: * Read-only position independence (ROPI): Code and read-only data is accessed PC-relative. The offsets between all code and RO data sections are known at static link time. This does not affect read-write data. * Read-write position independence (RWPI): Read-write data is accessed relative to the static base register (r9). The offsets between all writeable data sections are known at static link time. This does not affect read-only data. These two modes are independent (they specify how different objects should be addressed), so they can be used individually or together. They are otherwise the same as the "static" relocation model, and are not compatible with SysV-style PIC using a global offset table. These modes are normally used by bare-metal systems or systems with small real-time operating systems. They are designed to avoid the need for a dynamic linker, the only initialisation required is setting r9 to an appropriate value for RWPI code. I have only added support to SelectionDAG, not FastISel, because FastISel is currently disabled for bare-metal targets where these modes would be used. Differential Revision: https://reviews.llvm.org/D23195 llvm-svn: 278015
* [SystemZ] Add support for the .insn directiveZhan Jun Liau2016-08-087-0/+555
| | | | | | | | | | | | | | | | | Summary: Add support for the .insn directive. .insn is an s390 specific directive that allows encoding of an instruction instead of using a mnemonic. The motivating case is some code in node.js that requires support for the .insn directive. Reviewers: koriakin, uweigand Subscribers: koriakin, llvm-commits Differential Revision: https://reviews.llvm.org/D21809 llvm-svn: 278012
* GVN-hoist: enable by defaultSebastian Pop2016-08-081-2/+2
| | | | llvm-svn: 278010
* [LVI] NFC. On the fast dest path use inverse predicate instead of inverse ↵Artur Pilipenko2016-08-081-4/+5
| | | | | | | | | | range result Gathering constantins from a condition on the false path ask makeAllowedICmpRegion about inverse predicate instead of inversing the resulting range. This change was separated from the review "[LVI] Make LVI smarter about comparisons with non-constants" (https://reviews.llvm.org/D23205#inline-198361) llvm-svn: 278009
* [LVI] NFC. Rename confusing local NegOffset to OffsetArtur Pilipenko2016-08-081-6/+6
| | | | | | NegOffset is not necessarily negative llvm-svn: 278008
* [LVI] NFC. Extract LHS, RHS, Predicate locals in getValueFromConditionArtur Pilipenko2016-08-081-11/+14
| | | | llvm-svn: 278007
* [AArch64] PR28877: Don't assume we're running after legalization when ↵Silviu Baranga2016-08-081-2/+9
| | | | | | | | | | | | | | | | | | | | | | | creating vcvtfp2fxs Summary: The DAG combine transformation that was generating the aarch64_neon_vcvtfp2fxs node was assuming that all inputs where legal and wasn't accounting that the input could be a v4f64 if we're trying to do the transformation before legalization. We now bail out in this case. All illegal types besides v4f64 were already rejected. Fixes https://llvm.org/bugs/show_bug.cgi?id=28877. Reviewers: jmolloy Subscribers: aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D23261 llvm-svn: 278002
* Re-commit r277988: [mips][ias] Fix all the hacks related to MIPS-specific ↵Daniel Sanders2016-08-088-167/+171
| | | | | | | | | unary operators (%hi/%lo/%gp_rel/etc.). Hopefully with the MSVC builds fixed. I've added a missing '#include <tuple>' that gcc and clang don't seem to need. llvm-svn: 277995
* [X86][SSE] Assert if the shuffle mask indices are not -1 or within a valid ↵Simon Pilgrim2016-08-081-8/+5
| | | | | | | | input range As discussed in post-review rL277959 llvm-svn: 277993
* Revert r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary ↵Daniel Sanders2016-08-088-169/+167
| | | | | | | | operators (%hi/%lo/%gp_rel/etc.). It seems that MSVC doesn't like std::tie(). llvm-svn: 277990
* [mips][ias] Fix all the hacks related to MIPS-specific unary operators ↵Daniel Sanders2016-08-088-167/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (%hi/%lo/%gp_rel/etc.). Summary: They are now lexed as a single token on targets where MCAsmInfo::HasMipsExpressions is true and then parsed in a similar way to the '~' operator as part of MCExpr::parseExpression. As a result: * expressions and immediates no longer have different parsing rules. The difference is now solely down to whether evaluateAsAbsolute() succeeds. * %hi(%neg(%gp_rel(x))) are no longer parsed as a single operator and decomposed into the three MipsMCExpr nodes. They are parsed directly as three MipsMCExpr nodes. * parseMemOperand no longer needs to eat all the surrounding parenthesis to get at the outermost operator to make this work * %hi(%neg(%gp_rel(x))) and %lo(%neg(%gp_rel(x))) are no longer the only 3-in-1 relocs that parse for N64. They're still the only combinations that are permitted in relocatable expressions though. Fixing that should be a later patch. * We no longer need to list all the tokens that can occur as the first token of an expression or immediate. test/MC/Mips/expr1.s: This change also prevents the incorrect lowering of %lo(2*4)+foo to %lo(8+foo) which is not an equivalent expression (the difference is whether foo is truncated to 16-bit or not) and the test has been updated to account for the macro expansion the correct expression requires. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D23110 llvm-svn: 277988
* [SelectionDAG] Refactor visitInlineAsm a bit. NFCI.Diana Picus2016-08-081-151/+198
| | | | | | This shaves off ~100 lines from visitInlineAsm. llvm-svn: 277987
* Add some comments linking back to PR28400.Sean Silva2016-08-084-0/+12
| | | | | | Thanks to Mehdi for the suggestion! llvm-svn: 277984
* [PM] More workaround for PR28400Sean Silva2016-08-083-0/+4
| | | | llvm-svn: 277982
* [PM] Invalidate CallGraphAnalysis because it holds AssertingVHSean Silva2016-08-081-0/+5
| | | | | | | This is essentially PR28400. The fix here is similar to that implemented in r274656. llvm-svn: 277980
* [MSSA] Fix PR28880 by fixing use optimizer's lower bound tracking behavior.Daniel Berlin2016-08-081-4/+16
| | | | | | | | | | | | | | | | Summary: In the use optimizer, we need to keep of whether the lower bound still dominates us or else we may decide a lower bound is still valid when it is not due to intervening pushes/pops. Fixes PR28880 (and probably a bunch of other things). Reviewers: george.burgess.iv Subscribers: MatzeB, llvm-commits, sebpop Differential Revision: https://reviews.llvm.org/D23237 llvm-svn: 277978
* [JumpThreading] Fix handling of aliasing metadata.Eli Friedman2016-08-084-15/+33
| | | | | | | | | | | | | | | | | | Summary: The correctness fix here is that when we CSE a load with another load, we need to combine the metadata on the two loads. This matches the behavior of other passes, like instcombine and GVN. There's also a minor optimization improvement here: for load PRE, the aliasing metadata on the inserted load should be the same as the metadata on the original load. Not sure why the old code was throwing it away. Issue found by inspection. Differential Revision: http://reviews.llvm.org/D21460 llvm-svn: 277977
* [MC] Delete use of *structors_used.Davide Italiano2016-08-083-14/+0
| | | | | | | Jim Grosbach and Kevin Enderby think those are not used anymore. Originally submitted by: Rafael Espindola llvm-svn: 277973
* [SimplifyLibCalls] Emit sqrt intrinsic instead of a libcall.Davide Italiano2016-08-081-2/+3
| | | | llvm-svn: 277972
* [SROA] Fix crash with lifetime intrinsic partially covering alloca.Eli Friedman2016-08-081-1/+7
| | | | | | | | | | | | | Summary: PromoteMemToReg looks specifically for the pattern bitcast+lifetime.start (or a bitcast-equivalent GEP); any offset will lead to an assertion failure. Fixes https://llvm.org/bugs/show_bug.cgi?id=27999 . Differential Revision: https://reviews.llvm.org/D22737 llvm-svn: 277969
* [AVX-512] Improve lowering of inserting a single element into lowest element ↵Craig Topper2016-08-072-6/+20
| | | | | | of a 512-bit vector of zeroes by using vmovq/vmovd/vmovss/vmovsd. llvm-svn: 277965
* [SLC] Emit an intrinsic instead of a libcall for pow.Davide Italiano2016-08-071-9/+13
| | | | | | Differential Revision: https://reviews.llvm.org/D22104 llvm-svn: 277963
* Revert r277905, it caused PR28894Nico Weber2016-08-071-345/+66
| | | | llvm-svn: 277962
* [AVX-512] Add 512-bit logical operations to load folding tables. Add avx512f ↵Craig Topper2016-08-071-0/+16
| | | | | | stack folding test and move some tests from the avx512vl test. llvm-svn: 277961
* [AVX-512] Add EVEX encoded floating point MAX/MIN instructions to the load ↵Craig Topper2016-08-071-3/+35
| | | | | | folding tables. llvm-svn: 277960
* [X86] lowerVectorShuffle - ensure that undefined mask elements only use ↵Simon Pilgrim2016-08-071-0/+9
| | | | | | | | SM_SentinelUndef Help lowering and combining (which can specify SM_SentinelZero mask elements) share more shuffle matching code. llvm-svn: 277959
* AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 ↵Elena Demikhovsky2016-08-071-44/+32
| | | | | | | | | | | integer values Optimized lowering of BITCAST node. The BITCAST node can be replaced with COPY_TO_REG instead of KMOV. It allows to suppress two opposite BITCAST operations and avoid redundant "movs". Differential Revision: https://reviews.llvm.org/D23247 llvm-svn: 277958
* [InstSimplify] Fold gep (gep V, C), (sub 0, V) to CDavid Majnemer2016-08-071-0/+20
| | | | llvm-svn: 277952
* [InstSimplify] Try hard to simplify pointer comparisonsDavid Majnemer2016-08-071-0/+10
| | | | | | | Simplify ptrtoint comparisons involving operands with different source types. llvm-svn: 277951
* [InstCombine] Infer inbounds on geps of allocasDavid Majnemer2016-08-071-0/+19
| | | | llvm-svn: 277950
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