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* Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng2013-02-113-8/+114
| | | | | | | | | | | | | | function is successfully handled by fast-isel. That's because function arguments are *always* handled by SDISel. Introduce FastLowerArguments to allow each target to provide hook to handle formal argument lowering. As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It completely eliminates the need for SDISel for trivial functions. rdar://13163905 llvm-svn: 174855
* Remove unnecessary code.Evan Cheng2013-02-111-4/+0
| | | | llvm-svn: 174854
* Fix unnecessary removal of const through cast machineryDavid Blaikie2013-02-113-14/+14
| | | | | | | | I have some uncommitted changes to the cast code that catch this sort of thing at compile-time but I still need to do some other cleanup before I can enable it. llvm-svn: 174853
* Spelling correctionJoel Jones2013-02-101-1/+1
| | | | llvm-svn: 174852
* Fix the unused but nearly correct method SlotIndexes::insertMBBInMaps() and addCameron Zwarich2013-02-101-0/+14
| | | | | | | | support for updating SlotIndexes to MachineBasicBlock::SplitCriticalEdge(). This calls renumberIndexes() every time; it should be improved to only renumber locally. llvm-svn: 174851
* Abstract the liveness checking in PHIElimination::SplitPHIEdges() to supportCameron Zwarich2013-02-101-2/+37
| | | | | | both LiveVariables and LiveIntervals. llvm-svn: 174850
* Add support in the bitcode reader to read the attribute groups.Bill Wendling2013-02-102-0/+82
| | | | | | | | | This reads the attribute groups. It currently doesn't do anything with them. NOTE: In the commit to the bitcode writer, the format *may* change in the near future. Which means that this code would also change. llvm-svn: 174849
* The 'Raw' method cannot handle 'string' attributes. Don't even try.Bill Wendling2013-02-101-0/+4
| | | | llvm-svn: 174848
* Eat the alignment keyword if we're in an attribute group.Bill Wendling2013-02-101-0/+2
| | | | llvm-svn: 174846
* Add code for emitting the attribute groups.Bill Wendling2013-02-101-0/+53
| | | | | | | | | This is some initial code for emitting the attribute groups into the bitcode. NOTE: This format *may* change! Do not rely upon the attribute groups' bitcode not changing. llvm-svn: 174845
* Add support for attribute groups in the value enumerator.Bill Wendling2013-02-102-0/+24
| | | | | | | Attribute groups are essentially all AttributeSets which are used by the program. Enumerate them here. llvm-svn: 174844
* Test Commit - Remove some trailing whitespace in R600Instructions.tdVincent Lejeune2013-02-101-6/+6
| | | | llvm-svn: 174839
* Handle string attributes in the AttrBuilder.Bill Wendling2013-02-101-1/+5
| | | | llvm-svn: 174834
* Use a 'continue' here to stop from double lexing.Bill Wendling2013-02-101-1/+1
| | | | llvm-svn: 174833
* Add 'empty' query methods to the builder and use them in the verifier.Bill Wendling2013-02-101-1/+1
| | | | llvm-svn: 174832
* Add support for updating LiveIntervals to PHIElimination. If LiveIntervals areCameron Zwarich2013-02-101-29/+142
| | | | | | | | | | | | | | | | | | | present, it currently verifies them with the MachineVerifier, and this passed all of the test cases in 'make check' (when accounting for existing verifier errors). There were some assertion failures in the two-address pass, but they also happened on code without phis and look like they are caused by different kill flags from LiveIntervals. The only part that doesn't work is the critical edge splitting heuristic, because there isn't currently an efficient way to update LiveIntervals after splitting an edge. I'll probably start by implementing the slow fallback and test that it works before tackling the fast path for single-block ranges. The existing code that updates LiveVariables is fairly slow as it is. There isn't a command-line option for enabling this; instead, just edit PHIElimination.cpp to require LiveIntervals. llvm-svn: 174831
* Fix a typo.Cameron Zwarich2013-02-101-1/+1
| | | | llvm-svn: 174830
* Remove ancient references to 'atomic' phis in PHIElimination that don't reallyCameron Zwarich2013-02-101-12/+8
| | | | | | make sense anymore. llvm-svn: 174829
* Make LiveVariables an instance variable of PHIElimination.Cameron Zwarich2013-02-101-11/+9
| | | | llvm-svn: 174828
* Add accessor for the LLVMContext.Bill Wendling2013-02-101-0/+4
| | | | llvm-svn: 174824
* Remove unneeded "TargetMachine.h" #includes.Jakub Staszak2013-02-095-5/+0
| | | | llvm-svn: 174817
* TEMPORARY SYNTAX CHANGE!Bill Wendling2013-02-091-4/+7
| | | | | | | | | | | | | | | | | The original syntax for the attribute groups was ambiguous. For example: declare void @foo() #1 #0 = attributes { noinline } The '#0' would be parsed as an attribute reference for '@foo' and not as a top-level entity. In order to continue forward while waiting for a decision on what the correct syntax is, I'm changing it to this instead: declare void @foo() #1 attributes #0 = { noinline } Repeat: This is TEMPORARY until we decide what the correct syntax should be. llvm-svn: 174813
* [NVPTX] Make address space errors more explicit (llvm_unreachable -> ↵Justin Holewinski2013-02-091-1/+2
| | | | | | report_fatal_error) llvm-svn: 174808
* Fix the underlying problem that was causing read(0) to be called: sometimes theChris Lattner2013-02-091-3/+14
| | | | | | | | | | | | | | | bitcode writer would generate abbrev records saying that the abbrev should be filled with fixed zero-bit bitfields (this happens in the .bc writer when the number of types used in a module is exactly one, since log2(1) == 0). In this case, just handle it as a literal zero. We can't "just fix" the writer without breaking compatibility with existing bc files, so have the abbrev reader do the substitution. Strengthen the assert in read to reject reads of zero bits so we catch such crimes in the future, and remove the special case designed to handle this. llvm-svn: 174801
* LSR IVChain improvement.Andrew Trick2013-02-091-1/+13
| | | | | | | | | Handle chains in which the same offset is used for both loads and stores to the same array. Fixes rdar://11410078. llvm-svn: 174789
* Remove #includes from the commonly used LoopInfo.h.Jakub Staszak2013-02-093-0/+3
| | | | llvm-svn: 174786
* Dwarf: do not use line_table_start in at_stmt_list since we do not always emit Manman Ren2013-02-091-1/+4
| | | | | | line table entries in assembly. llvm-svn: 174785
* Remove the old liveness algorithm.Jakob Stoklund Olesen2013-02-091-308/+5
| | | | | | This is part of the plan to delete LiveVariables. llvm-svn: 174783
* Enable *BasicBlockPass::createPrinterPass()Sergei Larin2013-02-083-2/+38
| | | | | | Enables raw_ostream I/O for BasicBlockPass. llvm-svn: 174776
* Turn on -new-live-intervals by default.Jakob Stoklund Olesen2013-02-081-3/+3
| | | | | | | | This uses a liveness algorithm that does not depend on data from the LiveVariables analysis, it is the first step towards removing LiveVariables completely. llvm-svn: 174774
* R600: Dump the function name when TargetLowering::LowerCall() failsTom Stellard2013-02-081-0/+5
| | | | | | | Also output a more useful error message. NOTE: This is a candidate for the Mesa stable branch llvm-svn: 174763
* R600: rework flow creation in the structurizer v2Tom Stellard2013-02-081-177/+195
| | | | | | | | | | | | This fixes a couple of bugs and incorrect assumptions, in total four more piglit tests now pass. v2: fix small bug in the dominator updating Patch by: Christian König Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 174762
* R600: fix loop analyses in the structurizerTom Stellard2013-02-081-113/+183
| | | | | | | | | | Patch by: Christian König Intersecting loop handling was wrong. Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 174761
* R600: fix PHI value adding in the structurizerTom Stellard2013-02-081-65/+81
| | | | | | | | | | Otherwise we sometimes produce invalid code. Patch by: Christian König Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 174760
* Minor cleanup.Dan Gohman2013-02-081-1/+1
| | | | llvm-svn: 174756
* Revert "Add LLVMContext::emitWarning methods and use them. ↵Bob Wilson2013-02-087-69/+31
| | | | | | | | | | | | | <rdar://problem/12867368>" This reverts r171041. This was a nice idea that didn't work out well. Clang warnings need to be associated with warning groups so that they can be selectively disabled, promoted to errors, etc. This simplistic patch didn't allow for that. Enhancing it to provide some way for the backend to specify a front-end warning type seems like overkill for the few uses of this, at least for now. llvm-svn: 174748
* Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are theReed Kotler2013-02-082-0/+21
| | | | | | | | | | same so we put in the comment field an indicator when we think we are emitting the 16 bit version. For the direct object emitter, the difference is important as well as for other passes which need an accurate count of program size. There will be other similar putbacks to this for various instructions. llvm-svn: 174747
* DAGCombiner: Constant folding around pre-increment loads/storesHal Finkel2013-02-081-0/+89
| | | | | | | | | | | Previously, even when a pre-increment load or store was generated, we often needed to keep a copy of the original base register for use with other offsets. If all of these offsets are constants (including the offset which was combined into the addressing mode), then this is clearly unnecessary. This change adjusts these other offsets to use the new incremented address. llvm-svn: 174746
* BBVectorize: Use TTI->getAddressComputationCostHal Finkel2013-02-081-0/+5
| | | | | | | | | | | | | This is a follow-up to the cost-model change in r174713 which splits the cost of a memory operation between the address computation and the actual memory access. In r174713, this cost is always added to the memory operation cost, and so BBVectorize will do the same. Currently, this new cost function is used only by ARM, and I don't have any ARM test cases for BBVectorize. Assistance in generating some good ARM test cases for BBVectorize would be greatly appreciated! llvm-svn: 174743
* Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.Bob Wilson2013-02-083-34/+20
| | | | | | | | | | | | Aside from the question of whether we report a warning or an error when we can't satisfy a requested stack object alignment, the current implementation of this is not good. We're not providing any source location in the diagnostics and the current warning is not connected to any warning group so you can't control it. We could improve the source location somewhat, but we can do a much better job if this check is implemented in the front-end, so let's do that instead. <rdar://problem/13127907> llvm-svn: 174741
* Refine fix to bug 15041.Bill Schmidt2013-02-081-18/+17
| | | | | | | | | Thanks to help from Nadav and Hal, I have a more reasonable (and even correct!) approach. This specifically penalizes the insertelement and extractelement operations for the performance hit that will occur on PowerPC processors. llvm-svn: 174725
* [SimplifyLibCalls] Library call simplification doen't work if the call site Chad Rosier2013-02-081-1/+7
| | | | | | | | isn't using the default calling convention. However, if the transformation is from a call to inline IR, then the calling convention doesn't matter. rdar://13157990 llvm-svn: 174724
* Typos.Jakob Stoklund Olesen2013-02-081-4/+4
| | | | llvm-svn: 174723
* The patch to fix some issues in r174543 fixed the lines failing the test, ↵David Tweed2013-02-081-3/+3
| | | | | | | | | but missed a couple of lines which weren't being explicitly looked at and were printing incorrect results. These values clearly must lie within 32 bits, so the casts are definitely safe. llvm-svn: 174717
* ARM cost model: Address computation in vector mem ops not freeArnold Schwaighofer2013-02-085-10/+42
| | | | | | | | | | | | | | | Adds a function to target transform info to query for the cost of address computation. The cost model analysis pass now also queries this interface. The code in LoopVectorize adds the cost of address computation as part of the memory instruction cost calculation. Only there, we know whether the instruction will be scalarized or not. Increase the penality for inserting in to D registers on swift. This becomes necessary because we now always assume that address computation has a cost and three is a closer value to the architecture. radar://13097204 llvm-svn: 174713
* Test CommitMichael Kuperstein2013-02-081-1/+1
| | | | llvm-svn: 174709
* Parse the attribute group reference on a function.Bill Wendling2013-02-082-8/+94
| | | | | | | | | | | Attribute references are of this form: define void @foo() #0 #1 #2 { ... } Parse them for function attributes. If there's more than one reference, then they are merged together. llvm-svn: 174697
* When Mips16 frames grow large, the immediate field may exceed the maximumReed Kotler2013-02-083-10/+90
| | | | | | | | allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. llvm-svn: 174696
* Revert "Have InstCombine call SipmlifyCall when handling calls. Test case ↵Andrew Trick2013-02-081-6/+0
| | | | | | | | | | included." This reverts commit 3854a5d90fee52af1065edbed34521fff6cdc18d. This causes a clang unit test to hang: vtable-available-externally.cpp. llvm-svn: 174692
* Use ParseFnAttributeValuePairs instead of ParseOptionalFuncAttrs Bill Wendling2013-02-082-90/+50
| | | | | | | The functionality of ParseOptionalFuncAttrs was there in ParseFnAttributeValuePairs. So just use that instead. llvm-svn: 174686
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