summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* inline the two MergeableConstSection implementations into theirChris Lattner2009-07-222-25/+18
| | | | | | only caller. llvm-svn: 76710
* set the ELF "small" flag on objects that end up in .rodata.cst4 consistently,Chris Lattner2009-07-221-1/+2
| | | | | | updating a mips testcase to expect it. llvm-svn: 76707
* don't set the small flag yet.Chris Lattner2009-07-221-2/+1
| | | | llvm-svn: 76706
* remove the SelectSectionForMachineConst hook, replacing it withChris Lattner2009-07-225-44/+68
| | | | | | | | a new getSectionForMergableConstant hook. This removes one dependence of TAI on Type, and provides the hook with enough info to make the right decision based on whether the global has relocations etc. llvm-svn: 76705
* Let each target determines whether a machine instruction is dead. If true, ↵Evan Cheng2009-07-223-25/+30
| | | | | | | | that allows late codeine passes to delete it. This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround. llvm-svn: 76703
* Get rid of the Pass+Context magic.Owen Anderson2009-07-2296-733/+793
| | | | llvm-svn: 76702
* reimplement Constant::ContainsRelocations as Chris Lattner2009-07-224-47/+36
| | | | | | | | | Constant::getRelocationInfo(), which has a much simpler to use API. It still should not be part of libvmcore, but is better than it was. Also teach it to be smart about hidden visibility. llvm-svn: 76700
* Fixing cp island pass. Step 1: Determine whether the constant pool offset can beEvan Cheng2009-07-211-18/+23
| | | | | | | negative on an individual bases rather than basing on whether it's in thumb mode. llvm-svn: 76698
* Fix comment.Evan Cheng2009-07-211-1/+1
| | | | llvm-svn: 76693
* simplify code now that it is inlined.Chris Lattner2009-07-212-16/+5
| | | | llvm-svn: 76689
* Exposed PHIElimination pass within CodeGen.Lang Hames2009-07-212-74/+101
| | | | llvm-svn: 76688
* Now that RelocBehaviour() is never overloaded, it doesn't need to beChris Lattner2009-07-212-10/+10
| | | | | | | virtual. Just inline it into its two current call sites in preparation for simplifying the code. llvm-svn: 76686
* this doesn't break any of the 4 ia64 tests.Chris Lattner2009-07-212-6/+0
| | | | llvm-svn: 76683
* alpha doesn't need to redefine this: it only supports PIC codegen anyway.Chris Lattner2009-07-212-7/+0
| | | | llvm-svn: 76682
* Add some support for iterative coalescers to calculate a joined liveDavid Greene2009-07-212-2/+35
| | | | | | | | | | range's weight properly. This is turned off right now in the sense that you'll get an assert if you get into a situation that can only be caused by an iterative coalescer. All other code paths operate exactly as before so there is no functional change with this patch. The asserts should be disabled if/when an iterative coalescer gets added to trunk. llvm-svn: 76680
* no really, I can spell!Chris Lattner2009-07-212-3/+3
| | | | llvm-svn: 76679
* add an API so target-independent codegen can determine if a constantChris Lattner2009-07-212-1/+27
| | | | | | | | pool entry will require relocations against it. I implemented this conservatively for ARM, someone who is knowledgable about it should see if this can be improved. llvm-svn: 76678
* Convert instcombine from using using getAnalysis<TargetData> toDan Gohman2009-07-211-46/+62
| | | | | | getAnalysisIfAvailable<TargetData>. llvm-svn: 76676
* Permit the IntPtrTy argument to isEliminableCastPair to be null,Dan Gohman2009-07-211-0/+4
| | | | | | to help support use when TargetData is not available. llvm-svn: 76675
* Change ELFCodeEmitter logic to emit the constant pool and jump tables toBruno Cardoso Lopes2009-07-212-27/+29
| | | | | | | | their appropriate sections before the code itself. They need to be emitted before the function because on some targets (x86 but not x86_64) the later may reference a JT or CP entry address llvm-svn: 76672
* Replace the original ad-hoc code for determining whether (v pred w) impliesDan Gohman2009-07-211-104/+197
| | | | | | | | (x pred y) with more thorough code that does more complete canonicalization before resorting to range checks. This helps it find more cases where the canonicalized expressions match. llvm-svn: 76671
* remove the last bits of SectionFlagsForGlobal. There is some flag here thatChris Lattner2009-07-212-30/+2
| | | | | | | | | depends on XS1A, but I think the ReadOnlySection is already set up for this and there is no testcase that this breaks. If this is really needed, we can add the appropriate parameterization to TargetAsmInfo in the future to support this. llvm-svn: 76667
* don't mask out the small flag and then reapply it later.Chris Lattner2009-07-211-15/+1
| | | | llvm-svn: 76666
* if Xcore doesn't support TLS, it doesn't have to worry about thread local ↵Chris Lattner2009-07-211-1/+1
| | | | | | LLVM IR, it should be rejected by a front-end. llvm-svn: 76665
* remove the Xcore implementation of SelectSectionForGlobal. While you haveChris Lattner2009-07-212-22/+0
| | | | | | to twist your brain to see it, I believe it is the same as ELFTargetAsmInfo::SelectSectionForGlobal. llvm-svn: 76664
* simplify based on the fact that darwin always uses L/l.Chris Lattner2009-07-211-8/+4
| | | | llvm-svn: 76662
* make some stuff private.Chris Lattner2009-07-211-10/+3
| | | | llvm-svn: 76661
* Remove the XCore custom implementation of MergeableConstSection, relying onChris Lattner2009-07-212-18/+0
| | | | | | | | the generic ELF version instead. This will result in its mergable constant sections getting named ".rodata.cst4" instead of ".cp.const4", but the linker looks at the section flags, not the name of the section AFAICT. llvm-svn: 76659
* inline a trivial method into its only call site and fix indentation of casesChris Lattner2009-07-211-21/+16
| | | | llvm-svn: 76654
* Remove some overridden functions in XCoreTargetAsmInfo that areChris Lattner2009-07-213-70/+5
| | | | | | | implemented exactly the same way as its ELFTargetAsmInfo subclass has them. llvm-svn: 76653
* revert r76602, 76603, and r76615, pending design discussions.Chris Lattner2009-07-213-11/+13
| | | | llvm-svn: 76646
* minor cleanups.Chris Lattner2009-07-211-16/+10
| | | | llvm-svn: 76645
* Privatize the ConstantArray table.Owen Anderson2009-07-214-126/+159
| | | | llvm-svn: 76639
* Missed a piece of the commit to remove the shift flavor.Eli Friedman2009-07-211-1/+0
| | | | llvm-svn: 76635
* Privatize the first of the value maps.Owen Anderson2009-07-214-46/+329
| | | | llvm-svn: 76634
* Remove shift amount flavor. It isn't actually complete enough to Eli Friedman2009-07-214-5/+0
| | | | | | | | be useful, and it's currently unused. (Some issues: it isn't actually rich enough to capture the semantics on many architectures, and semantics can vary depending on the type being shifted.) llvm-svn: 76633
* Remove a couple of already-implemented notes.Eli Friedman2009-07-211-12/+0
| | | | llvm-svn: 76631
* Prefix IR dumps with LiveInterval indices when possible. This turnsDavid Greene2009-07-211-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this: %ESI<def> = MOV32rr %EDI<kill> ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use> %reg1027<def> = MOVZX64rr32 %ESI %reg1027<def> = ADD64ri8 %reg1027, 15, %EFLAGS<imp-def,dead> %reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead> %RDI<def> = MOV64rr %RSP %RDI<def> = SUB64rr %RDI, %reg1027<kill>, %EFLAGS<imp-def,dead> %RSP<def> = MOV64rr %RDI into this: 4 %reg1024<def> = MOV32rr %EDI<kill> 12 ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use> 20 %reg1025<def> = MOVZX64rr32 %reg1024 28 %reg1026<def> = MOV64rr %reg1025<kill> 36 %reg1026<def> = ADD64ri8 %reg1026, 15, %EFLAGS<imp-def,dead> 44 %reg1027<def> = MOV64rr %reg1026<kill> 52 %reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead> 60 %reg1028<def> = MOV64rr %RSP 68 %reg1029<def> = MOV64rr %reg1028<kill> 76 %reg1029<def> = SUB64rr %reg1029, %reg1027<kill>, %EFLAGS<imp-def,dead> 84 %RSP<def> = MOV64rr %reg1029 This helps greatly when debugging register allocation and coalescing problems. llvm-svn: 76615
* Add fake v7 itineraries for now.Evan Cheng2009-07-213-4/+40
| | | | llvm-svn: 76612
* make AsmPrinter::doFinalization iterate over the global variablesChris Lattner2009-07-2117-188/+105
| | | | | | | and call PrintGlobalVariable, allowing elimination and simplification of various targets. llvm-svn: 76604
* Add PrefixPrinter arguments to the dump routines for MachineFunction andDavid Greene2009-07-212-4/+9
| | | | | | MachineBasicBlock. We'll use these shortly. llvm-svn: 76603
* Do not select tSXTB / tSXTH in thumb2 mode.Evan Cheng2009-07-211-4/+4
| | | | llvm-svn: 76600
* Rename getConstantInt{True|False} to get{True|False} at Chris' behest.Owen Anderson2009-07-2113-126/+126
| | | | llvm-svn: 76598
* reduce indentation by using an early exit.Chris Lattner2009-07-211-73/+68
| | | | llvm-svn: 76596
* Update CMake files.Ted Kremenek2009-07-213-5/+7
| | | | llvm-svn: 76595
* whitespace cleanups, make the MipsAsmPrinter::doInitializationChris Lattner2009-07-211-14/+8
| | | | | | | | chain to the super class instead of initializing mangler directly. This gives it .file and module level inline asm support among other things. llvm-svn: 76593
* fix Sparc, SystemZ, and MSP430 to not override AsmPrinter::doInitialization.Chris Lattner2009-07-213-22/+0
| | | | | | | This eliminates redundancy setting up the mangler and adds support to them for module-level inline asm and a .file directive. llvm-svn: 76592
* Rename LessPrivateGlobalPrefix -> LinkerPrivateGlobalPrefix to match theChris Lattner2009-07-218-11/+13
| | | | | | LLVM IR concept. llvm-svn: 76590
* fix indentationChris Lattner2009-07-211-16/+16
| | | | llvm-svn: 76587
* remove an unneeded override.Chris Lattner2009-07-211-5/+0
| | | | llvm-svn: 76586
OpenPOWER on IntegriCloud