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* [DAG] Teach how to combine a pair of shuffles into a single shuffle if the ↵Andrea Di Biagio2014-07-081-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | resulting mask is legal. This patch teaches how to fold a shuffle according to rule: shuffle (shuffle (x, undef, M0), undef, M1) -> shuffle(x, undef, M2) We do this only if the resulting mask M2 is legal; this is to avoid introducing illegal shuffles that are potentially expanded into a sub-optimal sequence of target specific dag nodes. This patch has the advantage of being target independent, since it works on ISD nodes. Therefore, all targets (not only x86) can take advantage of this rule. The idea behind this patch is that most shuffle pairs can be safely combined before we run the legalizer on vector operations. This allows us to combine/simplify dag nodes earlier in the process and not only immediately before instruction selection stage. That said. This patch is not meant to replace any existing target specific combine rules; backends might still introduce new shuffles during legalization stage. Also, this rule is very simple and avoids to aggressively optimize shuffles. llvm-svn: 212539
* Fix some Twine locals.Benjamin Kramer2014-07-083-17/+18
| | | | | | Two of those are use after frees. Found by clang-tidy, fixed by me. llvm-svn: 212537
* [ASan/Win] Don't instrument private COMDAT globals until PR20244 is properly ↵Timur Iskhodzhanov2014-07-081-0/+7
| | | | | | fixed llvm-svn: 212530
* [mips] Fixed struct/class mismatch introduced in r212522.Daniel Sanders2014-07-081-1/+1
| | | | | | Clang emits a warning about this. llvm-svn: 212528
* Fix r212522 - [mips] Improve encapsulation of the .MIPS.abiflags ↵Daniel Sanders2014-07-081-0/+3
| | | | | | | | implementation and limit scope of related enums Added two lines that should have been in r212522. llvm-svn: 212523
* [mips] Improve encapsulation of the .MIPS.abiflags implementation and limit ↵Daniel Sanders2014-07-087-298/+353
| | | | | | | | | | | | | | | scope of related enums Summary: Follow on to r212519 to improve the encapsulation and limit the scope of the enums. Also merged two very similar parser functions, fixed a bug where ASE's were not being reported, and marked CPR1's as being 128-bit when MSA is enabled. Differential Revision: http://reviews.llvm.org/D4384 llvm-svn: 212522
* Revert "Refactor ARM subarchitecture parsing"Renato Golin2014-07-082-101/+82
| | | | | | This reverts commit 7b4a6882467e7fef4516a0cbc418cbfce0fc6f6d. llvm-svn: 212521
* Truncate the immediate in logical operation to the register widthArnaud A. de Grandmaison2014-07-081-2/+7
| | | | | | And continue to produce an error if the 32 most significant bits are not all ones or zeros. llvm-svn: 212520
* Mips.abiflags is a new implicitly generated section that will be present on ↵Vladimir Medic2014-07-086-65/+528
| | | | | | all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it. llvm-svn: 212519
* [x86,SDAG] Sink the logic for folding shuffles of splats moreChandler Carruth2014-07-082-46/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | aggressively from the x86 shuffle lowering to the generic SDAG vector shuffle formation code. This code already tried to fold away shuffles of splats! It just had lots of bugs and couldn't handle the case my new x86 shuffle lowering needed. First, it failed to correctly compute whether N2 was undef because it pre-computed this, then did transformations which could *make* N2 undef, then failed to ever re-consider the precomputed state. Second, it didn't look through bitcasts at all, even in the safe cases where they are just element-type bitcasts with no change to the number of elements. Third, it didn't handle all-zero bit casts nicely the way my code in the x86 side of things did, which is essential to getting good zext-shuffle lowerings. But all of these are generic. I just ported the code down to this layer and fixed the surrounding bugs. Tests exercising this in the x86 backend still pass and some silly code in widen_cast-6.ll gets better. I updated that test to be a bit more precise but it's still pretty unclear what the value of the test is in this day and age. llvm-svn: 212517
* [SDAG] Actually check for a non-constant splat and clarify commentsChandler Carruth2014-07-081-4/+8
| | | | | | | | | | | | | | around the handling of UNDEF lanes in boolean vector content analysis. The code before my changes here also failed to check for non-constant splats in a buildvector. I have no idea how to trigger this, I just spotted by inspection when trying to understand the code. It seems extremely unlikely to be worth the trouble to teach the only caller of this code (DAG combining setcc patterns) how to cleverly handle undef lanes, so I've just commented more thoroughly that we're giving up there. llvm-svn: 212515
* [SDAG] Build up a more rich set of APIs for querying build-vector SDAGChandler Carruth2014-07-083-13/+47
| | | | | | | | | | | | | | | | | | | | nodes about whether they are splats. This is factored out and improved from r212324 which got reverted as it was far too aggressive. The new API should help more conservatively handle buildvectors that are a mixture of splatted and undef values. No functionality change at this point. The hope is to slowly re-introduce the undef-tolerant optimization of splats, but each time being forced to make a concious decision about how to handle the undefs in a way that doesn't lead to contradicting assumptions about the collapsed value. Hal has pointed out in discussions that this may not end up being the desired API and instead it may be more convenient to get a mask of the undef elements or something similar. I'm starting simple and will expand the API as I adapt actual callers and see exactly what they need. llvm-svn: 212514
* [ASan] Completely remove sanitizer blacklist file from instrumentation pass.Alexey Samsonov2014-07-081-17/+5
| | | | | | | | | | | | | | | | | | | | All blacklisting logic is now moved to the frontend (Clang). If a function (or source file it is in) is blacklisted, it doesn't get sanitize_address attribute and is therefore not instrumented. If a global variable (or source file it is in) is blacklisted, it is reported to be blacklisted by the entry in llvm.asan.globals metadata, and is not modified by the instrumentation. The latter may lead to certain false positives - not all the globals created by Clang are described in llvm.asan.globals metadata (e.g, RTTI descriptors are not), so we may start reporting errors on them even if "module" they appear in is blacklisted. We assume it's fine to take such risk: 1) errors on these globals are rare and usually indicate wild memory access 2) we can lazily add descriptors for these globals into llvm.asan.globals lazily. llvm-svn: 212505
* [X86] AVX512: Only allow k1-k7 as predicates to vpcmp*Adam Nemet2014-07-081-7/+7
| | | | | | | | | As destination k0 is allowed but not as predicate/writemask. I also modified the test to allow checking of error messages by the assembler. I applied a similar approach to the test ret.s in the same directory. llvm-svn: 212504
* Kill unnecessary includeAlexey Samsonov2014-07-081-1/+0
| | | | llvm-svn: 212503
* [x86] Fix assertion failure caused by a wrong combine of PSHUFD nodes with ↵Andrea Di Biagio2014-07-071-1/+1
| | | | | | | | | | | | | | | | | | | | different types. When combining a sequence of two PSHUFD dag nodes into a single PSHUFD, make sure that we assign the correct type to the resulting PSHUFD. X86ISD::PSHUFD dag nodes can be either MVT::v4i32 or MVT::v4f32. Before this change, an assertion failure was triggered in method 'DAGCombinerInfo::CombineTo' when trying to combine the shuffles from the test below into a single PSHUFD. define <4 x float> @test1(<4 x float> %V) { %1 = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> ret <4 x float> %2 } llvm-svn: 212498
* fixed some typosSanjay Patel2014-07-071-4/+4
| | | | llvm-svn: 212495
* [FastISel][X86] Fix smul.with.overflow.i8 lowering.Juergen Ributzka2014-07-071-3/+19
| | | | | | | | | | | Add custom lowering code for signed multiply instruction selection, because the default FastISel instruction selection for ISD::MUL will use unsigned multiply for the i8 type and signed multiply for all other types. This would set the incorrect flags for the overflow check. This fixes <rdar://problem/17549300> llvm-svn: 212493
* Allow AArch64FastISel to degrade graceully in the presence of an MVT::i128Louis Gerbarg2014-07-071-0/+6
| | | | | | | | | | | | | | | | | Currently AArch64FastISel crashes if it tries to extend an integer into an MVT::i128. This can happen by creating 128 bit integers like so: typedef unsigned int uint128_t __attribute__((mode(TI))); typedef int sint128_t __attribute__((mode(TI))); This patch makes EmitIntExt check for their presence and then falls back to SelectionDAG. Tests included. rdar://17516686 llvm-svn: 212492
* Fix for PR17073 ( http://llvm.org/pr17073 ), simplifycfg illegally hoists an ↵Sanjay Patel2014-07-071-3/+20
| | | | | | | | | | operation in a phi node that can trap. This patch adds to an existing loop over phi nodes in SimplifyCondBranchToCondBranch() to check for trapping ops and bails out of the optimization if we find one of those. The test cases verify that trapping ops are not hoisted and non-trapping ops are still optimized as expected. llvm-svn: 212490
* Refactor ARM subarchitecture parsingRenato Golin2014-07-072-82/+101
| | | | | | | | | According to a FIXME in ARMMCTargetDesc.cpp the ARM version parsing should be in the Triple helper class. Patch by: Gabor Ballabas llvm-svn: 212479
* [PowerPC] Fix no-assert buildUlrich Weigand2014-07-071-0/+1
| | | | | | | r212476 caused a compile failure (unused variable) in a non-assertion build ... llvm-svn: 212477
* [PowerPC] Fix "byval align" argumentsUlrich Weigand2014-07-071-67/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | Arguments passed as "byval align" should get the specified alignment in the parameter save area. There was some code in PPCISelLowering.cpp that attempted to implement this, but this didn't work correctly: while code did update the ArgOffset value, it neglected to update the PtrOff value (which was already computed from the old ArgOffset), and it also neglected to update GPR_idx -- fields skipped due to alignment in the save area must likewise be skipped in GPRs. This patch fixes and simplifies this logic by: - handling argument offset alignment right at the beginning of argument processing, using a new helper routine CalculateStackSlotAlignment (this avoids having to update PtrOff and other derived values later on) - not tracking GPR_idx separately, but always computing the correct GPR_idx for each argument *from* its ArgOffset - removing some redundant computation in LowerFormalArguments: MinReservedArea must equal ArgOffset after argument processing, so there's no use in computing it twice. [This doesn't change the behavior of the current clang front-end, since that never creates "byval align" arguments at the moment. This will change with a follow-on patch, however.] llvm-svn: 212476
* [x86] Revert r212324 which was too aggressive w.r.t. allowing undefChandler Carruth2014-07-074-120/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lanes in vector splats. The core problem here is that undef lanes can't *unilaterally* be considered to contribute to splats. Their handling needs to be more cautious. There is also a reported failure of the nightly testers (thanks Tobias!) that may well stem from the same core issue. I'm going to fix this theoretical issue, factor the APIs a bit better, and then verify that I don't see anything bad with Tobias's reduction from the test suite before recommitting. Original commit message for r212324: [x86] Generalize BuildVectorSDNode::getConstantSplatValue to work for any constant, constant FP, or undef splat and to tolerate any undef lanes in a splat, then replace all uses of isSplatVector in X86's lowering with it. This fixes issues where undef lanes in an otherwise splat vector would prevent the splat logic from firing. It is a touch more awkward to use this interface, but it is much more accurate. Suggestions for better interface structuring welcome. With this fix, the code generated with the widening legalization strategy for widen_cast-4.ll is *dramatically* improved as the special lowering strategies for a v16i8 SRA kick in even though the high lanes are undef. We also get a slightly different choice for broadcasting an aligned memory location, and use vpshufd instead of vbroadcastss. This looks like a minor win for pipelining and domain crossing, but a minor loss for the number of micro-ops. I suspect its a wash, but folks can easily tweak the lowering if they want. llvm-svn: 212475
* R600: Fix mishandling of load / store chains.Matt Arsenault2014-07-073-36/+90
| | | | | | | | Fixes various bugs with reordering loads and stores. Scalarized vector loads weren't collecting the chains at all. llvm-svn: 212473
* Fix typo, weird indentationMatt Arsenault2014-07-071-2/+4
| | | | llvm-svn: 212472
* Make helper functions static.Benjamin Kramer2014-07-073-5/+5
| | | | llvm-svn: 212460
* X86: revert unintentional change to X86FastISel.Tim Northover2014-07-071-1/+1
| | | | | | This crept in with r212443. llvm-svn: 212459
* [asan] Generate asm instrumentation in MC.Evgeniy Stepanov2014-07-071-63/+308
| | | | | | | | | Generate entire ASan asm instrumentation in MC without relying on runtime helper functions. Patch by Yuri Gorshenin. llvm-svn: 212455
* [msan] Fix handling of phi in blacklisted functions.Evgeniy Stepanov2014-07-071-2/+5
| | | | llvm-svn: 212454
* InstCombine: Simplify code, no functionality change.Benjamin Kramer2014-07-071-16/+2
| | | | llvm-svn: 212449
* [x86] Teach the new vector shuffle lowering code to handle what isChandler Carruth2014-07-071-0/+41
| | | | | | | | | | | | | | | | | | essentially a DAG combine that never gets a chance to run. We might typically expect DAG combining to remove shuffles-of-splats and other similar patterns, but we don't get a chance to run the DAG combiner when we recursively form sub-shuffles during the lowering of a shuffle. So instead hand-roll a really important combine directly into the lowering code to detect shuffles-of-splats, especially shuffles of an all-zero splat which needn't even have the same element width, etc. This lets the new vector shuffle lowering handle shuffles which implement things like zero-extension really nicely. This will become even more important when I wire the legalization of zero-extension to vector shuffles with the new widening legalization strategy. llvm-svn: 212444
* CodeGen: it turns out that NAND is not the same thing as BIC. At all.Tim Northover2014-07-072-2/+2
| | | | | | | | | | | We've been performing the wrong operation on ARM for "atomicrmw nand" for years, since "a NAND b" is "~(a & b)" rather than ARM's very tempting "a & ~b". This bled over into the generic expansion pass. So I assume no-one has ever actually tried to do an atomic nand in the real world. Oh well. llvm-svn: 212443
* ARM: properly lower dllimport'ed global valuesSaleem Abdulrasool2014-07-071-2/+23
| | | | | | | | | | | | | | This completes the handling for DLL import storage symbols when lowering instructions. A DLL import storage symbol must have an additional load performed prior to use. This is applicable to variables and functions. This is particularly important for non-function symbols as it is possible to handle function references by emitting a thunk which performs the translation from the unprefixed __imp_ symbol to the proper symbol (although, this is a non-optimal lowering). For a variable symbol, no such thunk can be accommodated. llvm-svn: 212431
* ARM: correctly mangle dllimport symbolsSaleem Abdulrasool2014-07-072-17/+40
| | | | | | | | Add support for tracking DLLImport storage class information on a per symbol basis in the ARM instruction selection. Use that information to correctly mangle the symbol (dllimport symbols are referenced via *__imp_<name>). llvm-svn: 212430
* ARM: unify symbol name retrievalSaleem Abdulrasool2014-07-071-5/+8
| | | | | | | | | | | Ensure that all paths that retrieve the symbol name go through GetARMGVSymbol rather than getSymbol. This is desirable so that any global symbol mangling can be centralised to this function. The motivation for this is handling of symbols that are marked as having dll import dll storage. Such a symbol requires an extra load that is currently handled in the backend and a __imp_ prefix on the symbol name. llvm-svn: 212429
* [AArch64] Normalize all constants to build a vector.Kevin Qin2014-07-071-1/+27
| | | | | | The value of constant operands will be truncated to fit element width. llvm-svn: 212428
* fixed typos in commentsSanjay Patel2014-07-061-2/+2
| | | | llvm-svn: 212424
* fixed some typos in commentsSanjay Patel2014-07-061-4/+4
| | | | llvm-svn: 212423
* AArch64: whitespace cleanupSaleem Abdulrasool2014-07-061-1/+1
| | | | llvm-svn: 212420
* Update the MemoryBuffer API to use ErrorOr.Rafael Espindola2014-07-0617-147/+148
| | | | llvm-svn: 212405
* This only needs a StringRef.Rafael Espindola2014-07-062-11/+11
| | | | llvm-svn: 212402
* This only needs a StringRef.Rafael Espindola2014-07-062-16/+14
| | | | llvm-svn: 212401
* SourceMgr: make valid buffer IDs start from oneAlp Toker2014-07-067-48/+50
| | | | | | | | | | Use 0 for the invalid buffer instead of -1/~0 and switch to unsigned representation to enable more idiomatic usage. Also introduce a trivial SourceMgr::getMainFileID() instead of hard-coding 0/1 to identify the main file. llvm-svn: 212398
* Use cast<> instead of dyn_cast + assertMatt Arsenault2014-07-051-2/+1
| | | | llvm-svn: 212380
* Fix grammarMatt Arsenault2014-07-051-1/+1
| | | | llvm-svn: 212379
* This only needs a StringRef. No functionality change.Rafael Espindola2014-07-051-1/+2
| | | | llvm-svn: 212371
* MC: make MCSymbolData::dump work on const objectsDavid Majnemer2014-07-051-1/+1
| | | | | | | This just lets us dump a const MCSymbolData object, no functionality changed. llvm-svn: 212365
* Make a helper function static. No functionality change.Rafael Espindola2014-07-051-3/+2
| | | | llvm-svn: 212364
* MC: Correct comment in ExportSymbolDavid Majnemer2014-07-041-1/+1
| | | | | | | No functionality changed, just make it so that the code _could_ be uncommented. llvm-svn: 212363
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