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* Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInstNick Lewycky2013-05-081-5/+2
| | | | | | by switching to a ValueMap. Patch by Andrea DiBiagio! llvm-svn: 181397
* DAGCombiner: Simplify inverted bit testsDavid Majnemer2013-05-081-0/+9
| | | | | | | | Fold (xor (and x, y), y) -> (and (not x), y) This removes an opportunity for a constant to appear twice. llvm-svn: 181395
* Debug Info: Support DW_TAG_imported_declarationDavid Blaikie2013-05-081-1/+3
| | | | | | | | | | | | | | This provides basic functionality for imported declarations. For subprograms and types some amount of lazy construction is supported (so the definition of a function can proceed the using declaration), but it still doesn't handle declared-but-not-defined functions (since we don't generally emit function declarations). Variable support is really rudimentary at the moment - simply looking up the existing definition with no support for out of order (declaration, imported_module, then definition). llvm-svn: 181392
* Finish renaming constructImportedModuleDIE to constructImportedEntityDIEDavid Blaikie2013-05-082-7/+7
| | | | llvm-svn: 181391
* Pass the MDNode in and do the insertion at compile unit creation timeEric Christopher2013-05-083-7/+7
| | | | | | instead of relying upon an extra call to finish initializing. llvm-svn: 181383
* Typo.Eric Christopher2013-05-081-2/+2
| | | | llvm-svn: 181378
* LoopVectorizer: Improve reduction variable identificationArnold Schwaighofer2013-05-071-84/+132
| | | | | | | The two nested loops were confusing and also conservative in identifying reduction variables. This patch replaces them by a worklist based approach. llvm-svn: 181369
* Fix a bug in the MC asm parser evaluating expressions. It was treating:Kevin Enderby2013-05-071-1/+1
| | | | | | | | | A = 9 B = 3 * A - 2 * A + 1 as B = 3 * A - (2 * A + 1) rdar://13816516 llvm-svn: 181366
* Rename DIImportedModule to DIImportedEntity and allow imported declarationsDavid Blaikie2013-05-074-25/+49
| | | | | | | | | DIBuilder::createImportedDeclaration isn't fully plumbed through (note, lacking in AsmPrinter/DwarfDebug support) but this seemed like a sufficiently useful division of code to make the subsequent patch(es) easier to follow. llvm-svn: 181364
* MCStreamer: Also clear vector of W64UnwindInfos on reset().Charles Davis2013-05-071-0/+1
| | | | | | Patch by Kai Nacke! llvm-svn: 181363
* Remove redundant check and use cached FrameArray values.Bob Wilson2013-05-071-12/+8
| | | | | | No functional change. llvm-svn: 181355
* Remove exception handling support from the old JIT.Rafael Espindola2013-05-075-670/+1
| | | | llvm-svn: 181354
* Fix vselect when getSetCCResultType returns a different type from the operandsMatt Arsenault2013-05-071-3/+8
| | | | llvm-svn: 181348
* Corrected Atom latencies for SSE SQRT instructions.Preston Gurd2013-05-073-19/+36
| | | | llvm-svn: 181346
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-077-2/+199
| | | | llvm-svn: 181344
* Debug Info: Fix for break due to r181271David Blaikie2013-05-071-0/+1
| | | | | | | | | Apparently we didn't keep an association of Compile Unit metadata nodes to DIEs so looking up that parental context failed & thus caused no DW_TAG_imported_modules to be emitted at the CU scope. Fix this by adding the mapping & sure up the test case to verify this. llvm-svn: 181339
* Cleanup PPCInstrInfo::optimizeCompareInstrHal Finkel2013-05-071-14/+10
| | | | | | | Implement suggestions by Bill Schmidt in post-commit review. No functionality change intended. llvm-svn: 181338
* Reverting r181331.Jyotsna Verma2013-05-076-196/+3
| | | | | | Missing file, HexagonSplitConst32AndConst64.cpp, from lib/Target/Hexagon/CMakeLists.txt. llvm-svn: 181334
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-076-3/+196
| | | | llvm-svn: 181331
* Hexagon: Set accessSize and addrMode on all load/store instructions.Jyotsna Verma2013-05-074-68/+125
| | | | llvm-svn: 181324
* Re-enable AVX detection on x64 platforms.Michael Kuperstein2013-05-071-1/+2
| | | | llvm-svn: 181313
* [SystemZ] Fix InitMCCodeGenInfo callRichard Sandiford2013-05-071-2/+2
| | | | | | | | createSystemZMCCodeGenInfo was not passing the optimization level to InitMCCodeGenInfo(), so -O0 would be ignored. Fixes DebugInfo/namespace.ll after the changes in r181271. llvm-svn: 181312
* Fix the VS2010 build broken by r181271Timur Iskhodzhanov2013-05-071-1/+2
| | | | llvm-svn: 181296
* LoopVectorize: getConsecutiveVector must respect signed arithmeticArnold Schwaighofer2013-05-071-5/+6
| | | | | | | | | | We were passing an i32 to ConstantInt::get where an i64 was needed and we must also pass the sign if we pass negatives numbers. The start index passed to getConsecutiveVector must also be signed. Should fix PR15882. llvm-svn: 181286
* DebugInfo: Support imported modules in lexical blocksDavid Blaikie2013-05-063-6/+55
| | | | llvm-svn: 181271
* R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcodeTom Stellard2013-05-062-1/+14
| | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 181269
* R600/SI: Handle arbitrary destination type in SITargetLowering::adjustWritemaskTom Stellard2013-05-061-1/+1
| | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 181268
* R600/SI: Add intrinsic for texture image loadingTom Stellard2013-05-063-10/+46
| | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 181267
* R600/SI: Add pattern for uint_to_fpTom Stellard2013-05-061-1/+3
| | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 181266
* R600/SI: Add patterns for integer maxima / minimaTom Stellard2013-05-061-4/+12
| | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 181265
* R600/SI: Add pattern for AMDGPU.trunc intrinsicTom Stellard2013-05-061-1/+3
| | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 181263
* Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek2013-05-066-17/+79
| | | | llvm-svn: 181255
* Implemented public interface for modifying registered (not positional or ↵Andrew Trick2013-05-061-0/+10
| | | | | | | | sink options) command line options at runtime. Patch by Dan Liew! llvm-svn: 181254
* Support command line option categories.Andrew Trick2013-05-061-20/+198
| | | | | | Patch by Dan Liew! llvm-svn: 181253
* Cleanup of the HexagonTargetMachine setup.Krzysztof Parzyszek2013-05-061-29/+34
| | | | llvm-svn: 181250
* InstCombine: (X ^ signbit) + C -> X + (signbit ^ C)David Majnemer2013-05-061-0/+5
| | | | llvm-svn: 181249
* Hoist boundary condition out of loop header.Eric Christopher2013-05-061-1/+2
| | | | llvm-svn: 181248
* Untabify.Eric Christopher2013-05-061-5/+5
| | | | llvm-svn: 181247
* Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma2013-05-066-407/+307
| | | | llvm-svn: 181235
* Make references to HexagonTargetMachine "const".Krzysztof Parzyszek2013-05-066-25/+26
| | | | llvm-svn: 181233
* Rotate multi-exit loops even if the latch was simplified.Andrew Trick2013-05-061-14/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test case by Michele Scandale! Fixes PR10293: Load not hoisted out of loop with multiple exits. There are few regressions with this patch, now tracked by rdar:13817079, and a roughly equal number of improvements. The regressions are almost certainly back luck because LoopRotate has very little idea of whether rotation is profitable. Doing better requires a more comprehensive solution. This checkin is a quick fix that lacks generality (PR10293 has a counter-example). But it trivially fixes the case in PR10293 without interfering with other cases, and it does satify the criteria that LoopRotate is a loop canonicalization pass that should avoid heuristics and special cases. I can think of two approaches that would probably be better in the long run. Ultimately they may both make sense. (1) LoopRotate should check that the current header would make a good loop guard, and that the loop does not already has a sufficient guard. The artifical SimplifiedLoopLatch check would be unnecessary, and the design would be more general and canonical. Two difficulties: - We need a strong guarantee that we won't endlessly rotate, so the analysis would need to be precise in order to avoid the SimplifiedLoopLatch precondition. - Analysis like this are usually based on SCEV, which we don't want to rely on. (2) Rotate on-demand in late loop passes. This could even be done by shoving the loop back on the queue after the optimization that needs it. This could work well when we find LICM opportunities in multi-branch loops. This requires some work, and it doesn't really solve the problem of SCEV wanting a loop guard before the analysis. llvm-svn: 181230
* R600: Remove dead code from the CodeEmitter v2Tom Stellard2013-05-063-400/+64
| | | | | | | | | v2: - Replace switch statement with TSFlags query Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> llvm-svn: 181229
* R600: Emit config values in register / value pairsTom Stellard2013-05-062-3/+55
| | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> llvm-svn: 181228
* Remove unnecessary instance variable and rework logic accordingly.Eric Christopher2013-05-062-8/+5
| | | | llvm-svn: 181227
* Grammar.Eric Christopher2013-05-061-1/+2
| | | | llvm-svn: 181226
* R600: Stop emitting the instruction type byte before each instructionTom Stellard2013-05-061-33/+2
| | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> llvm-svn: 181225
* Don't emit .dwo sections unless they exist.Eric Christopher2013-05-061-24/+30
| | | | llvm-svn: 181224
* R600: Emit ISA for CALL_FS_* instructionsTom Stellard2013-05-061-1/+0
| | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> llvm-svn: 181223
* [SystemZ] Update non-pic DWARF encodingsUlrich Weigand2013-05-061-6/+13
| | | | | | | | | | | | As pointed out by Rafael Espindola, we should match the DWARF encodings produced by GCC in both pic and non-pic modes. This was not the case for the non-pic case. This patch changes all DWARF encodings to DW_EH_PE_absptr for the non-pic case, just like GCC does. The test case is updated to check for both variants. llvm-svn: 181222
* PowerPC: Fix unimplemented relocation on ppc64Adhemerval Zanella2013-05-061-0/+5
| | | | | | | This patch handles the R_PPC64_REL64 relocation type for powerpc64 for mcjit. llvm-svn: 181220
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