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llvm-svn: 98648
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instructions for ld/st with writeback, the flag is completely redundant.
llvm-svn: 98643
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llvm-svn: 98642
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U test/CodeGen/ARM/tls2.ll
U test/CodeGen/ARM/arm-negative-stride.ll
U test/CodeGen/ARM/2009-10-30.ll
U test/CodeGen/ARM/globals.ll
U test/CodeGen/ARM/str_pre-2.ll
U test/CodeGen/ARM/ldrd.ll
U test/CodeGen/ARM/2009-10-27-double-align.ll
U test/CodeGen/Thumb2/thumb2-strb.ll
U test/CodeGen/Thumb2/ldr-str-imm12.ll
U test/CodeGen/Thumb2/thumb2-strh.ll
U test/CodeGen/Thumb2/thumb2-ldr.ll
U test/CodeGen/Thumb2/thumb2-str_pre.ll
U test/CodeGen/Thumb2/thumb2-str.ll
U test/CodeGen/Thumb2/thumb2-ldrh.ll
U utils/TableGen/TableGen.cpp
U utils/TableGen/DisassemblerEmitter.cpp
D utils/TableGen/RISCDisassemblerEmitter.h
D utils/TableGen/RISCDisassemblerEmitter.cpp
U Makefile.rules
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/Makefile
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D lib/Target/ARM/Disassembler
U lib/Target/ARM/ARMInstrFormats.td
U lib/Target/ARM/ARMAddressingModes.h
U lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm-svn: 98640
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(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.
We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60.
And modified test cases to not expect '+' in +reg or #+num. For example,
; CHECK: ldr.w r9, [r7, #28]
llvm-svn: 98637
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This does not move entirely to UAL syntax, since the default "increment after"
suffix is empty but we still use "IA" for that.
llvm-svn: 98635
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llvm-svn: 98616
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with the integrated assembler!
llvm-svn: 98615
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llvm-svn: 98612
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llvm-svn: 98604
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"used outside of the block". If the block ends in a return, then it won't be
used outside of it.
llvm-svn: 98599
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llvm-svn: 98596
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to LLVM IR changes with addr label weirdness. In the testcase, we
generate references to the two bb's when codegen'ing the first
function:
_test1: ## @test1
leaq Ltmp0(%rip), %rax
..
leaq Ltmp1(%rip), %rax
Then continue to codegen the second function where the blocks
get merged. We're now smart enough to emit both labels, producing
this code:
_test_fun: ## @test_fun
## BB#0: ## %entry
Ltmp1: ## Block address taken
Ltmp0:
## BB#1: ## %ret
movl $-1, %eax
ret
Rejoice.
llvm-svn: 98595
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- Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
- This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.
llvm-svn: 98592
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32-bit indices. Instead of shuffling each element out of the index vector,
when all indices are needed, just store the input vector to the stack and
load the elements out.
llvm-svn: 98588
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Radar 7459078.
llvm-svn: 98586
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llvm-svn: 98584
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external relocations, but we don't have x86_64 relocations yet).
llvm-svn: 98583
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llvm-svn: 98582
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llvm-svn: 98581
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section, remove the target-specific code that performs this.
llvm-svn: 98580
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label is generated, but then the block is deleted. Since the
value is undefined, we just emit the label right after the entry
label of the function. It might matter that the label is in the
same section as the function was afterall.
llvm-svn: 98579
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llvm-svn: 98578
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llvm-svn: 98577
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pointer. If given, the structure will be set with the stat information from
the file actually read.
llvm-svn: 98575
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DAG nodes.
This is a work in progress. Patch by Dale Johannesen!
llvm-svn: 98568
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function, then the BB is RAUW'd before the definition is emitted. There
are still two cases not being handled, but this should improve us back to
the situation before I touched anything.
llvm-svn: 98566
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value intrinsics are present in this bb. Use terminator to find return instructions.
llvm-svn: 98565
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to is local to the translation unit, we need to place fill the value of that
symbol into the non-lazy pointer.
This should conclude all Darwin changes for placing the LSDA into the TEXT
section. There is some cleanup to do. I.e., there's no longer a special need for
target-specific code here. But that can come later.
llvm-svn: 98564
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llvm-svn: 98561
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llvm-svn: 98558
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machine instructions.
This is a work in progress.
llvm-svn: 98556
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llvm-svn: 98550
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llvm-svn: 98548
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not all unary nodes necessarily have a simple result type.
llvm-svn: 98547
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llvm-svn: 98542
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MCSectionMachO is already fine (yay for fixed size arrays?),
MCSectionCOFF still leaks.
llvm-svn: 98537
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allocated and thus not freed. This is cool except that it contains
and std::string so the string data didn't get freed. In any case
there is no reason to redundantly store the string data in the
MCSymbol anyway, just make the MCSymbol ref the string data in the
MCContext StringMap.
llvm-svn: 98536
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where it uses types consistently.
llvm-svn: 98532
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llvm-svn: 98531
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llvm-svn: 98530
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to re-instrument the code. We depend on the system valgrind.h to
avoid adding a new license.
llvm-svn: 98529
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doesn't have a type constraint on the scalar because we don't have
an 'sAny' type.
llvm-svn: 98527
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llvm-svn: 98526
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cppcheck, PR6617. Patch by Ettl Martin!
llvm-svn: 98525
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llvm-svn: 98523
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fix the rest of the buildbot failures on non-x86 hosts.
llvm-svn: 98522
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(at least) on non-x86 builders.
llvm-svn: 98520
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llvm-svn: 98519
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with ppc_f128 type by having the type legalizer turn these back into a
call to copysignl.
llvm-svn: 98514
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