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* 80-col.Eric Christopher2010-07-141-2/+3
| | | | llvm-svn: 108381
* Add instcombine transforms to optimize tests of multiple bits of the same ↵Owen Anderson2010-07-142-0/+43
| | | | | | value into a single larger comparison. llvm-svn: 108378
* Make the order in which variables are described in debug informationDan Gohman2010-07-141-0/+23
| | | | | | | | independent of the order that isel happens to visit the dbg_declare intrinsics. This fixes a bug in which the formal arguments were being printed in reverse order, now that fast isel is going bottom up. llvm-svn: 108369
* fix indentationChris Lattner2010-07-141-9/+7
| | | | llvm-svn: 108368
* Don't pass StringRef by reference.Benjamin Kramer2010-07-1430-55/+54
| | | | llvm-svn: 108366
* Properly restore DebugLoc after leaving the local constant area.Dan Gohman2010-07-141-1/+2
| | | | llvm-svn: 108364
* Just use getParent() instead of getModuleFromVal when the value is a Function.Dan Gohman2010-07-141-1/+1
| | | | llvm-svn: 108358
* Rename WriteConstantInt to WriteConstantInternal, to avoid confusion.Dan Gohman2010-07-141-4/+5
| | | | llvm-svn: 108357
* Extend SimplifyCFG's common-destination folding heuristic to allow a singleOwen Anderson2010-07-141-5/+67
| | | | | | | | | | "bonus" instruction to be speculatively executed. Add a heuristic to ensure we're not tripping up out-of-order execution by checking that this bonus instruction only uses values that were already guaranteed to be available. This allows us to eliminate the short circuit in (x&1)&&(x&2). llvm-svn: 108351
* Factor out metadata parsing into a separate function.Dan Gohman2010-07-142-27/+39
| | | | llvm-svn: 108343
* Merge lib/Target/X86/X86COFF.h into include/llvm/Support/COFF.h,Chris Lattner2010-07-142-100/+8
| | | | | | patch by Michael Spencer! llvm-svn: 108342
* Improve 64-subtraction of immediates when parts of the immediate can fitJim Grosbach2010-07-142-11/+40
| | | | | | | | | | | in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
* Delete fast-isel's trivial load optimization; it breaks debugging becauseDan Gohman2010-07-141-31/+0
| | | | | | it can look past points where a debugger might modify user variables. llvm-svn: 108336
* Add missing address register update to t2LDM_RET instruction.Bob Wilson2010-07-141-1/+1
| | | | | | Patch by Brian Lucas. PR7636. llvm-svn: 108332
* Rather than using an ifdef on the target to zero out fields,Duncan Sands2010-07-141-4/+1
| | | | | | just use memset to zero the entire struct. llvm-svn: 108330
* A couple potential optimizations inspired by comment 4 in PR6773.Eli Friedman2010-07-141-0/+41
| | | | llvm-svn: 108328
* Fix for PR7193 was overly conservative. The only case where sibcall calleeEvan Cheng2010-07-141-6/+12
| | | | | | | | | | address cannot be allocated a register is in 32-bit mode where the first three arguments are marked inreg. In that case EAX, EDX, and ECX will be used for argument passing. This fixes PR7610. llvm-svn: 108327
* Add support for NEON VMVN immediate instructions.Bob Wilson2010-07-143-7/+48
| | | | llvm-svn: 108324
* The bits in the cmode field of 32-bit VMOV immediate instructions all dependBob Wilson2010-07-141-2/+2
| | | | | | of the value of the immediate. llvm-svn: 108323
* revert r108320, I see the failures now...Chris Lattner2010-07-141-8/+0
| | | | llvm-svn: 108322
* reapply benjamin's instcombine patch, I don't see anything wrong with it and ↵Chris Lattner2010-07-141-0/+8
| | | | | | can't repro any problems with a manual self-host. llvm-svn: 108320
* fix a bug found by a warning I added to clang this morning.Chris Lattner2010-07-141-1/+1
| | | | llvm-svn: 108309
* Teach ProcessImplicitDefs to transform more COPY instructions into ↵Evan Cheng2010-07-142-20/+43
| | | | | | IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. llvm-svn: 108304
* Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes.Bob Wilson2010-07-141-0/+29
| | | | | | Radar 7373643. llvm-svn: 108303
* Don't propagate debug locations to instructions for materializingDan Gohman2010-07-142-6/+9
| | | | | | | constants, since they may not be emited near the other instructions which get the same line, and this confuses debug info. llvm-svn: 108302
* Add AVX 256-bit compare instructions and a bunch of testcasesBruno Cardoso Lopes2010-07-131-0/+10
| | | | llvm-svn: 108286
* Print VNInfo flags.Jakob Stoklund Olesen2010-07-131-0/+4
| | | | llvm-svn: 108277
* Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to representBob Wilson2010-07-133-192/+78
| | | | | | NEON VMOV-immediate instructions. This simplifies some things. llvm-svn: 108275
* AVX 256-bit conversion instructionsBruno Cardoso Lopes2010-07-134-15/+105
| | | | | | Add the x86 VEX_L form to handle special cases where VEX_L must be set. llvm-svn: 108274
* In inline asm treat indirect 'X' constraint as 'm'.Dale Johannesen2010-07-131-3/+5
| | | | | | | This may not be right in all cases, but it's better than asserting which it was doing before. PR 7528. llvm-svn: 108268
* Added a check that pusha cannot be encoded in 64-bit mode.Kevin Enderby2010-07-131-0/+2
| | | | llvm-svn: 108265
* Add an assertion to make PR7542 fail consistently.Jakob Stoklund Olesen2010-07-131-0/+1
| | | | | | | | | | LiveInterval::overlapsFrom dereferences end() if it is called on an empty interval. It would be reasonable to just return false - an empty interval doesn't overlap anything, but I want to know who is doing it first. llvm-svn: 108264
* Add support for empty named metadata too. This isn't particularlyDan Gohman2010-07-131-12/+13
| | | | | | useful, but it is nice for consistency. llvm-svn: 108262
* Fix LiveInterval::overlaps so it doesn't claim touching intervals overlap.Jakob Stoklund Olesen2010-07-131-10/+2
| | | | | | Also, one binary search is enough. llvm-svn: 108261
* Add support for empty metadata nodes: !{}.Dan Gohman2010-07-133-3/+9
| | | | llvm-svn: 108259
* Extend the r107852 optimization which turns some fp compare to code sequence ↵Evan Cheng2010-07-133-71/+240
| | | | | | using only i32 operations. It now optimize some f64 compares when fp compare is exceptionally slow (e.g. cortex-a8). It also catches comparison against 0.0. llvm-svn: 108258
* Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles).Evan Cheng2010-07-132-1/+7
| | | | llvm-svn: 108256
* -enable-unsafe-fp-math should not imply -enable-finite-only-fp-math.Evan Cheng2010-07-131-1/+1
| | | | llvm-svn: 108254
* Grammar.Eric Christopher2010-07-131-1/+1
| | | | llvm-svn: 108252
* Handle the case of a tail recursion in which the tail call is followedDuncan Sands2010-07-131-13/+35
| | | | | | | | | by a return that returns a constant, while elsewhere in the function another return instruction returns a different constant. This is a special case of accumulator recursion, so just generalize the existing logic a bit. llvm-svn: 108241
* rotate CallInst operandsGabor Greif2010-07-132-7/+8
| | | | | | | | | | | | | | | | | with this commit the callee moves to the end of the operand array (from the start) and the call arguments now start at index 0 (formerly 1) this ordering is now consistent with InvokeInst this commit only flips the switch, functionally it is equivalent to r101465 I intend to commit several cleanups after a few days of soak period llvm-svn: 108240
* Move NEON "modified immediate" encode/decode into ARMAddressingModes.h toBob Wilson2010-07-134-77/+84
| | | | | | avoid replicated code. llvm-svn: 108227
* my work on adding segment registers to LEA missed the Chris Lattner2010-07-131-12/+3
| | | | | | | disassembler. Remove some code from the disassembler to compensate, unbreaking disassembly of lea's. llvm-svn: 108226
* Add AVX 256-bit packed logical formsBruno Cardoso Lopes2010-07-131-0/+19
| | | | llvm-svn: 108224
* Add AVX 256-bit unop arithmetic instructionsBruno Cardoso Lopes2010-07-131-53/+86
| | | | llvm-svn: 108223
* Since AVX is a superset of all SSE versions, only use HasAVX for AVX ↵Bruno Cardoso Lopes2010-07-132-81/+77
| | | | | | instructions llvm-svn: 108222
* Don't add memory operands to storeRegToStackSlot / loadRegFromStackSlot results,Jakob Stoklund Olesen2010-07-131-38/+32
| | | | | | | | | | | they already have one. This fixes the himenobmtxpa miscompilation on ARM. The PostRA scheduler got confused by the double memoperand and hoisted a stack slot load above a store to the same slot. llvm-svn: 108219
* Move some SIMD fragment code into X86InstrFragmentsSIMD so that theDavid Greene2010-07-122-336/+336
| | | | | | | utility classes can be used from multiple files. This will aid transitioning to a new refactored x86 SIMD specification. llvm-svn: 108213
* Add AVX 256 binary arithmetic instructionsBruno Cardoso Lopes2010-07-121-7/+23
| | | | llvm-svn: 108207
* More refactoring of basic SSE arith instructions. Open room for 256-bit ↵Bruno Cardoso Lopes2010-07-121-207/+158
| | | | | | instructions llvm-svn: 108204
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