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* Add support for arbitrary functors to CrashRecoveryContext.Richard Smith2014-03-041-6/+15
| | | | llvm-svn: 202895
* APFloat: Add a move ctor and operator=Benjamin Kramer2014-03-041-0/+18
| | | | llvm-svn: 202883
* MS asm: Attempt to parse variables followed by a bracketed displacementReid Kleckner2014-03-041-2/+34
| | | | | | | | | | This is required to include MSVC's <atomic> header, which we do now in LLVM. Tests forthcoming in Clang, since that's where we test semantic inline asm changes. llvm-svn: 202865
* X86: 80-columnSaleem Abdulrasool2014-03-041-1/+2
| | | | llvm-svn: 202863
* [PowerPC] support powerpc64le as syntax-checking target (pass2)Will Schmidt2014-03-041-0/+1
| | | | | | | | Register the Asm Printer for the ppc64le target. This fills in a spot that was missed in an earlier change (r187179). llvm-svn: 202861
* [XCore] Fix call of absolute address.Richard Osborne2014-03-041-3/+2
| | | | | | | | | | | | | | | Previously for: tail call void inttoptr (i64 65536 to void ()*)() nounwind We would emit: bl 65536 The immediate operand of the bl instruction is a relative offset so it is wrong to use the absolute address here. llvm-svn: 202860
* [mips][msa] Correct the behaviour of the COPY_FW pseudo on lanes 2 and 3.Daniel Sanders2014-03-041-1/+1
| | | | | | | | | | Summary: Previously, attempting to extract lanes 2 and 3 would actually extract lane 1. The MSA CodeGen tests only covered lanes 0 and 1. Differential Revision: http://llvm-reviews.chandlerc.com/D2935 llvm-svn: 202848
* [Modules] Move the LeakDetector header into the IR library where theChandler Carruth2014-03-049-9/+9
| | | | | | | | | | | source file had already been moved. Also move the unittest into the IR unittest library. This may seem an odd thing to put in the IR library but we only really use this with instructions and it needs the LLVM context to work, so it is intrinsically tied to the IR library. llvm-svn: 202842
* [Modules] Move the PassNameParser to the IR library as it deals in theChandler Carruth2014-03-042-2/+2
| | | | | | | PassInfo structures of the legacy pass manager. Also give it the Legacy prefix as it is not a particularly widely used header. llvm-svn: 202839
* [Modules] Move the ConstantRange class into the IR library. This isChandler Carruth2014-03-0413-12/+12
| | | | | | | | | | a bit surprising, as the class is almost entirely abstracted away from any particular IR, however it encodes the comparsion predicates which mutate ranges as ICmp predicate codes. This is reasonable as they're used for both instructions and constants. Thus, it belongs in the IR library with instructions and constants. llvm-svn: 202838
* [Modules] Move the PredIteratorCache into the IR library -- it isChandler Carruth2014-03-043-3/+3
| | | | | | hardcoded to use IR BasicBlocks. llvm-svn: 202835
* [Modules] Move the NoFolder into the IR library as it createsChandler Carruth2014-03-042-2/+2
| | | | | | instructions. llvm-svn: 202834
* [Modules] Move the TargetFolder into the Analysis library. Historically,Chandler Carruth2014-03-042-2/+2
| | | | | | | | | this would have been required because of the use of DataLayout, but that has moved into the IR proper. It is still required because this folder uses the constant folding in the analysis library (which uses the datalayout) as the more aggressive basis of its folder. llvm-svn: 202832
* [Modules] Move CFG.h to the IR library as it defines graph traits overChandler Carruth2014-03-0439-39/+39
| | | | | | IR types. llvm-svn: 202827
* [Modules] Move ValueMap to the IR library. While this class does notChandler Carruth2014-03-047-7/+7
| | | | | | | | | | | | directly care about the Value class (it is templated so that the key can be any arbitrary Value subclass), it is in fact concretely tied to the Value class through the ValueHandle's CallbackVH interface which relies on the key type being some Value subclass to establish the value handle chain. Ironically, the unittest is already in the right library. llvm-svn: 202824
* [Modules] Move ValueHandle into the IR library where Value itself lives.Chandler Carruth2014-03-0428-28/+28
| | | | | | | | | | | Move the test for this class into the IR unittests as well. This uncovers that ValueMap too is in the IR library. Ironically, the unittest for ValueMap is useless in the Support library (honestly, so was the ValueHandle test) and so it already lives in the IR unittests. Mmmm, tasty layering. llvm-svn: 202821
* [Modules] Move the LLVM IR pattern match header into the IR library, itChandler Carruth2014-03-0419-19/+19
| | | | | | obviously is coupled to the IR. llvm-svn: 202818
* [Modules] Move CallSite into the IR library where it belogs. It isChandler Carruth2014-03-0440-40/+40
| | | | | | | abstracting between a CallInst and an InvokeInst, both of which are IR concepts. llvm-svn: 202816
* [Modules] Move GetElementPtrTypeIterator into the IR library. As itsChandler Carruth2014-03-0422-22/+22
| | | | | | | | | name might indicate, it is an iterator over the types in an instruction in the IR.... You see where this is going. Another step of modularizing the support library. llvm-svn: 202815
* [Modules] Move InstIterator out of the Support library, where it had noChandler Carruth2014-03-0422-22/+22
| | | | | | | | | | | | | business. This header includes Function and BasicBlock and directly uses the interfaces of both classes. It has to do with the IR, it even has that in the name. =] Put it in the library it belongs to. This is one step toward making LLVM's Support library survive a C++ modules bootstrap. llvm-svn: 202814
* [cleanup] Re-sort all the includes with utils/sort_includes.py.Chandler Carruth2014-03-0423-27/+26
| | | | llvm-svn: 202811
* This patch implements .set mips32r2 directive and sets appropriate feature ↵Vladimir Medic2014-03-043-0/+35
| | | | | | bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file. llvm-svn: 202807
* Cleaning up a bunch of pre-Visual C++ 2012 build hacks.Yaron Keren2014-03-044-32/+0
| | | | llvm-svn: 202806
* [cleanup] Add a getOperandNo method to the Use class and implement itChandler Carruth2014-03-041-0/+5
| | | | | | | | | | | out-of-line so that it can refer to the methods on User. As a consequence, this removes the need to define one template method if value_use_iterator in the extremely strange User.h header (!!!). This makse Use.h slightly less peculiar. The only remaining real peculiarity is the definition of Use::set in Value.h llvm-svn: 202805
* [cleanup] Use early exit and simpler temporary variables to clarify theChandler Carruth2014-03-041-19/+18
| | | | | | swap implementation. llvm-svn: 202802
* [cleanup] Run clang-format over the Use code. It was *really*Chandler Carruth2014-03-041-35/+31
| | | | | | | | | | inconsistent both with itself and with LLVM at large with formatting. The *s were on the wrong side, the indent was off, etc etc. This is much cleaner. Also, go clang-format laying out the array of tags in nice columns. llvm-svn: 202799
* [cleanup] Tidy up and modernize comments and the definition order forChandler Carruth2014-03-041-60/+42
| | | | | | | | the Use class. More cleanups to come here. This class just needs some TLC. llvm-svn: 202798
* [C+11] Add 'override' keyword to methods in the support library.Craig Topper2014-03-041-1/+1
| | | | llvm-svn: 202791
* [AArch64]Fix improper diagnostics about offset range of load/store instructions.Kevin Qin2014-03-041-2/+2
| | | | llvm-svn: 202775
* MC: Fix Intel assembly parser for [global + offset]Reid Kleckner2014-03-041-15/+27
| | | | | | | | | We were dropping the displacement on the floor if we also had some immediate offset. Should fix PR19033. llvm-svn: 202774
* Revert "[AArch64] This is a work in progress to provide a machine description"Chad Rosier2014-03-045-546/+185
| | | | | | This reverts commit ff717c8fc786a0cfa1602982b91895fa09e514fc. llvm-svn: 202773
* [AArch64] This is a work in progress to provide a machine descriptionChad Rosier2014-03-035-185/+546
| | | | | | | | | | | | | | | | | | | for the Cortex-A53 subtarget in the AArch64 backend. This patch lays the ground work to annotate each AArch64 instruction (no NEON yet) with a list of SchedReadWrite types. The patch also provides the Cortex-A53 processor resources, maps those the the default SchedReadWrites, and provides basic latency. NEON support will be added in a subsequent patch with proper forwarding logic. Verification was done by setting the pre-RA scheduler to linearize to better gauge the effect of the MIScheduler. Even without modeling the forward logic, the results show a modest improvement for Cortex-A53. Reviewers: apazos, mcrosier, atrick Patch by Dave Estes <cestes@codeaurora.org>! llvm-svn: 202767
* Pass to emit DWARF path discriminators.Diego Novillo2014-03-035-1/+249
| | | | | | | | | | | | | | | | DWARF discriminators are used to distinguish multiple control flow paths on the same source location. When this happens, instructions across basic block boundaries will share the same debug location. This pass detects this situation and creates a new lexical scope to one of the two instructions. This lexical scope is a child scope of the original and contains a new discriminator value. This discriminator is then picked up from MCObjectStreamer::EmitDwarfLocDirective to be written on the object file. This fixes http://llvm.org/bugs/show_bug.cgi?id=18270. llvm-svn: 202752
* [C++11] Use std::tie to simplify compare operators.Benjamin Kramer2014-03-034-43/+16
| | | | | | No functionality change. llvm-svn: 202751
* [C++11] Remove a leftover std::function instance.Benjamin Kramer2014-03-031-3/+2
| | | | | | It's not needed anymore. llvm-svn: 202748
* [C++11] Remove the completely unnecessary requirement on SetVector'sChandler Carruth2014-03-032-4/+3
| | | | | | | | | | | | remove_if that its predicate is adaptable. We don't actually need this, we can write a generic adapter for any predicate. This lets us remove some very wrong std::function usages. We should never be using std::function for predicates to algorithms. This incurs an *indirect* call overhead for every evaluation of the predicate, and makes it very hard to inline through. llvm-svn: 202742
* Add DWARF discriminator support to DILexicalBlocks.Diego Novillo2014-03-033-3/+8
| | | | | | This adds support for emitting discriminators from DILexicalBlocks. llvm-svn: 202736
* Re-apply r202551, which introduced new PBQP solver.Lang Hames2014-03-031-38/+38
| | | | llvm-svn: 202735
* Revert "[C++11] Replace LLVM atomics with std::atomic."Benjamin Kramer2014-03-036-10/+12
| | | | | | | Breaks the MSVC build. DataStream.cpp(44): error C2552: 'llvm::Statistic::Value' : non-aggregates cannot be initialized with initializer list llvm-svn: 202731
* [C++11] Replace LLVM atomics with std::atomic.Benjamin Kramer2014-03-036-12/+10
| | | | | | | | | | | With C++11 we finally have a standardized way to specify atomic operations. Use them to replace the existing custom implemention. Sadly the translation is not entirely trivial as std::atomic allows more fine-grained control over the atomicity. I tried to preserve the old semantics as well as possible. Differential Revision: http://llvm-reviews.chandlerc.com/D2915 llvm-svn: 202730
* [mips] Prevent %lo relocation being used on MSA loads and stores.Daniel Sanders2014-03-036-75/+102
| | | | | | | | | | | | | | | | | Summary: Parts of the compiler still believed MSA load/stores have a 16-bit offset when it is actually 10-bit. Corrected this, and fixed a closely related issue this uncovered where load/stores with 10-bit and 12-bit offsets (MSA and microMIPS respectively) could not load/store using offsets from the stack/frame pointer. They accepted frameindex+offset, but not frameindex by itself. Reviewers: jacksprat, matheusalmeida Reviewed By: jacksprat Differential Revision: http://llvm-reviews.chandlerc.com/D2888 llvm-svn: 202717
* [mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug dataEd Maste2014-03-031-0/+4
| | | | | | | | | This fixes invalid lengths in .debug_aranges on big-endian mips64 (lengths appear to be left-shifted by 32 bits) and in .debug_loc. Differential Revision: http://llvm-reviews.chandlerc.com/D2517 llvm-svn: 202716
* Fixing a build failure reported by certain buildbots. This will disable ↵Vladimir Medic2014-03-031-1/+1
| | | | | | jalx instruction for micromips target. llvm-svn: 202715
* [msan] Handle X86 SIMD bitshift intrinsics.Evgeniy Stepanov2014-03-031-0/+119
| | | | llvm-svn: 202712
* This patch implements jalx instruction for Mips architecture.This ↵Vladimir Medic2014-03-031-0/+1
| | | | | | instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well. llvm-svn: 202706
* [C++11] Add a basic block range view for RegionInfoTobias Grosser2014-03-034-15/+8
| | | | | | This also switches the users in LLVM to ensure this functionality is tested. llvm-svn: 202705
* [C++11] Add two range adaptor views to User: operands andChandler Carruth2014-03-032-15/+10
| | | | | | | | | | | | | | | | | | operand_values. The first provides a range view over operand Use objects, and the second provides a range view over the Value*s being used by those operands. The naming is "STL-style" rather than "LLVM-style" because we have historically named iterator methods STL-style, and range methods seem to have far more in common with their iterator counterparts than with "normal" APIs. Feel free to bikeshed on this one if you want, I'm happy to change these around if people feel strongly. I've switched code in SROA and LCG to exercise these mostly to ensure they work correctly -- we don't really have an easy way to unittest this and they're trivial. llvm-svn: 202687
* [Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc ↵Venkatraman Govindaraju2014-03-024-1/+101
| | | | | | backend. llvm-svn: 202670
* [Sparc] Add return/rett instruction to Sparc backend.Venkatraman Govindaraju2014-03-024-0/+46
| | | | llvm-svn: 202666
* [Sparc] Add support for decoding jmpl/retl/ret instruction.Venkatraman Govindaraju2014-03-023-2/+47
| | | | llvm-svn: 202663
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