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* R600/SI: Don't hardcode pointer typeMatt Arsenault2015-06-011-4/+5
| | | | llvm-svn: 238789
* add missing dependency for ExecutionEngine libSanjay Patel2015-06-012-1/+2
| | | | | | | This appears to be masked most of the time, but the problem was exposed on some bots by r238051. llvm-svn: 238788
* LiveRangeEdit: Fix liveranges not shrinking on subrange kill.Matthias Braun2015-06-011-3/+18
| | | | | | | | | | | | | | If a dead instruction we may not only have a last-use in the main live range but also in a subregister range if subregisters are tracked. We need to partially rebuild live ranges in both cases. The testcase only broke when subregister liveness was enabled. I commited it in the current form because there is currently no flag to enable/disable subregister liveness. This fixes PR23720. llvm-svn: 238785
* ARMLoadStoreOptimizer: Fix doxygen comments; NFCMatthias Braun2015-06-011-34/+28
| | | | llvm-svn: 238784
* Make the C++ LTO API easier to use from C++ clients.Peter Collingbourne2015-06-011-14/+7
| | | | | | | | | | | Start using C++ types such as StringRef and MemoryBuffer in the C++ LTO API. In doing so, clarify the ownership of the native object file: the caller now owns it, not the LTOCodeGenerator. The C libLTO library has been modified to use a derived class of LTOCodeGenerator that owns the object file. Differential Revision: http://reviews.llvm.org/D10114 llvm-svn: 238776
* Revert "[Hexagon] Adding basic ELF relocation generation and testing ↵Rafael Espindola2015-06-013-427/+28
| | | | | | | | | | | | advanced relaxation codepath." This reverts commit r238748. It broke the msan bot: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/4372/steps/check-llvm%20msan/logs/stdio llvm-svn: 238772
* Disable MachineSink on convergent operations, similar to how IR Sink isOwen Anderson2015-06-011-0/+4
| | | | | | | restricted. No test because no in-tree target currently has convergent MachineInstr's. llvm-svn: 238763
* Teach the IR Sink pass to (conservatively) respect convergent annotations.Owen Anderson2015-06-011-0/+6
| | | | llvm-svn: 238762
* [mips][FastISel] Implement bswap.Vasileios Kalintiris2015-06-011-0/+64
| | | | | | | | | | | | | | | | | | Summary: Implement bswap intrinsic for MIPS FastISel. It's very different for misp32 r1/r2 . Based on a patch by Reed Kotler. Test Plan: bswap1.ll test-suite Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7219 llvm-svn: 238760
* [mips][FastISel] Implement intrinsics memset, memcopy & memmove.Vasileios Kalintiris2015-06-011-7/+89
| | | | | | | | | | | | | | | | | | | | Summary: Implement the intrinsics memset, memcopy and memmove in MIPS FastISel. Make some needed infrastructure fixes so that this can work. Based on a patch by Reed Kotler. Test Plan: memtest1.ll The patch passes test-suite for mips32 r1/r2 and at O0/O2 Reviewers: rkotler, dsanders Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7158 llvm-svn: 238759
* [mips][FastISel] Implement srem/urem and sdiv/udiv instructions.Vasileios Kalintiris2015-06-011-0/+61
| | | | | | | | | | | | | | | | | | | Summary: Implement the LLVM assembly urem/srem and sdiv/udiv instructions in MIPS FastISel. Based on a patch by Reed Kotler. Test Plan: srem1.ll div1.ll test-suite at O0/O2 for mips32 r1/r2 Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7028 llvm-svn: 238757
* [mips][FastISel] Implement the select statement for MIPS FastISel.Vasileios Kalintiris2015-06-011-0/+47
| | | | | | | | | | | | | | | | | | Summary: Implement the LLVM IR select statement for MIPS FastISelsel. Based on a patch by Reed Kotler. Test Plan: "Make check" test included now. Passes test-suite at O2/O0 mips32 r1/r2. Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D6774 llvm-svn: 238756
* [mips][FastISel] Clobber HI0/LO0 registers in MUL instructions.Vasileios Kalintiris2015-06-011-0/+33
| | | | | | | | | | | | | | | | | | | | | Summary: The contents of the HI/LO registers are unpredictable after the execution of the MUL instruction. In addition to implicitly defining these registers in the MUL instruction definition, we have to mark those registers as dead too. Without this the fast register allocator is running out of registers when the MUL instruction is followed by another one that tries to allocate the AC0 register. Based on a patch by Reed Kotler. Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D9825 llvm-svn: 238755
* Fix relocation selection for foo-. on mips.Rafael Espindola2015-06-011-1/+1
| | | | | | This handles only the 32 bit case. llvm-svn: 238751
* Simplify code, NFC.Rafael Espindola2015-06-011-107/+60
| | | | llvm-svn: 238750
* Add isConstant argument to MDBuilder::createTBAAStructTagNodeArtur Pilipenko2015-06-011-4/+11
| | | | | | | | | | According to the TBAA description struct-path tag node can have an optional IsConstant field. Add corresponding argument to MDBuilder::createTBAAStructTagNode. Reviewed By: hfinkel Differential Revision: http://reviews.llvm.org/D10160 llvm-svn: 238749
* [Hexagon] Adding basic ELF relocation generation and testing advanced ↵Colin LeMahieu2015-06-013-28/+427
| | | | | | relaxation codepath. llvm-svn: 238748
* The fragment implies the section, don't store both.Rafael Espindola2015-06-014-3/+15
| | | | | | This reduces MCSymbol from 64 to 56 bytes on x86_64. llvm-svn: 238747
* AVX-512: Optimized vector shuffle for v16f32 and v16i32 types.Elena Demikhovsky2015-06-011-36/+48
| | | | llvm-svn: 238743
* Re-commit of r238201 with fix for building with shared libraries.Luke Cheeseman2015-06-017-18/+629
| | | | llvm-svn: 238739
* AVX-512: Implemented VRANGEPD and VRANGEPD instructions for SKX.Elena Demikhovsky2015-06-014-6/+34
| | | | | | | | | Implemented DAG lowering for all these forms. Added tests for encoding. By Igor Breger (igor.breger@intel.com) llvm-svn: 238738
* AVX-512: Implemented vector shuffle lowering for v8i64 and v8f64 types.Elena Demikhovsky2015-06-011-33/+102
| | | | | | I removed the vector-shuffle-512-v8.ll, it is auto-generated test, not valid any more. llvm-svn: 238735
* [WinCOFF] Ignore .safeseh for non-x86 architecturesDavid Majnemer2015-06-011-0/+6
| | | | | | | We don't want to bother with creating .sxdata sections on Win64; all the relevant information is already in the .pdata section. llvm-svn: 238730
* AVX-512: added all forms of VPSHUFD and VPSHUFHW, VPSHUFLWElena Demikhovsky2015-06-012-36/+28
| | | | | | including encodings. llvm-svn: 238729
* AVX-512: Implemented VFIXUPIMMPD and VFIXUPIMMPS instructions for KNL and SKXElena Demikhovsky2015-06-014-0/+74
| | | | | | | | | Implemented DAG lowering for all these forms. Added tests for encoding. by Igor Breger (igor.breger@intel.com) llvm-svn: 238728
* [TableGen] Move a couple virtual methods out of line so vtable anchors can ↵Craig Topper2015-06-011-3/+7
| | | | | | be removed. NFC llvm-svn: 238727
* AVX-512: Fixed a bug in compress and expand intrinsics.Elena Demikhovsky2015-06-011-5/+8
| | | | | | By Igor Breger (igor.breger@intel.com) llvm-svn: 238724
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-0121-28/+51
| | | | | | | | | | This is important because of different addressing modes depending on the address space for GPU targets. This only adds the argument, and does not update any of the uses to provide the correct address space. llvm-svn: 238723
* [opaque pointer type] Explicitly store the pointee type of the result of a GEPDavid Blaikie2015-06-012-2/+6
| | | | | | | | Alternatively, this type could be derived on-demand whenever getResultElementType is called - if someone thinks that's the better choice (simple time/space tradeoff), I'm happy to give it a go. llvm-svn: 238716
* Try to fix the build of IntelJITEventListener.Rafael Espindola2015-06-011-2/+1
| | | | llvm-svn: 238709
* Rename HasData to IsRegistered.Rafael Espindola2015-06-012-5/+1
| | | | | | | | | There is no MCSectionData, so the old name is now meaningless. Also remove some asserts/checks that were there just because the information they used was in MCSectionData. llvm-svn: 238708
* Remove trivial forwarding function.Rafael Espindola2015-06-012-2/+2
| | | | llvm-svn: 238707
* Store a bit in MCSection saying if it was registered with MCAssembler.Rafael Espindola2015-06-013-17/+11
| | | | | | With this we can replace a SetVector with a plain std::vector. llvm-svn: 238706
* Use a bitfield. NFC.Rafael Espindola2015-06-011-1/+2
| | | | llvm-svn: 238705
* Simplify another function that doesn't fail.Rafael Espindola2015-06-015-24/+11
| | | | llvm-svn: 238703
* [PHITransAddr] Don't translate unreachable valuesDavid Majnemer2015-06-012-9/+13
| | | | | | | | | | | Unreachable values may use themselves in strange ways due to their dominance property. Attempting to translate through them can lead to infinite recursion, crashing LLVM. Instead, claim that we weren't able to translate the value. This fixes PR23096. llvm-svn: 238702
* [PHITransAddr] Use std::find instead of std::countDavid Majnemer2015-06-011-2/+4
| | | | | | | There is no need to visit all the elements if we are merely performing a membership check. NFCI. llvm-svn: 238701
* Simplify interface of function that doesn't fail.Rafael Espindola2015-05-313-15/+6
| | | | llvm-svn: 238700
* [DWARF] Fix a bug in line info handlingKeno Fischer2015-05-311-62/+43
| | | | | | | | | | | | | | | | | | | | This fixes a bug in the line info handling in the dwarf code, based on a problem I when implementing RelocVisitor support for MachO. Since addr+size will give the first address past the end of the function, we need to back up one line table entry. Fix this by looking up the end_addr-1, which is the last address in the range. Note that this also removes a duplicate output from the llvm-rtdyld line table dump. The relevant line is the end_sequence one in the line table and has an offset of the first address part the end of the range and hence should not be included. Also factor out the common functionality into a separate function. This comes up on MachO much more than on ELF, since MachO doesn't store the symbol size separately, hence making said situation always occur. Differential Revision: http://reviews.llvm.org/D9925 llvm-svn: 238699
* ARMConstantIslandPass.cpp: Prune an empty \brief. [-Wdocumentation]NAKAMURA Takumi2015-05-311-1/+0
| | | | llvm-svn: 238697
* [Hexagon] Including raw_ostream for debug builds.Colin LeMahieu2015-05-311-0/+1
| | | | llvm-svn: 238695
* [Hexagon] classes are actually structs.Colin LeMahieu2015-05-311-2/+2
| | | | llvm-svn: 238694
* [Hexagon] Adding MC packet shuffler.Colin LeMahieu2015-05-319-6/+882
| | | | llvm-svn: 238692
* ARM: recommit r237590: allow jump tables to be placed as constant islands.Tim Northover2015-05-317-238/+418
| | | | | | | | | | | | | | | The original version didn't properly account for the base register being modified before the final jump, so caused miscompilations in Chromium and LLVM. I've fixed this and tested with an LLVM self-host (I don't have the means to build & test Chromium). The general idea remains the same: in pathological cases jump tables can be too far away from the instructions referencing them (like other constants) so they need to be movable. Should fix PR23627. llvm-svn: 238680
* [MC] Simplify code. No functionality change intended.Benjamin Kramer2015-05-311-7/+2
| | | | llvm-svn: 238676
* [Hexagon] Adding override specifier and removing erroneous assertionColin LeMahieu2015-05-301-4/+2
| | | | llvm-svn: 238664
* Add RelocVisitor support for MachOKeno Fischer2015-05-301-0/+5
| | | | | | | | | | | | This commit adds partial support for MachO relocations to RelocVisitor. A simple test case is added to show that relocations are indeed being applied and that using llvm-dwarfdump on MachO files no longer errors. Correctness is not yet tested, due to an unrelated bug in DebugInfo, which will be fixed with appropriate testcase in a followup commit. Differential Revision: http://reviews.llvm.org/D8148 llvm-svn: 238663
* [Hexagon] Adding basic relaxation functionality.Colin LeMahieu2015-05-303-6/+157
| | | | llvm-svn: 238660
* [MC] Allow backends to decide relaxation for unresolved fixups.Colin LeMahieu2015-05-302-24/+28
| | | | | | Differential Revision: http://reviews.llvm.org/D8217 llvm-svn: 238659
* [lib/Fuzzer] make assertions more informative and update comments for the ↵Kostya Serebryany2015-05-302-4/+8
| | | | | | user-supplied mutator llvm-svn: 238658
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