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* use auto with dyn_casted values; NFCSanjay Patel2015-12-291-11/+9
| | | | llvm-svn: 256579
* fix formatting; NFCSanjay Patel2015-12-291-11/+10
| | | | llvm-svn: 256574
* use range-based for-loops; NFCISanjay Patel2015-12-291-18/+15
| | | | llvm-svn: 256573
* use range-based for-loop; NFCISanjay Patel2015-12-291-8/+6
| | | | llvm-svn: 256572
* Add command line options to force function/loop alignments.Chad Rosier2015-12-292-0/+18
| | | | | | | These are being added for testing purposes. http://reviews.llvm.org/D15648 llvm-svn: 256571
* don't repeat function names in comments; NFCSanjay Patel2015-12-291-14/+13
| | | | llvm-svn: 256569
* [JumpThreading] Fix opcode bonus in getJumpThreadDuplicationCost()Geoff Berry2015-12-291-10/+16
| | | | | | | | | | | | The code that was meant to adjust the duplication cost based on the terminator opcode was not being executed in cases where the initial threshold was hit inside the loop. Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D15536 llvm-svn: 256568
* use range-based for-loops; NFCISanjay Patel2015-12-291-9/+6
| | | | llvm-svn: 256566
* [MemoryBuiltins] Delete dead code [NFC]Philip Reames2015-12-291-7/+0
| | | | llvm-svn: 256565
* [AVX512] add PSRLW Intrinsic Michael Zuckerman2015-12-291-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D15751 llvm-svn: 256558
* [ptr-traits] Provide a real MCFragment address for the sentinel insteadChandler Carruth2015-12-291-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | of casting the integer '4' to such a pointer. There is no reason to expect '4' to be a portable or reliable pointer of this form. The only reason this ever worked is because the PointerIntPair that this actually gets used with has an artificially *low* presumed alignment that allowed it to work. When the alignment of PointerIntPair is derived from the actual type's alignment, the asserts start firing on this pointer. I'm amazed we never managed to do anything that triggered the alignment sanitizer with it, as this is just flat out UB. If folks dislike this approach to providing a sentinel fragment address, there are a myriad of other alternatives, suggestions welcome. But this one has the distinct advantage of not requiring the friend dance of ilist's sentinel (which I'll point out is *also* in play for MCFragment!) and seems to be using a nicely provided facility in MCFragment to establish just such dummy nodes. This is part of a series of patches to allow LLVM to check for complete pointee types when computing its pointer traits. This is absolutely necessary to get correct (or reproducible) results for things like how many low bits are guaranteed to be zero. llvm-svn: 256552
* [ptr-traits] Sink a constructor definition to the .cpp file and addChandler Carruth2015-12-291-0/+4
| | | | | | | | | | | | missing includes so that the pointee types for DenseMap pointer keys and such are complete prior to us querying the pointer traits for them. This is part of a series of patches to allow LLVM to check for complete pointee types when computing its pointer traits. This is absolutely necessary to get correct (or reproducible) results for things like how many low bits are guaranteed to be zero. llvm-svn: 256550
* [ptr-traits] Split the MCFragment type hierarchy out of the MCAssemblerChandler Carruth2015-12-293-429/+459
| | | | | | | | | | | | | | | | | | | | | | header to its own header, allowing users of fragments to have a narrower header file, and avoid circular header dependencies when getting the definition of MCSection prior to inspecting traits on MCSection pointers. This is part of a series of patches to allow LLVM to check for complete pointee types when computing its pointer traits. This is absolutely necessary to get correct (or reproducible) results for things like how many low bits are guaranteed to be zero. Note that this doesn't in any way change the design of MC, it is just moving code around to allow the *header files* to be more fine grained. Without this, it is impossible to get a complete type for MCSection where it is needed. If anyone would prefer a different slicing of the header files, I'm happy to oblige of course. =] llvm-svn: 256548
* [TableGen] Remove MnemonicContainsDot from AsmParser. It isn't used. NFCCraig Topper2015-12-291-1/+0
| | | | llvm-svn: 256542
* [X86] Remove declaration of ATTAsmParser. Its equivalent to the ↵Craig Topper2015-12-291-5/+0
| | | | | | DefaultAsmParser. NFC llvm-svn: 256541
* [ptr-traits] Merge the MetadataTracking helpers into the MetadataChandler Carruth2015-12-293-56/+38
| | | | | | | | | | | | | | | | | | | | header. This is part of a series of patches to allow LLVM to check for complete pointee types when computing its pointer traits. This is absolutely necessary to get correct (or reproducible) results for things like how many low bits are guaranteed to be zero. The MetadataTracking helpers aren't actually independent. They rely on constructing a PointerUnion between Metadata and MetadataAsValue pointers, which requires know the alignment of pointers to those types which requires them to be complete. The .cpp file even defined a method declared in Metadata.h! These really don't seem like something that is separable, and there is no real layering problem with just placing them together. llvm-svn: 256531
* Accept dwarf version 5 for CIE versions.Eric Christopher2015-12-281-0/+1
| | | | llvm-svn: 256527
* [Thumb] Fix assembler error 'cannot honor width suffix pop {lr}'Artyom Skrobov2015-12-282-50/+61
| | | | | | | | | | | | | Summary: * avoid generating POP {LR} in Thumb1 epilogues * combine MOV LR, Rx + BX LR -> BX Rx in a peephole optimization pass * combine POP {LR} + B + BX LR -> POP {PC} on v5T+ Test cases by Ana Pazos Differential Revision: http://reviews.llvm.org/D15707 llvm-svn: 256523
* [x86] lower calls to fmin and llvm.minnum.* using minss/minsd/minps/minpd ↵Sanjay Patel2015-12-281-6/+10
| | | | | | | | | | | (PR24475) This is a follow-on to: http://reviews.llvm.org/rL255700 http://reviews.llvm.org/rL256454 http://reviews.llvm.org/rL256510 llvm-svn: 256522
* Refactor inline costs analysis by removing the InlineCostAnalysis classEaswaran Raman2015-12-284-70/+36
| | | | | | | | | | InlineCostAnalysis is an analysis pass without any need for it to be one. Once it stops being an analysis pass, it doesn't maintain any useful state and the member functions inside can be made free functions. NFC. Differential Revision: http://reviews.llvm.org/D15701 llvm-svn: 256521
* [RS4GC] Fix rematerialization of bitcast of bitcast.Manuel Jacob2015-12-281-6/+2
| | | | | | | | | | | | | | | Summary: Previously, only the outer (last) bitcast was rematerialized, resulting in a use of the unrelocated inner (first) bitcast after the statepoint. See the test case for an example. Reviewers: igor-laevsky, reames Subscribers: reames, alex, llvm-commits, sanjoy Differential Revision: http://reviews.llvm.org/D15789 llvm-svn: 256520
* Implemented cost model for masked gather and scatter operationsElena Demikhovsky2015-12-284-4/+162
| | | | | | | | | The cost is calculated for all X86 targets. When gather/scatter instruction is not supported we calculate the cost of scalar sequence. Differential revision: http://reviews.llvm.org/D15677 llvm-svn: 256519
* [x86] lower calls to fmax and llvm.maxnum.* using maxps/maxpd (PR24475)Sanjay Patel2015-12-281-2/+4
| | | | | | | | This is a follow-on to: http://reviews.llvm.org/rL255700 http://reviews.llvm.org/rL256454 llvm-svn: 256510
* tidy up; NFCSanjay Patel2015-12-281-6/+7
| | | | llvm-svn: 256506
* Support clrex instruction on ARMv6k. Patch by Andrew Turner.Roman Divacky2015-12-281-1/+1
| | | | llvm-svn: 256505
* Refactor: Simplify boolean conditional return statements in ↵Alexander Kornienko2015-12-281-4/+1
| | | | | | | | | | | | | | | | lib/Transforms/ObjCARC Summary: Use clang-tidy to simplify boolean conditional return statements Reviewers: craig.topper, bkramer, chandlerc, gottesmm Subscribers: llvm-commits Patch by Richard Thomson! Differential Revision: http://reviews.llvm.org/D9999 llvm-svn: 256502
* Refactor: Simplify boolean conditional return statements in llvm/lib/SupportAlexander Kornienko2015-12-282-8/+3
| | | | | | | | | | | | | | Summary: Use clang-tidy to simplify boolean conditional return statements Reviewers: rafael, bkramer, ddunbar, Bigcheese, chandlerc, chapuni, nicholas, alexfh Subscribers: alexfh, craig.topper, llvm-commits Patch by Richard Thomson! Differential Revision: http://reviews.llvm.org/D9978 llvm-svn: 256500
* [X86] Better support for the MCU psABI (LLVM part)Michael Kuperstein2015-12-287-44/+97
| | | | | | | | | | | | | | | | This adds support for the MCU psABI in a way different from r251223 and r251224, basically reverting most of these two patches. The problem with the approach taken in r251223/4 is that it only handled libcalls that originated from the backend. However, the mid-end also inserts quite a few libcalls and assumes these use the platform's default calling convention. The previous patch tried to insert inregs when necessary both in the FE and, somewhat hackily, in the CG. Instead, we now define a new default calling convention for the MCU, which doesn't use inreg marking at all, similarly to what x86-64 does. Differential Revision: http://reviews.llvm.org/D15054 llvm-svn: 256494
* Refactor: Simplify boolean conditional return statements in lib/Target/PowerPCAlexander Kornienko2015-12-284-14/+4
| | | | | | | | | | | | | | Summary: Use clang-tidy to simplify boolean conditional return statements Reviewers: uweigand, rafael, wschmidt Subscribers: craig.topper, llvm-commits Patch by Richard Thomson! Differential Revision: http://reviews.llvm.org/D9984 llvm-svn: 256493
* [X86][AVX512] Lower broadcast sub vector to vector inrtrinsicsAsaf Badouh2015-12-282-1/+42
| | | | | | | | | | | | | lower broadcast<type>x<vector> to shuffles. there are two cases: 1.src is 128 bits and dest is 512 bits: in this case we will lower it to shuffle with imm = 0. 2.src is 256 bit and dest is 512 bits: in this case we will lower it to shuffle with imm = 01000100b (0x44) that way we will broadcast the 256bit source: ymm[0,1,2,3] => zmm[0,1,2,3,0,1,2,3] then it will mask it with the passthru value (in case it's mask op). Differential Revision: http://reviews.llvm.org/D15790 llvm-svn: 256490
* [X86][AVX512] add fp scalar broadcast intrinsicsAsaf Badouh2015-12-282-5/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D15790 llvm-svn: 256489
* [AVX512] Remove VEX_LIG from vmovd/vmovq instructions. From what I can tell ↵Craig Topper2015-12-281-14/+14
| | | | | | from the Intel docs these instructions require the L-bit to be 0. llvm-svn: 256486
* [AVX512] Fix some places that used FR64 instead of FR64X.Craig Topper2015-12-281-6/+6
| | | | llvm-svn: 256484
* [AVX512] Bring vmovq instructions names into alignment with the AVX and SSE ↵Craig Topper2015-12-281-14/+26
| | | | | | | | names. Add a missing encoding to disassembler and assembler. I believe this also fixes a case where a 64-bit memory form that is documented as being unsupported in 32-bit mode was able to be selected there. llvm-svn: 256483
* [X86] Move address for store target from outs to ins on a couple instructions.Craig Topper2015-12-281-3/+4
| | | | llvm-svn: 256482
* [X86] Add proper Uses/Defs/mayLoad flags for AAA/AAD/AAM/AAS/DAA/DAS/XLAT ↵Craig Topper2015-12-281-6/+7
| | | | | | instructions. llvm-svn: 256481
* [lcg] Fix a few more formatting goofs found by clang-format. NFC.Chandler Carruth2015-12-281-4/+4
| | | | llvm-svn: 256480
* [AVX512] Remove separate instruction and patterns for lowering ↵Craig Topper2015-12-272-22/+16
| | | | | | ctlz_zero_undef. Change the operation for CTLZ_ZERO_UNDEF to Expand so SelectionDAG will convert them to CTLZ before lowering. llvm-svn: 256477
* [SelectionDAG] Teach LegalizeVectorOps to not unroll CTLZ_ZERO_UNDEF and ↵Craig Topper2015-12-271-0/+14
| | | | | | CTTZ_ZERO_UNDEF if the non-ZERO_UNDEF form is legal or custom. Will be used to simplify X86 code in a follow on commit. llvm-svn: 256476
* [AVX512] Remove alternate data type versions of VALIGND, VALIGNQ, VMOVSHDUP ↵Craig Topper2015-12-271-19/+3
| | | | | | and VMOVSLDUP. They don't have any tests and I don't think they can be selected. If they are truly needed they should be implemented with patterns against the normal instructions and not separate instructions. llvm-svn: 256475
* AVX512: Change VPMOVB2M DAG lowering , use CVT2MASK node instead TRUNCATE.Igor Breger2015-12-275-36/+92
| | | | | | | | | Fix TRUNCATE lowering vector to vector i1, use LSB and not MSB. Implement VPMOVB/W/D/Q2M intrinsic. Differential Revision: http://reviews.llvm.org/D15675 llvm-svn: 256470
* [X86][AVX512] change broadcast to use maskable patternAsaf Badouh2015-12-271-17/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D15786 llvm-svn: 256469
* [attrs] Extract the pure inference of function attributes intoChandler Carruth2015-12-277-860/+956
| | | | | | | | | | | | | | | | | | | | | | | | | a standalone pass. There is no call graph or even interesting analysis for this part of function attributes -- it is literally inferring attributes based on the target library identification. As such, we can do it using a much simpler module pass that just walks the declarations. This can also happen much earlier in the pass pipeline which has benefits for any number of other passes. In the process, I've cleaned up one particular aspect of the logic which was necessary in order to separate the two passes cleanly. It now counts inferred attributes independently rather than just counting all the inferred attributes as one, and the counts are more clearly explained. The two test cases we had for this code path are both ... woefully inadequate and copies of each other. I've kept the superset test and updated it. We need more testing here, but I had to pick somewhere to stop fixing everything broken I saw here. Differential Revision: http://reviews.llvm.org/D15676 llvm-svn: 256466
* [attrs] Split off the forced attributes utility into its own pass thatChandler Carruth2015-12-277-68/+134
| | | | | | | | | | | | | | | is (by default) run much earlier than FuncitonAttrs proper. This allows forcing optnone or other widely impactful attributes. It is also a bit simpler as the force attribute behavior needs no specific iteration order. I've added the pass into the default module pass pipeline and LTO pass pipeline which mirrors where function attrs itself was being run. Differential Revision: http://reviews.llvm.org/D15668 llvm-svn: 256465
* [AVX-512] Remove alernate integer forms for VPERMILPS and VPERMILPD. There ↵Craig Topper2015-12-271-8/+0
| | | | | | no tests for them and I don't see any way to select them anyway. If they are really needed they should be implemented as patterns and not full fledged instructions. llvm-svn: 256462
* [X86, Win64] Use a frame pointer if pushf is emittedDavid Majnemer2015-12-272-20/+25
| | | | | | | | | | | | | | | A frame pointer must be used if stack pointer is modified after the prologue. LLVM will emit pushf/popf if we need to save/restore the FLAGS register, requiring us to have a frame pointer for the function. There is a small twist: this sequence might exist in user code via inline-assembly. For now, conservatively assume that such functions require a frame pointer. For real world justification, please see clang's implementation of __readeflags. This fixes PR25945. llvm-svn: 256456
* [WinEH] Add comments explaining the EH tablesDavid Majnemer2015-12-271-31/+114
| | | | | | | This is aids in debugging WinEH, similar functionality is present for DWARF EH. llvm-svn: 256455
* [x86] lower calls to llvm.maxnum.v4f32 using maxpsSanjay Patel2015-12-261-7/+10
| | | | | | | This is a follow-on to: http://reviews.llvm.org/rL255700 llvm-svn: 256454
* [X86] Fix an unused variable warning in released builds.Craig Topper2015-12-261-0/+2
| | | | llvm-svn: 256453
* [X86] Add support for printing shuffle comments for AVX512 PSHUFB instructions.Craig Topper2015-12-262-12/+39
| | | | llvm-svn: 256452
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