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* [MC] Ensure that pending labels are flushed when -mc-relax-all flag is usedPetr Hosek2015-06-271-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The current implementation doesn't always flush all pending labels beforeemitting data which can result in an incorrectly placed labels in case when when instruction bundling is enabled and -mc-relax-all flag is being used. To address this issue, we always flush pending labels before emitting data. The change was tested by running PNaCl toolchain trybots with -mc-relax-all flag set. Fixes https://code.google.com/p/nativeclient/issues/detail?id=4063 Test Plan: Regression test attached Reviewers: mseaborn Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D10325 llvm-svn: 240870
* [MC] Align fragments when -mc-relax-all flag is usedPetr Hosek2015-06-271-6/+12
| | | | | | | | | | | | | | | | | | | | | | | Summary: Ensure that fragments are bundle aligned when instruction bundling is enabled and the -mc-relax-all flag is set. This is implicitly assumed by the bundle padding implementation but this assumption does not hold when custom alignment is being used. The change was tested by running PNaCl toolchain trybots with -mc-relax-all flag set. Fixes https://code.google.com/p/nativeclient/issues/detail?id=4063 Test Plan: Regression test attached Reviewers: mseaborn Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D10044 llvm-svn: 240869
* IR: Expose ModuleSlotTracker in Value::print()Duncan P. N. Exon Smith2015-06-271-10/+29
| | | | | | | | | | | | | | | | | | | Allow callers of `Value::print()` and `Metadata::print()` to pass in a `ModuleSlotTracker`. This allows them to pay only once for calculating module-level slots (such as Metadata). This is related to PR23865, where there was a huge cost for `MachineFunction::print()`. Although I don't have a *particular* user in mind for this new code, I have hit big slowdowns before when running `opt -debug`, and I think this will be useful. Going forward, if someone hits a big slowdown with `print()` statements, they can create a `ModuleSlotTracker` and send it through. Similarly, adding support to `Value::dump()` and `Metadata::dump()` should be trivial. I added unit tests to be sure the `print()` functions actually behave the same way with and without the slot tracker. llvm-svn: 240867
* LowerBitSets: Ignore bitset entries that do not directly refer to a global.Peter Collingbourne2015-06-271-3/+7
| | | | | | | | | | | | | | | | | It is possible for a global to be substituted with another global of a different type or a different kind (i.e. an alias) at IR link time. One example of this scenario is when a Microsoft ABI vtable is substituted with an alias referring to a larger vtable containing an RTTI reference. This will cause the global to be RAUW'd with a possibly bitcasted reference to the other global. This will of course also affect any references to the global in bitset metadata. The right way to handle such metadata is simply to ignore it. This is sound because the linked module should contain another copy of the bitset entries as applied to the new global. llvm-svn: 240866
* Plug a leak introduced by r240848Duncan P. N. Exon Smith2015-06-271-2/+5
| | | | | | | | | Apparently this obvious leak was never exercised before, but r240848 exposed it. Plug it. http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/5075 llvm-svn: 240865
* Debug Info: Fix a bug in the DW_AT_bit_offset calculation that wouldAdrian Prantl2015-06-261-13/+28
| | | | | | | | | result in negative offsets and attempt a better job at documenting the algorithm. rdar://21082998 llvm-svn: 240853
* CodeGen: Create a proper ModuleSlotTracker for MachineInstrDuncan P. N. Exon Smith2015-06-261-2/+7
| | | | | | | | | | | Another follow-up related to r240848: try a little harder to share slot tracking calculations within a single `MachineInstr` dump. This is unrelated to `MachineFunction::print()`, since that should be passing through the function's `ModuleSlotTracker` by now, but could affect the speed of dumping from a debugger if there is more than one IR-level operand. llvm-svn: 240852
* MIR Serialization: Serialize global address machine operands.Alex Lorenz2015-06-266-14/+93
| | | | | | | | | | | | This commit serializes the global address machine operands. This commit doesn't serialize the operand's offset and target flags, it serializes only the global value reference. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10671 llvm-svn: 240851
* [RewriteStatepointsForGC] Generalized vector phi/select handling for base ↵Philip Reames2015-06-261-55/+124
| | | | | | | | | | | | | | | pointers This change extends the detection of base pointers for vector constructs to handle arbitrary phi and select nodes. The existing non-vector code already handles those, so this is basically just extending the vector special case to be less special cased. It still isn't generalized vector handling since we can't handle arbitrary vector instructions (e.g. shufflevectors), but it's a lot closer. The general structure of the change is as follows: * Extend the base defining value relation over a subset of vector instructions and vector typed phi & select instructions. * Move scalarization from before base pointer rewriting to after base pointer rewriting. The extension of the BDV relation is sufficient to find vector base phis for vector inputs. * Preserve the existing special case logic for when the base of a vector element is locally obvious. This general idea could be extended to the scalar case as well. Differential Revision: http://reviews.llvm.org/D10461#inline-84275 llvm-svn: 240850
* [NVPTX] noop when kernel pointers are already globalJingyue Wu2015-06-261-0/+4
| | | | | | | | | | | | | | | | Summary: Some front ends make kernel pointers global already. In that case, handlePointerParams does nothing. Test Plan: more tests in lower-kernel-ptr-arg.ll Reviewers: grosser Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10779 llvm-svn: 240849
* CodeGen: Push the ModuleSlotTracker through MetadataDuncan P. N. Exon Smith2015-06-262-15/+23
| | | | | | | | For another 1% speedup on the testcase in PR23865, push the `ModuleSlotTracker` through to metadata-related printing in `MachineBasicBlock::print()`. llvm-svn: 240848
* Minor style cleanup after 240843 [NFC]Philip Reames2015-06-261-8/+7
| | | | | | Use a for-each loop in one case and rename the function to reflect it's new usage. llvm-svn: 240847
* CodeGen: Push the ModuleSlotTracker through MachineOperandsDuncan P. N. Exon Smith2015-06-262-34/+46
| | | | | | | | | Push `ModuleSlotTracker` through `MachineOperand`s, dropping the time for `llc -print-machineinstrs` on the testcase in PR23865 from ~13 seconds to ~9 seconds. Now `SlotTracker::processFunctionMetadata()` accounts for only 8% of the runtime, which seems reasonable. llvm-svn: 240845
* [Verifier] Follow on to 240836Philip Reames2015-06-261-81/+79
| | | | | | Address one missed review comment and do the rename I left out of that patch to make it reviewable. llvm-svn: 240843
* CodeGen: Use a single SlotTracker in MachineFunction::print()Duncan P. N. Exon Smith2015-06-263-22/+92
| | | | | | | | | | | | | Expose enough of the IR-level `SlotTracker` so that `MachineFunction::print()` can use a single one for printing `BasicBlock`s. Next step would be to lift this through a few more APIs so that we can make other print methods faster. Fixes PR23865, changing the runtime of `llc -print-machineinstrs` from many minutes (killed after 3 minutes, but it wasn't very close) to 13 seconds for a 502185 line dump. llvm-svn: 240842
* AMDPGU/SI: Use correct resource descriptors for VI on HSATom Stellard2015-06-261-1/+6
| | | | | | | | | | Summary: We need to set MTYPE = 2 for VI shaders when targeting the HSA runtime. Reviewers: arsenm Differential Revision: http://reviews.llvm.org/D10777 llvm-svn: 240841
* AMDGPU/SI: Update amd_kernel_code_t definition and add assembler supportTom Stellard2015-06-268-199/+477
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10772 llvm-svn: 240839
* AMDGPU/SI: Remove unused variableTom Stellard2015-06-261-1/+0
| | | | | | This should fix some bots that were broken by r240831. llvm-svn: 240838
* [Verifier] Verify invokes of intrinsicsPhilip Reames2015-06-261-19/+17
| | | | | | | | | | We support invoking a subset of llvm's intrinsics, but the verifier didn't account for this. We had previously added a special case to verify invokes of statepoints. By generalizing the code in terms of CallSite, we can verify invokes of other intrinsics as well. Interestingly, this found one test case which was invalid. Note: I'm deliberately leaving the naming change from CI to CS to a follow up change. That will happen shortly, I just wanted to reduce the diff to make it clear what was happening with this one. Differential Revision: http://reviews.llvm.org/D10118 llvm-svn: 240836
* Debug Info: Clarify the documentation for bitfields emission.Adrian Prantl2015-06-261-2/+7
| | | | llvm-svn: 240835
* AMDGPU/SI: Set ELF OS/ABI to ELFOSABI_AMDGPU_HSATom Stellard2015-06-261-1/+2
| | | | | | | | | | Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10708 llvm-svn: 240832
* AMDGPU/SI: Add hsa code object directivesTom Stellard2015-06-2619-10/+488
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10757 llvm-svn: 240831
* AMDGPU/SI: There are no implicit kernel args in the amdhsa ABITom Stellard2015-06-262-1/+9
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10706 llvm-svn: 240830
* AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()Tom Stellard2015-06-262-7/+16
| | | | | | | | | | | | | | Summary: This way the function symbol points to the start of amd_kernel_code_t rather than the start of the function. Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10705 llvm-svn: 240829
* Teach InlineCost to account for a null check which can be folded awayPhilip Reames2015-06-261-17/+56
| | | | | | | | | | If we have a caller that knows a particular argument can never be null, we can exploit this fact while simplifying values in the inline cost analysis. This has the effect of reducing the cost for inlining when a null check is present in the callee, but the value is known non null in the caller. In particular, any dependent control flow can be discounted from the cost estimate. Note that we use the parameter attributes at the call site to memoize the analysis within the caller's code. The setting of this attribute is done in InstCombine, the inline cost analysis just consumes it. This is intentional and important because we want the inline cost analysis results to be easily cachable themselves. We're not currently doing so, but initial results on LTO indicate this will quickly become important. Differential Revision: http://reviews.llvm.org/D9129 llvm-svn: 240828
* AMDGPU: really don't commute REV opcodes if the target variant doesn't existMarek Olsak2015-06-262-9/+13
| | | | | | | | | | | | | | If pseudoToMCOpcode failed, we would return the original opcode, so operands would be swapped, but the instruction would remain the same. It resulted in LSHLREV a, b ---> LSHLREV b, a. This fixes Glamor text rendering and piglit/arb_sample_shading-builtin-gl-sample-mask on VI. This is a candidate for stable branches. v2: the test was simplified by Tom Stellard llvm-svn: 240824
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-263-34/+30
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240822
* Add missing builtins to the PPC back end for ABI compliance (vol. 1)Nemanja Ivanovic2015-06-261-6/+18
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D10638 This is the back end portion of patch http://reviews.llvm.org/D10637 It just adds the code gen and intrinsic functions necessary to support that patch to the back end. llvm-svn: 240820
* Wrap assert loops in #ifndef NDEBUGPete Cooper2015-06-261-0/+2
| | | | | | | The body of the loops here only contained asserts. This triggered an unused variable warning on release builds and -Werror on the bots. llvm-svn: 240819
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-263-21/+18
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240817
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-264-18/+18
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240815
* Show invariant loads in MMO dumpingMatt Arsenault2015-06-261-0/+3
| | | | llvm-svn: 240813
* Revert "Revert r240762 "[X86] Cleanup ↵David Majnemer2015-06-261-36/+28
| | | | | | | | | | | X86WindowsTargetObjectFile::getSectionForConstant"" This reverts commit r240793 while fixing how we handle array constant pool entries. This fixes PR23966. llvm-svn: 240811
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-261-14/+12
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240809
* Add op_values() to iterate over the SDValue operands of an SDNode.Pete Cooper2015-06-261-2/+1
| | | | | | | | | | SDNode already had ops() which would iterate over the operands and return SDUse*. This version instead gets the SDValue's out of the SDUse's so that we can use foreach in more places. Reviewed by David Blaikie. llvm-svn: 240805
* Move VectorUtils from Transforms to Analysis to correct layering violationDavid Blaikie2015-06-266-5/+5
| | | | llvm-svn: 240804
* [ARM] Cortex-R5 is not VFPOnlySPJaved Absar2015-06-261-1/+1
| | | | | | | | | | | | | This patch fixes the error in ARM.td which stated that Cortex-R5 floating point unit can do only single precision, when it can do double as well. Reviewers: rengolin Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10769 llvm-svn: 240799
* [LAA] Try to prove non-wrapping of pointers if SCEV cannotAdam Nemet2015-06-261-1/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Scalar evolution does not propagate the non-wrapping flags to values that are derived from a non-wrapping induction variable because the non-wrapping property could be flow-sensitive. This change is a first attempt to establish the non-wrapping property in some simple cases. The main idea is to look through the operations defining the pointer. As long as we arrive to a non-wrapping AddRec via a small chain of non-wrapping instruction, the pointer should not wrap either. I believe that this essentially is what Andy described in http://article.gmane.org/gmane.comp.compilers.llvm.cvs/220731 as the way forward. Reviewers: aschwaighofer, nadav, sanjoy, atrick Reviewed By: atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10472 llvm-svn: 240798
* Fix unused variable from r240792.Alex Lorenz2015-06-261-0/+1
| | | | | | | The variable 'I' wasn't used when assertions were disabled. This commit ensures that 'I' is used outside of an assert. llvm-svn: 240797
* [DAGCombine] Fix demanded bits computation for exact shifts.Benjamin Kramer2015-06-261-1/+13
| | | | | | Fixes a miscompilation of MultiSource/Benchmarks/MallocBench/gs llvm-svn: 240796
* [X86]: Correctly sign-extend 16-bit immediate in CALL instruction.Douglas Katzman2015-06-261-1/+7
| | | | | | | | Patch by Matthew Barney. Thanks! Differential Revision: http://reviews.llvm.org/D9514 llvm-svn: 240795
* Fix ODR violation waiting to happen by making static function definitions in ↵David Blaikie2015-06-262-0/+214
| | | | | | | | | | VectorUtils.h non-static and defined out of line Patch by Ashutosh Nema Differential Revision: http://reviews.llvm.org/D10682 llvm-svn: 240794
* Revert r240762 "[X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant"Hans Wennborg2015-06-261-25/+37
| | | | | | It seems to have caused PR23966: "UNREACHABLE executed at ..\lib\Target\X86\X86TargetObjectFile.cpp:148" llvm-svn: 240793
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-266-21/+138
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* [DAGCombiner] Preserve the exact bit when simplifying SRA to SRL.Benjamin Kramer2015-06-261-4/+7
| | | | | | Allows more aggressive folding of ashr/shl pairs. llvm-svn: 240788
* [DAGCombine] fold (X >>?,exact C1) << C2 --> X << (C2-C1)Benjamin Kramer2015-06-261-0/+16
| | | | | | | Instcombine also does this but many opportunities only become visible after GEPs are lowered. llvm-svn: 240787
* Rename getObjectFile to getObject for consistency.Rafael Espindola2015-06-262-2/+2
| | | | llvm-svn: 240785
* [mips] [IAS] Add partial support for the ULW pseudo-instruction.Toma Tabacu2015-06-262-0/+82
| | | | | | | | | | | | | | | | Summary: This only adds support for ULW of an immediate address with/without a source register. It does not include support for ULW of the address of a symbol. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9663 llvm-svn: 240782
* Expose getFlags via ELFSectionRef.Rafael Espindola2015-06-261-7/+7
| | | | llvm-svn: 240779
* Add a ELFSectionRef class and use it to expose getSectionType.Rafael Espindola2015-06-261-3/+3
| | | | llvm-svn: 240778
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